SCXML State Chart XML. Previously, in this course...
|
|
- Cameron Douglas
- 5 years ago
- Views:
Transcription
1 SCXML State Chart XML Previously, in this course...
2 Previously, in this course... Running Example all actions omitted wasn t it supposed to help?
3 Previously, in this course... Running Example all actions omitted A simple state is one which has no substructure. A state which has substates (nested states) is called a composite state (or compound state). Substates may be nested to any level. A nested state machine may have at most one initial state and one final state. Substates are used to simplify complex flat state machines by showing that some states are only possible within a particular context (the enclosing state). A composite state factorizes the possible exits from all (most of) the states
4 Previously in this course... Stopwatch A simple state is one which has no substructure. A state which has substates (nested states) is called a composite state (or compound state). Substates may be nested to any level. A nested state machine may have at most one initial state and one final state. Substates are used to simplify complex flat state machines by showing that some states are only possible Taken and modified from within a particular context (the enclosing state). A composite state factorizes the possible exits from all (most of) the states
5 Previously, in this course... History state Deep or shallow... <history> <history> allows allows for for pause pause and and resume resume semantics semantics in in compound compound states.. Before Before the the state state machine machine exits exits aa compound compound state, state, itit records records the the state's state's active active descendants. descendants. IfIf the the 'type' 'type' attribute attribute of of the the <history> <history> state state is is set set to to "deep", "deep", the the state state machine machine saves saves the the state's state's full full active active descendant descendant configuration, configuration, down down to to the the atomic atomic descendant(s). descendant(s). IfIf 'type' 'type' is is set set to to "shallow", "shallow", the state machine remembers only which immediate child was active. After that, if a the state machine remembers only which immediate child was active. After that, if a transition transition takes takes aa <history> <history> child child of of the the state state as as its its target, target, the the state state machine machine re-enters re-enters not not only only the the parent parent compound compound state state but but also also the the state(s) state(s) in in the the saved saved configuration. configuration. Thus Thus aa transition transition with with aa deep deep history history state state as as its its target target returns returns to to exactly exactly where where the the state state was was when when itit was was last last exited, exited, while while aa transition transition with with aa shallow shallow history history state state as as aa target target re-enters re-enters the the previously previously active active child child state, state, but but will will enter enter the the child's child's default default initial initial state state (if (if the the child child is is itself itself compound.). compound.).
6 TD stopwatch and hierarchy! revisited
7 TD stopwatch and hierarchy! revisited
8 TD stopwatch and hierarchy! revisited Est-ce correct?
9 TD stopwatch and hierarchy! revisited
10 TD stopwatch and hierarchy! Composite states are also named OR-states since, if the machine is in the StopWatchMode, then it can be in the ready substate, OR the stopped substate OR the TimePassing substate I believe this can be missleading...
11 SCXML State Chart XML Parallel regions, communications and a little bit more
12 State Charts David Harel Statecharts: A visual formalism for complex systems Science of computer programming 8 (3),
13 Parallel states Also named Orthogonal regions in UML or AND-States (Since after initialization, the machine is in substate State_2_1 AND State_3_1.) Everything is working as if State_2 and State_3 were independent. When the machine is in a parallel state, all event received are broadcasted to all the parallel states. They can consume them or not like any normal state machine
14 Parallel states external queue external queue Also named Orthogonal regions in UML or AND-States (Since after initialization, the machine is in substate State_2_1 AND State_3_1.) Everything is working as if State_2 and State_3 were independent. When the machine is in a parallel state, all event received are broadcasted to all the parallel states. They can consume them or not like any normal state machine
15 Parallel states The Cartesian product of the states allows for sequential equivalence of the input language but warning about the actions, i.e., the behavior of the system!! By using parallel states, the complexity in number of state is the sum of the number of states in each parallel states while otherwise it is the product of them (if we add another parallel state with 3 states, the sequential result have 12 states)
16 Parallel states Other representations and naming: UML From Charles André s slides
17 Parallel states Other representations and naming: UML From Charles André s slides UML syntax is more complex than scxml since no reuse is done (e.g., about the datamodel)
18 Parallel states Yet another representation and naming concurrent substates specify two or more state machines that execute in parallel in the context of the enclosing object Execution of these concurrent substates continues in parallel. These substates waits for each other to finish to joins back into one flow A nested concurrent state machine does not have an initial, final, or history state Mix with the vocabulary from activity diagrams
19 Parallel states Yet another representation and naming concurrent substates specify two or more state machines that execute in parallel in the context of the enclosing object Execution of these concurrent substates continues in parallel. These substates waits for each other to finish to joins back into one flow A nested concurrent state machine does not have an initial, final, or history state Mix with the vocabulary from activity diagrams
20 Parallel states Parallel Parallel States: States: The The child child states states execute execute in in parallel parallel in in the the sense sense that that any any event event that that is is processed processed is is processed processed in in each each child child state state independently, independently, and and each each child child state state may may take take aa different different transition transition in in response response to to the the event. event. (Similarly, (Similarly, one one child child state state may may take take aa transition transition in in response response to to an an event, event, while while another another child child ignores ignores it.) it.) When When all all of of the the children children reach reach final final states, states, the the <parallel> <parallel> element element itself itself is is considered considered to to be be in in aa final final state, state, and and aa completion completion event event done.state.id done.state.id is is generated, generated, where where id id is is the the id id of of the the <parallel> <parallel> element. element. Transitions within the individual Transitions within the individual child child elements elements operate operate normally. normally. However However whenever whenever aa transition transition is is taken taken with with aa target target outside outside the the <parallel> <parallel> element, element, the the <parallel> <parallel> element element and and all all of of its its child child elements elements are are exited exited and and the the corresponding corresponding <onexit> <onexit> handlers handlers are are executed. executed. The The handlers handlers for for the the child child elements elements execute execute first, first, in in document document order, order, followed followed by by those those of of the the parent parent <parallel> <parallel> element, element, followed followed by by an an action action expression expression in in the the <transition> <transition> element, element, and and then then the the <onentry> <onentry> handlers handlers in in the the "target" "target" state. state. Note Note that that the the semantics semantics of of the the <parallel> <parallel> element element does does not not call call for for multiple multiple threads threads or or truly truly concurrent concurrent processing. processing. The The children children of of <parallel> <parallel> execute execute in in parallel parallel in in the the sense sense that that they they are are all all simultaneously simultaneously active active and and each each one one independently independently selects selects transitions transitions for for any any event event that that is is received. received. However, However, the the parallel parallel children children process process the the event event in in aa defined, defined, serial serial order, order, so so no no conflicts conflicts or or race race conditions conditions can can occur. occur. See See D D Algorithm Algorithm for for SCXML SCXML Interpretation Interpretation for for aa detailed detailed description description of of the the semantics semantics of of <parallel> <parallel> and and the the rest rest of of SCXML. SCXML.
21 Parallel states Parallel Parallel States: States: The The child child states states execute execute in in parallel parallel in in the the sense sense that that any any event event that that is is processed processed is is processed processed in in each each child child state state independently, independently, and and each each child child state state may may take take aa different different transition transition in in response response to to the the event. event. (Similarly, (Similarly, one one child child state state may may take take aa transition transition in in response response to to an an event, event, while while another another child child ignores ignores it.) it.) When When all all of of the the children children reach reach final final states, states, the the <parallel> <parallel> element element itself itself is is UML: considered considered to to be be in in aa final final state, state, and and aa completion completion event event done.state.id done.state.id is is generated, generated, where where id id is is the id <parallel> Even regions imply independence of execution (allowing more or less thethough id of of the theorthogonal <parallel> element. element. Transitions the child elements However whenever aa transition Transitions within within the individual individual child does elements operate normally. normally. Howeverthread whenever transition concurrency), the UML specification not operate require that a separate of execution is aa target outside <parallel> element, and of child is taken taken with with target outside the the <parallel> element, the <parallel> element and all all fact, of its itsmost child be assigned to each orthogonal region (although thisthe can<parallel> be doneelement if desired). In elements elements are are exited exited and and the the corresponding corresponding <onexit> <onexit> handlers handlers are are *executed. executed. The The handlers handlers for for the the commonly, orthogonal regions execute within the same thread. The UML specification child child elements elements execute execute first, first, in in document document order, order, followed followed by by those those of of the the parent parent <parallel> <parallel> requires only that the not rely particular order for instances to element, followed by an expression in the <transition> element, and then element, followed bydesigner an action actiondoes expression in on theany <transition> element, andevent then the the <onentry> <onentry> handlers state. be dispatched to "target" the relevant handlers in in the the "target" state. orthogonal regions. Note Note that that the the semantics semantics of of the the <parallel> <parallel> element element does does not not call call for for multiple multiple threads threads or or truly truly concurrent concurrent processing. processing. The The children children of of <parallel> <parallel> execute execute in in parallel parallel in in the the sense sense that that they they are are all all simultaneously simultaneously active active and and each each one one independently independently selects selects transitions transitions for for any any event event that that is is received. received. However, However, the the parallel parallel children children process process the the event event in in aa defined, defined, serial serial order, order, so so no no conflicts conflicts or or race race conditions conditions can can occur. occur. See See D D Algorithm Algorithm for for SCXML SCXML Interpretation Interpretation for for aa detailed detailed description description of of the the semantics semantics of of <parallel> <parallel> and and the the rest rest of of SCXML. SCXML. * Douglass, Bruce Powel (1999). Doing Hard Time: Developing Real-Time Systems with UML, Objects, Frameworks, and Patterns. Addison Wesley. p ISBN
22 SCXML State Chart XML Parallel regions, communications and a little bit more
23 State Charts David Harel Statecharts: A visual formalism for complex systems Science of computer programming 8 (3),
24 Communication: intuition Usually, parallel states are not truly independent. The different state machines can communicate through different mechanism (e.g., shared variable or timings) to synchronize their behaviors. The most common way to coordinate behaviors from parallel states is by sending events to each others. /ping /pong onentry: send dopong after 1s
25 Communication: intuition Usually, parallel states are not truly independent. The different state machines can communicate through different mechanism (e.g., shared variable or timings) to synchronize their behaviors. The most common way to coordinate behaviors from parallel states is by sending events to each others. /ping /pong onentry: send dopong after 1s
26 Communication: intuition Usually, parallel states are not truly independent. The different state machines can communicate through different mechanism (e.g., shared variable or timings) to synchronize their behaviors. The most common way to coordinate behaviors from parallel states is by sending events to each others. /ping /pong onentry: send dopong after 1s
27 Communication: intuition The coordination between the parallel states can reduce the resulting behavior /ping /pong onentry: send dopong after 1s
28 Communication: intuition The coordination between the parallel states can reduce the resulting behavior /ping /pong onentry: send dopong after 1s onentry: send dopong after 1s
29 Communication: intuition The coordination between the parallel states can reduce the resulting behavior /ping If ping or pong is not sent from the outside! /pong onentry: send dopong after 1s onentry: send dopong after 1s
30 SCXML State Chart XML Parallel regions, communications and a little bit more
31 No target transition IfIf the the 'target' 'target' on on aa <transition> <transition> is is omitted, omitted, then then the the value value of of 'type' 'type' does does not not have have any any effect effect and and taking taking the the transition transition does does not not change change the the state state configuration configuration but but does does invoke invoke the the executable executable content content that that is is included included in in the the transition. transition. Note Note that that this this is is different different from from aa <transition> <transition> whose whose 'target' 'target' is is its its source source state. state. In In the the latter latter case, case, the the state state is is exited exited and and reentered, reentered, triggering triggering execution execution of of its its <onentry> <onentry> and and <onexit> <onexit> executable executable content content
32 Raise vs send / send action1 / send action2 / raise in2 / send action2 The The <raise> <raise> element element raises raises an an event event in in the the current current SCXML SCXML session. session. Note Note that that the the event event will will not not be be processed processed until until the the current current block block of of executable executable content content has has completed completed and and all all events events that that are are already already in in the the internal internal event event queue queue have have been been processed. processed. For For example, example, suppose suppose the the <raise> <raise> element element occurs occurs first first in in the the <onentry> <onentry> handler handler of of state state S S followed followed by by executable executable content content elements elements ec1 ec1 and and ec2. ec2. IfIf event event e1 e1 is is already already in in the the internal internal event event queue queue when when S S is is entered, entered, the the event event generated generated by by <raise> <raise> will will not not be be processed processed until until ec1 ec1 and and ec2 ec2 have have finished finished execution execution and and e1 e1 has has been been processed. processed. <send> <send> is is used used to to send send events events and and data data to to external external systems, systems, including including external external SCXML SCXML Interpreters, Interpreters, or or to to raise raise events events in in the the current current SCXML SCXML session. session.
33 Datamodel It is possible to add data and data manipulation directly inside the state machine. SCXML supports the ecmascript data model (and some sort of C++ in Qt Creator) Usually*, only data directly associated with the control is used in the state machine To avoid mixing the application logic between the code and the state chart To ease the V&V activities * it strongly depends on what the state chart is used for but it seems to be a good practice, even for understanding
34 Datamodel When ecmascript data model is used, the log expr must not be null and it must conform the ecmascript syntax otherwise no log is printed
35 Datamodel Variables are declared and initialized in a specific section id: The name of the data item. See 3.14 IDs for details. src: Gives the location from which the data object should be fetched. See Legal Data Values and Value Expressions for details. expr: Evaluates to provide the value of the data item. See Legal Data Values and Value Expressions for details.
36 Datamodel Variables are declared and initialized in a specific section id: The name of the data item. See 3.14 IDs for details. src: Gives the location from which the data object should be fetched. See Legal Data Values and Value Expressions for details. expr: Evaluates to provide the value of the data item. See Legal Data Values and Value Expressions for details.
37 Datamodel Label is any string and expr any legal ecmascript expression (if no expression, needs to be )
38 Datamodel
39 Datamodel What do you think?
40 Guarded transition cond: is evaluated afer each micro step and fred hen the conditon holds
41 Guarded transition
42 Guarded transition QtCreator and SCXML more generally consider the time to be the physical wall clock time. It is obviously not the case for all timed (and critical) systems for which symbolic reasoning is done
SCXML State Chart XML
SCXML State Chart XML Previously, in this course... Previously, in this course... Running Example all actions omitted wasn t it supposed to help? Previously, in this course... Running Example all actions
More informationSCXML. Michael Bodell.
SCXML Michael Bodell bodell@tellme.com Prologue (VXML 2.0/2.1) VoiceXML 2.0/2.1 is a standard out of the Voice Browser Working Group of the W3C VXML is to networked phone browsers as HTML is to internet
More informationSTATE MACHINES. Figure 1: State Machines
STATE MACHINES Figure 1: State Machines state machine A state machine is a behavior that specifies the sequences of states an object goes through during its lifetime in response to events. Graphically,
More informationUnified Modeling Language 2
Unified Modeling Language 2 State machines 109 History and predecessors 1950 s: Finite State Machines Huffmann, Mealy, Moore 1987: Harel Statecharts conditions hierarchical (and/or) states history states
More informationSCXML Overview. Jim Barnett. Genesys
SCXML Overview Jim Barnett Genesys Multimodal Applications Are: Unpredictable Don t know what user will do next Procedural languages a bad choice Event processing is the paradigm Stateful What does cancel
More informationVoice Browser Working Group (VBWG) Input on application backplane topics. Scott McGlashan (HP) Rafah Hosn (IBM)
Voice Browser Working Group (VBWG) Input on application backplane topics Scott McGlashan (HP) Rafah Hosn (IBM) W3C Backplane Meeting, Amsterdam, November 2006 Agenda Key points VBWG specifications Data-Flow-Presentation
More informationIngegneria del Software Corso di Laurea in Informatica per il Management
Ingegneria del Software Corso di Laurea in Informatica per il Management UML: State machine diagram Davide Rossi Dipartimento di Informatica Università di Bologna State machine A behavioral state machine
More informationCombined Modeling and Programming with State Machines
Combined Modeling and Programming with State Machines Kjetil Andresen Master s Thesis Spring 2014 Combined Modeling and Programming with State Machines Kjetil Andresen 1st May 2014 ii Abstract As part
More informationExercise Unit 2: Modeling Paradigms - RT-UML. UML: The Unified Modeling Language. Statecharts. RT-UML in AnyLogic
Exercise Unit 2: Modeling Paradigms - RT-UML UML: The Unified Modeling Language Statecharts RT-UML in AnyLogic Simulation and Modeling I Modeling with RT-UML 1 RT-UML: UML Unified Modeling Language a mix
More informationObject-Oriented Modeling. State Machine Diagram. Slides accompanying Version 1.0
Object-Oriented Modeling State Machine Diagram Slides accompanying UML@Classroom Version 1.0 Business Informatics Group Institute of Software Technology and Interactive Systems Vienna University of Technology
More informationThirty one Problems in the Semantics of UML 1.3 Dynamics
Thirty one Problems in the Semantics of UML 1.3 Dynamics G. Reggio R.J. Wieringa September 14, 1999 1 Introduction In this discussion paper we list a number of problems we found with the current dynamic
More informationCA314 Object Oriented Analysis & Design - 7. File name: CA314_Section_07_Ver01 Author: L Tuohey No. of pages: 16
CA314 Object Oriented Analysis & Design - 7 File name: CA314_Section_07_Ver01 Author: L Tuohey No. of pages: 16 Table of Contents 7. UML State & Activity Diagrams (see ref 1, Chap. 11, 12)...3 7.1 Introduction...3
More informationvisualstate Reference Guide
COPYRIGHT NOTICE Copyright 2000 2014 IAR Systems AB. No part of this document may be reproduced without the prior written consent of IAR Systems. The software described in this document is furnished under
More informationEmbedded Systems. Problem 1: Getting started with STATEFLOW. Starting STATEFLOW
Prof. Bernd Finkbeiner, Ph.D. Winter term 2008/2009 Dipl.-Inf. Rüdiger Ehlers Problem Set 2 Dipl.-Inf.Hans-Jörg Peter Due: Thursday,6 th November 2008 Michael Gerke, B.Sc. Embedded Systems STATEFLOW is
More informationFinite State Machine Modeling for Software Product Lines. Finite State Machines and Statecharts
SWE 721 / IT 821 Advanced Software Design: Reusable Software Architectures Finite State Machine Modeling for Software Product Lines Hassan Gomaa Department of Information and Software Engineering George
More informationUNIVERSITY OF OSLO Department of Informatics. Exploration of UML State Machine implementations in Java. Master thesis. Morten Olav Hansen
UNIVERSITY OF OSLO Department of Informatics Exploration of UML State Machine implementations in Java Master thesis Morten Olav Hansen February 15, 2011 Contents 1 Introduction 8 1.1 Motivation...............................
More informationStatecharts 1.- INTRODUCTION 1.- INTRODUCTION
Statecharts INDEX 1.- Introduction 2.- When to use Statecharts 3.- Basic components 4.- Connectors and compound transitions Mª Ángeles Martínez Ibáñez University of Bergen Selected topics in programming
More informationLecture 16: Hierarchical State Machines II
Software Design, Modelling and Analysis in UML Lecture 6: Hierarchical State Machines II 206-0-9 6 206-0-9 main Prof. Dr. Andreas Podelski, Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany
More informationState Machine Diagrams
State Machine Diagrams Introduction A state machine diagram, models the dynamic aspects of the system by showing the flow of control from state to state for a particular class. 2 Introduction Whereas an
More informationUNIT-4 Behavioral Diagrams
UNIT-4 Behavioral Diagrams P. P. Mahale Behavioral Diagrams Use Case Diagram high-level behaviors of the system, user goals, external entities: actors Sequence Diagram focus on time ordering of messages
More informationIT 540 Operating Systems ECE519 Advanced Operating Systems
IT 540 Operating Systems ECE519 Advanced Operating Systems Prof. Dr. Hasan Hüseyin BALIK (3 rd Week) (Advanced) Operating Systems 3. Process Description and Control 3. Outline What Is a Process? Process
More informationEmbedded System Design and Modeling EE382V, Fall 2008
Embedded System Design and Modeling EE382V, Fall 2008 Lecture Notes 3 The SpecC System-Level Design Language Dates: Sep 9&11, 2008 Scribe: Mahesh Prabhu Languages: Any language would have characters, words
More informationTransactum Business Process Manager with High-Performance Elastic Scaling. November 2011 Ivan Klianev
Transactum Business Process Manager with High-Performance Elastic Scaling November 2011 Ivan Klianev Transactum BPM serves three primary objectives: To make it possible for developers unfamiliar with distributed
More informationMeltem Özturan
Meltem Özturan www.mis.boun.edu.tr/ozturan/samd 1 2 Modeling System Requirements Object Oriented Approach to Requirements OOA considers an IS as a set of objects that work together to carry out the function.
More informationSpecification and design of distributed embedded middleware applications with SDL Dr. Eckhardt Holz. Humboldt-Universität zu Berlin
Specification and design of distributed embedded middleware applications with SDL-2000 Dr. Eckhardt Holz Humboldt-Universität zu Berlin SDL-2000 ITU-T Specification and Description Language graphical language
More informationComposition of State Machines
Chapter 5 Composition of State Machines Hongwei Zhang http://www.cs.wayne.edu/~hzhang/ Ack.: this lecture is prepared in part based on slides of Lee, Sangiovanni-Vincentelli, Seshia. Outline Concurrent
More informationInteractions A link message
Interactions An interaction is a behavior that is composed of a set of messages exchanged among a set of objects within a context to accomplish a purpose. A message specifies the communication between
More informationSubject: Scheduling Region Questions and Problems of new SystemVerilog commands
Subject: Scheduling Region Questions and Problems of new SystemVerilog commands I have read and re-read sections 14-17 of the SystemVerilog 3.1 Standard multiple times and am still confused about exactly
More informationActor-eUML for Concurrent Programming
Actor-eUML for Concurrent Programming Kevin Marth and Shangping Ren Illinois Institute of Technology Department of Computer Science Chicago, IL USA martkev@iit.edu Abstract. The advent of multi-core processors
More information4: Specifying State-based Behavior With UML Statechart Diagrams
Outline UML Design Supplement 4: Specifying State-based Behavior With UML Statechart Diagrams Introduction to Statecharts Statechart building blocks States Transitions Advanced Characteristics Composite
More informationCopyright 2007 Ramez Elmasri and Shamkant B. Navathe. Slide 27-1
Slide 27-1 Chapter 27 XML: Extensible Markup Language Chapter Outline Introduction Structured, Semi structured, and Unstructured Data. XML Hierarchical (Tree) Data Model. XML Documents, DTD, and XML Schema.
More information6.001 Notes: Section 8.1
6.001 Notes: Section 8.1 Slide 8.1.1 In this lecture we are going to introduce a new data type, specifically to deal with symbols. This may sound a bit odd, but if you step back, you may realize that everything
More informationRemote Control. IMMS.de
Remote Control Statecharts Kurzdefinition [Harel88]: Statecharts = state-diagrams + depth + orthogonality + broadcast communication Statecharts Elements (1) Events (e.g. txt)» Typeless» no value (it exists
More informationUnit 20: Extensions in ActiveBPEL
Unit 20: Extensions in ActiveBPEL BPEL Fundamentals This is Unit #20 of the BPEL Fundamentals course. In past Units we ve looked at ActiveBPEL Designer, Workspaces and Projects, created the Process itself
More informationUML 2.0 State Machines
UML 2.0 State Machines Frederic.Mallet@unice.fr Université Nice Sophia Antipolis M1 Formalisms for the functional and temporal analysis With R. de Simone Objectives UML, OMG and MDA Main diagrams in UML
More informationIntroduction to Software Engineering. 6. Modeling Behaviour
Introduction to Software Engineering 6. Modeling Behaviour Roadmap > Use Case Diagrams > Sequence Diagrams > Collaboration (Communication) Diagrams > Activity Diagrams > Statechart Diagrams Nested statecharts
More informationStates Transitions Connectors Esterel Studio
Time in Differences SyncCharts differ from other implementations of : Synchronous framework Determinism Compilation into backend language Esterel No interpretation for simulations No hidden behaviour Multiple
More informationStatecharts and Class Diagram XML A general-purpose textual modelling formalism
Statecharts and Class Diagram XML A general-purpose textual modelling formalism Glenn De Jonghe Supervisor: Prof. Dr. Hans Vangheluwe Faculty of Science University of Antwerp Antwerp, Belgium March 1,
More informationFlexFlow: Workflow for Interactive Internet Applications
FlexFlow: Workflow for Interactive Internet Applications Rakesh Mohan, Mitchell A. Cohen, Josef Schiefer {rakeshm, macohen, josef.schiefer}@us.ibm.com IBM T.J. Watson Research Center PO Box 704 Yorktown
More informationFinite State Machines and Statecharts
Finite State Machines and Statecharts Hassan Gomaa Dept of Information & Software Engineering George Mason University Reference: H. Gomaa, Chapter 10 - Designing Concurrent, Distributed, and Real-Time
More informationNAME CHSM-C++ Concurrent, Hierarchical, Finite State Machine specification language for C++
NAME CHSM-C++ Concurrent, Hierarchical, Finite State Machine specification language for C++ SYNOPSIS declarations description user-code DESCRIPTION The CHSM specification language is a text-based means
More informationSpecifications Part 1
pm3 12 Specifications Part 1 Embedded System Design Kluwer Academic Publisher by Peter Marwedel TU Dortmund 2008/11/15 ine Marwedel, 2003 Graphics: Alexandra Nolte, Ges Introduction 12, 2008-2 - 1 Specification
More informationToday s Topics. u Thread implementation. l Non-preemptive versus preemptive threads. l Kernel vs. user threads
Today s Topics COS 318: Operating Systems Implementing Threads u Thread implementation l Non-preemptive versus preemptive threads l Kernel vs. user threads Jaswinder Pal Singh and a Fabulous Course Staff
More informationStatecharts Based GUI Design. Statecharts Based GUI Design
Chenliang Sun csun1@cs.mcgill.ca School of Computer Science McGill University March 5, 2003 1.1 Overview What s GUI? Why GUI? Why Statechart Based GUI Design? What s Statechart? How? Case Study Testing
More informationStateflow Best Practices By Michael Burke
Stateflow Best Practices By Michael Burke 2012 The MathWorks, Inc. 1 Topics Background Overview of terms Readability Stateflow hierarchy Modeling tips Basic rules: MAAB style guide 2 Background Objective
More informationIntroduction to OpenMP. Tasks. N.M. Maclaren September 2017
2 OpenMP Tasks 2.1 Introduction Introduction to OpenMP Tasks N.M. Maclaren nmm1@cam.ac.uk September 2017 These were introduced by OpenMP 3.0 and use a slightly different parallelism model from the previous
More informationJSON & MongoDB. Introduction to Databases CompSci 316 Fall 2018
JSON & MongoDB Introduction to Databases CompSci 316 Fall 2018 2 Announcements (Tue. Oct. 30) Homework #3 due next Tuesday Project milestone #2 due next Thursday See email about new requirement on weekly
More informationA state-based 3-way batch merge algorithm for models serialized in XMI
A state-based 3-way batch merge algorithm for models serialized in XMI Aron Lidé Supervisor: Lars Bendix Department of Computer Science Faculty of Engineering Lund University November 2011 Abstract With
More informationOracle PL/SQL - 12c & 11g [Basic PL/SQL & Advanced PL/SQL]
Chapter Overview of PL/SQL Programs Control Statements Using Loops within PLSQL Oracle PL/SQL - 12c & 11g [Basic PL/SQL & Advanced PL/SQL] Table of Contents Describe a PL/SQL program construct List the
More informationŁabiak G., Miczulski P. (IIE, UZ, Zielona Góra, Poland)
UML STATECHARTS AND PETRI NETS MODEL COMPARIS FOR SYSTEM LEVEL MODELLING Łabiak G., Miczulski P. (IIE, UZ, Zielona Góra, Poland) The system level modelling can be carried out with using some miscellaneous
More informationReview -Chapter 4. Review -Chapter 5
Review -Chapter 4 Entity relationship (ER) model Steps for building a formal ERD Uses ER diagrams to represent conceptual database as viewed by the end user Three main components Entities Relationships
More informationCAMEO SIMULATION TOOLKIT. version 1.0. user guide
CAMEO SIMULATION TOOLKIT version 1.0 user guide No Magic, Inc. 2011 All material contained herein is considered proprietary information owned by No Magic, Inc. and is not to be shared, copied, or reproduced
More informationECE 242 Data Structures and Algorithms. Trees IV. Lecture 21. Prof.
ECE 22 Data Structures and Algorithms http://www.ecs.umass.edu/~polizzi/teaching/ece22/ Trees IV Lecture 2 Prof. Eric Polizzi Summary previous lectures Implementations BST 5 5 7 null 8 null null 7 null
More informationOMG Modeling Glossary B
OMG Modeling Glossary B This glossary defines the terms that are used to describe the Unified Modeling Language (UML) and the Meta Object Facility (MOF). In addition to UML and MOF specific terminology,
More information2.2 Syntax Definition
42 CHAPTER 2. A SIMPLE SYNTAX-DIRECTED TRANSLATOR sequence of "three-address" instructions; a more complete example appears in Fig. 2.2. This form of intermediate code takes its name from instructions
More informationNAME CHSM-Java Concurrent, Hierarchical, Finite State Machine specification language for Java
NAME CHSM-Java Concurrent, Hierarchical, Finite State Machine specification language for Java SYNOPSIS declarations description user-code DESCRIPTION The CHSM specification language is a text-based means
More informationTcl/Tk lecture. What is the Wish Interpreter? CIS 410/510 User Interface Programming
Tcl/Tk lecture CIS 410/510 User Interface Programming Tool Command Language TCL Scripting language for developing & using GUIs Allows generic programming variables, loops, procedures Embeddable into an
More informationAn Agent Modeling Language Implementing Protocols through Capabilities
An Agent Modeling Language Implementing Protocols through Capabilities Nikolaos Spanoudakis 1,2 1 Technical University of Crete, Greece nikos@science.tuc.gr Pavlos Moraitis 2 2 Paris Descartes University,
More informationG Programming Languages Spring 2010 Lecture 13. Robert Grimm, New York University
G22.2110-001 Programming Languages Spring 2010 Lecture 13 Robert Grimm, New York University 1 Review Last week Exceptions 2 Outline Concurrency Discussion of Final Sources for today s lecture: PLP, 12
More informationEnterprise Architect - UML Dictionary
Enterprise Architect is an intuitive, flexible and powerful UML analysis and design tool for building robust and maintainable software. This dictionary explains the way in which Enterprise Architect represents
More informationUNIT 5 : Advanced Behavioral Modeling
UNIT 5 : Advanced Behavioral Modeling Syllabus :Events and signals,statemachines,processes and Threads,time and space chart diagrams, Component, Deployment, Component Diagrams and Deployment diagrams Events
More informationConcurrent Models of Computation
Concurrent Models of Computation Edward A. Lee Robert S. Pepper Distinguished Professor, UC Berkeley EECS 219D Concurrent Models of Computation Fall 2011 Copyright 2009-2011, Edward A. Lee, All rights
More informationEnterprise Architect. User Guide Series. UML Models. Author: Sparx Systems. Date: 30/06/2017. Version: 1.0 CREATED WITH
Enterprise Architect User Guide Series UML Models Author: Sparx Systems Date: 30/06/2017 Version: 1.0 CREATED WITH Table of Contents UML Models UML Diagrams UML Structural Models Class Diagram Composite
More informationSummer 2017 Discussion 10: July 25, Introduction. 2 Primitives and Define
CS 6A Scheme Summer 207 Discussion 0: July 25, 207 Introduction In the next part of the course, we will be working with the Scheme programming language. In addition to learning how to write Scheme programs,
More informationTopics in Object-Oriented Design Patterns
Software design Topics in Object-Oriented Design Patterns Material mainly from the book Design Patterns by Erich Gamma, Richard Helm, Ralph Johnson and John Vlissides; slides originally by Spiros Mancoridis;
More informationOverview: Shared Memory Hardware. Shared Address Space Systems. Shared Address Space and Shared Memory Computers. Shared Memory Hardware
Overview: Shared Memory Hardware Shared Address Space Systems overview of shared address space systems example: cache hierarchy of the Intel Core i7 cache coherency protocols: basic ideas, invalidate and
More informationOverview: Shared Memory Hardware
Overview: Shared Memory Hardware overview of shared address space systems example: cache hierarchy of the Intel Core i7 cache coherency protocols: basic ideas, invalidate and update protocols false sharing
More informationCSE 12 Abstract Syntax Trees
CSE 12 Abstract Syntax Trees Compilers and Interpreters Parse Trees and Abstract Syntax Trees (AST's) Creating and Evaluating AST's The Table ADT and Symbol Tables 16 Using Algorithms and Data Structures
More informationThe STATEMATE Semantics of Statecharts
The STATEMATE Semantics of Statecharts DAVID HAREL The Weizmann Institute of Science and AMNON NAAMAD i-logix, Inc. We describe the semantics of statecharts as implemented in the STATEMATE system. This
More informationSignals: Management and Implementation. Sanjiv K. Bhatia Univ. of Missouri St. Louis
Signals: Management and Implementation Sanjiv K. Bhatia Univ. of Missouri St. Louis sanjiv@aryabhat.umsl.edu http://www.cs.umsl.edu/~sanjiv Signals Mechanism to notify processes of asynchronous events
More informationCS5314 RESEARCH PAPER ON PROGRAMMING LANGUAGES
ORCA LANGUAGE ABSTRACT Microprocessor based shared-memory multiprocessors are becoming widely available and promise to provide cost-effective high performance computing. Small-scale sharedmemory multiprocessors
More informationComputer Systems II. First Two Major Computer System Evolution Steps
Computer Systems II Introduction to Processes 1 First Two Major Computer System Evolution Steps Led to the idea of multiprogramming (multiple concurrent processes) 2 1 At First (1945 1955) In the beginning,
More informationCPSC/ECE 3220 Fall 2017 Exam Give the definition (note: not the roles) for an operating system as stated in the textbook. (2 pts.
CPSC/ECE 3220 Fall 2017 Exam 1 Name: 1. Give the definition (note: not the roles) for an operating system as stated in the textbook. (2 pts.) Referee / Illusionist / Glue. Circle only one of R, I, or G.
More informationProcesses and Threads
COS 318: Operating Systems Processes and Threads Kai Li and Andy Bavier Computer Science Department Princeton University http://www.cs.princeton.edu/courses/archive/fall13/cos318 Today s Topics u Concurrency
More informationH2 Spring B. We can abstract out the interactions and policy points from DoDAF operational views
1. (4 points) Of the following statements, identify all that hold about architecture. A. DoDAF specifies a number of views to capture different aspects of a system being modeled Solution: A is true: B.
More informationRelational Databases
Relational Databases Jan Chomicki University at Buffalo Jan Chomicki () Relational databases 1 / 49 Plan of the course 1 Relational databases 2 Relational database design 3 Conceptual database design 4
More informationQt + Maemo development
ES3 Lecture 11 Qt + Maemo development Maemo Nokia's Linux based platform Almost entirely open source Nokia N770, N800, N810, N900 only models Only N900 has 3G/phone capability N900 has relatively fast
More informationRepresenting Control Constructs in Object-Flow Process. Diagrams
1 Representing Control Constructs in Object-Flow Process Diagrams or Peleg and Dov Dori Faculty of Industrial Engineering and anagement Technion Israel Institute of Technology Haifa 32000, Israel {mor,
More informationNeed for synchronization: If threads comprise parts of our software systems, then they must communicate.
Thread communication and synchronization There are two main aspects to Outline for Lecture 19 multithreaded programming in Java: I. Thread synchronization. thread lifecycle, and thread synchronization.
More informationSpring Prof. Hyesoon Kim
Spring 2011 Prof. Hyesoon Kim 2 Warp is the basic unit of execution A group of threads (e.g. 32 threads for the Tesla GPU architecture) Warp Execution Inst 1 Inst 2 Inst 3 Sources ready T T T T One warp
More informationNePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems
NePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems Haris Volos 1, Adam Welc 2, Ali-Reza Adl-Tabatabai 2, Tatiana Shpeisman 2, Xinmin Tian 2, and Ravi Narayanaswamy
More informationC++ for System Developers with Design Pattern
C++ for System Developers with Design Pattern Introduction: This course introduces the C++ language for use on real time and embedded applications. The first part of the course focuses on the language
More informationFigure 4.1: The evolution of a rooted tree.
106 CHAPTER 4. INDUCTION, RECURSION AND RECURRENCES 4.6 Rooted Trees 4.6.1 The idea of a rooted tree We talked about how a tree diagram helps us visualize merge sort or other divide and conquer algorithms.
More informationPerformance Evaluation
Performance Evaluation Chapter 4 A Complicated Queuing System (Acknowledgement: These slides have been prepared by Prof. Dr. Holger Karl) 1 Goal of this chapter! Understand implementation issues and solutions
More informationConcurrent Programming. Alexandre David
Concurrent Programming Alexandre David 1.2.05 adavid@cs.aau.dk Disclaimer Overlap with PSS Threads Processes Scheduling Overlap with MVP Parallelism Thread programming Synchronization But good summary
More informationANSI C CODE SYNTHESIS FOR MLDESIGNER FINITE STATE MACHINES
49. Internationales Wissenschaftliches Kolloquium Technische Universität Ilmenau 27.-30. September 2004 Holger Rath / Horst Salzwedel ANSI C CODE SYNTHESIS FOR MLDESIGNER FINITE STATE MACHINES Abstract
More informationFor 100% Result Oriented IGNOU Coaching and Project Training Call CPD: ,
Q.1 What is Object Orientation? Explain the concept of class, objects, instance, generalization, and associations. Ans :-- In the past, information systems used to be defined primarily by their functionality:
More informationIntroduction to Computer Science and Business
Introduction to Computer Science and Business The Database Programming with PL/SQL course introduces students to the procedural language used to extend SQL in a programatic manner. This course outline
More informationProcess. Program Vs. process. During execution, the process may be in one of the following states
What is a process? What is process scheduling? What are the common operations on processes? How to conduct process-level communication? How to conduct client-server communication? Process is a program
More informationSection 8. The Basic Step Algorithm
Section 8. The Basic Step Algorithm Inputs The status of the system The current time A list of external changes presented by the environment since the last step Comments Scheduled action appears in the
More informationBISS 2013: Simulation for Decision Support
BISS 2013: Simulation for Decision Support Lecture 18 Discrete Event Modelling and Simulation in AnyLogic (Practice) Peer-Olaf Siebers (Nottingham University) Stephan Onggo (Lancaster University) pos@cs.nott.ac.uk
More informationBehavior Programming Language and Automated Code Generation for Agent Behavior Control
Behavior Programming Language and Automated Code Generation for Agent Behavior Control Thuc Vu, Manuela Veloso tdv@andrew.cmu.edu, mmv@cs.cmu.edu Carnegie Mellon University 5000 Forbes Avenue Pittsburgh,
More informationSoftware Design and Analysis for Engineers
Software Design and Analysis for Engineers by Dr. Lesley Shannon Email: lshannon@ensc.sfu.ca Course Website: http://www.ensc.sfu.ca/~lshannon/courses/ensc251 Simon Fraser University Slide Set: 9 Date:
More informationWhat is a Class Diagram? A diagram that shows a set of classes, interfaces, and collaborations and their relationships
Class Diagram What is a Class Diagram? A diagram that shows a set of classes, interfaces, and collaborations and their relationships Why do we need Class Diagram? Focus on the conceptual and specification
More informationCourse "Softwaretechnik" Book Chapter 2 Modeling with UML
Course "Softwaretechnik" Book Chapter 2 Modeling with UML Lutz Prechelt, Bernd Bruegge, Allen H. Dutoit Freie Universität Berlin, Institut für Informatik http://www.inf.fu-berlin.de/inst/ag-se/ Modeling,
More informationWhat is a Class Diagram? Class Diagram. Why do we need Class Diagram? Class - Notation. Class - Semantic 04/11/51
What is a Class Diagram? Class Diagram A diagram that shows a set of classes, interfaces, and collaborations and their relationships Why do we need Class Diagram? Focus on the conceptual and specification
More informationSoftware Service Engineering
Software Service Engineering Lecture 4: Unified Modeling Language Doctor Guangyu Gao Some contents and notes selected from Fowler, M. UML Distilled, 3rd edition. Addison-Wesley Unified Modeling Language
More informationSpecifying Precise Use Cases with Use Case Charts
Specifying Precise Use Cases with Use Case Charts Jon Whittle Dept of Information & Software Engineering George Mason University 4400 University Drive Fairfax, VA 22030 jwhittle@ise.gmu.edu Abstract. Use
More informationCh 9: Control flow. Sequencers. Jumps. Jumps
Ch 9: Control flow Sequencers We will study a number of alternatives traditional sequencers: sequential conditional iterative jumps, low-level sequencers to transfer control escapes, sequencers to transfer
More informationIn This Lecture You Will Learn: Specifying Control. Statechart. Event, State and Transition
In This Lecture You Will Learn: Specifying Control Lecture 11 How to identify requirements for control in an application How to model object life cycles using statecharts How to develop statechart diagrams
More information