PIU901 PIF101 PIF v supply. +1.2v supply PIC1001 PIC1002 PIC1602 PIC101 PIL202 PIL201. Ground clip pads. Power supply test points, top side

Transcription

1 ate: /0/0 Sheet of File: Z:\ov_ftdi\hardware\power.Schoc rawn y: OTP OTP OTP OTP.v.v v gnd opyrights: -Y-S.0 Patents: pache.0 +.v i Net lass lassname: Power Vusb i Net lass lassname: Power i Net lass lassname: Power Size Number Revision PITP0 PITP0 PITP0 PITP0 +.v +.v +v +v +.v i Net lass lassname: Power i Net lass lassname: Power Power supply test points, top side PITP0 PITP0 PITP70 PITP0 PITP0 PITP00 PITP0 PITP0 OTP OTP OTP7 OTP OTP TPTP0TPTP OTP0 OTP OTP Ground clip pads +.v supply OU +.v +v OUTPUT PIU0 O PIU0 INPUT OUTPUT_ PIU0 PI0 PI70 7 O7 uf uf X7R >=.v PI0 PI70 X7R >=.v TLV7LV PIU0 PIL0 +v.7uf X7R >=.v v supply OL ferrite bead PIL0 PI00 +v OL OU.7uH +.v VIN SW OL 0 PIU0 PIU0 PIL0 PIL0 PIL0 PIL0 OF PIU0 xmm power inductor ferrite bead 00m resettable polyfuse PIU0 EN F PIU0 O PI0 0uF 0 PIF0 PI00 LM70MF-. X7R >=.v 0 O PI0 PIF0 Vusb

2 OM OM OM OM OM OM0 OM OM Screw Screw Screw Screw /a -0 screw /a -0 screw /a -0 screw /a -0 screw /ax/a F/F -0 standoff /ax/a F/F -0 standoff /ax/a F/F -0 standoff /ax/a F/F -0 standoff OM OM OM OM OM OM OM7 OM Screw Screw Screw Screw /a x/a F/M -0 standoff /a x/a F/M -0 standoff /a x/a F/M -0 standoff /a x/a F/M -0 standoff /a -0 screw /a -0 screw /a -0 screw /a -0 screw OH OUF +.v PIU0 VO_0 VUX PIU0 +.v 0 PIU0 VO_0 VUX PIU00 PIH0 PIU0 VO_0 VUX PIU0 OUG VUX PIU PIU00 VO_ VUX PIU00 PIU00 PIU0 OH 7 MHole.mm PIU07 VO_ PIU0 PIU0 PIU0 VO_ VINT PIU0 +.v PIU0 PIU VINT PIU0 PIU00 PIU077 PIU0 VO_ VINT PIU0 PIU0 PIU0 PIH0 PIU0 VO_ VINT PIU0 PIU0 PIU0 VINT PIU0 PIU0 PIU0 VO_ OH MHole.mm PIU0 VO_ XSLX-TQG PIU0 VO_ 0uF 0.uF 0.uF 0.uF 0uF 0.uF 0.uF PIH0 X7R >=.v X7R >=.v X7R >=.v X7R >=.v X7R >=.v X7R >=.v X7R >=.v v OH MHole.mm MHole.mm VccINT PI0 O PI0 O PI00 O0 0 PI0 O PI0 O PI0 0uF 0.uF X7R >=.v X7R >=.v v VccUX 7 PI0 O PI0 0uF 0.uF X7R >=.v X7R >=.v PI0 PI00 PI0 PIH0 PI0 0.uF 0.uF 0.uF X7R >=.v X7R >=.v X7R >=.v PI0 O PI0 O PI0 O PI0 O PI70 O7 PI0 PI0 PI0 PI0 PI70 XSLX-TQG 0.uF 0.uF 0.uF 0.uF X7R >=.v X7R >=.v X7R >=.v X7R >=.v v +.v Vcco_0 PI0 O PI0 Vcco_ PI0 O PI0 PI0 O PI0 O PI0 PI0 0uF 0.uF X7R >=.v X7R >=.v PI0 O PI0 PI0 O PI0 O PI0 O PI0 O PI0 O PI0 O PI0 O 0.uF 0.uF X7R >=.v X7R >=.v Size +.v +.v Vcco_ PI70 7 O7 PI70 Vcco_ PI0 O PI0 O PI0 PI0 PI0 PI0 PI0 PI0 PI0 PI0 PI0 0uF 0.uF X7R >=.v X7R >=.v uF 0.uF X7R >=.v X7R >=.v opyrights: -Y-S.0 Patents: pache.0 Number Revision ate: /0/0 Sheet of File: Z:\ov_ftdi\..\FPG power v.schoc rawn y:

3 i i ate: /0/0 Sheet of File: Z:\ov_ftdi\..\RM and target US.Schocrawn y: PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 0.uF X7R >=.v 00 0.uF 0.uF X7R >=.v X7R >=.v VSS VSS VSS Size Number Revision PI00 PI0 PI0 NLRM00 RM_0 0 Q0 NLRM00 RM_0 PIU0 PIU0 NLRM0 RM_ RM_ PIU0 Q NLRM0 NLRM0 PIU0 RM_ RM_ PIU0 Q NLRM0 NLRM0 PIU0 RM_ 7 RM_ PIU0 Q +.v Vcco_0 NLRM0 NLRM0 PIU07 RM_ RM_ PIU0 Q NLRM0 NLRM0 PIU0 RM_ 0 0 Q NLRM0 RM_ PIU00 PIU00 7 NLRM0 PI70 O7 PI0 O PI0 O PI0 O RM_ RM_ PIU0 Q NLRM07 NLRM0 PIU0 RM_7 RM_7 PIU0 7 Q7 NLRM0 NLRM07 PIU0 PI70 PI0 PI0 PI0 RM_ RM_ PIU0 Q NLRM0 NLRM0 PIU0 RM_ RM_ 0.uF uf 0.uF uf Q NLRM0 PIU0 PIU0 NLRM00 RM_0 RM_0 X7R >=.v X7R >=.v X7R >=.v X7R >=.v PIU0 0 Q0 NLRM0 NLRM00 PIU0 RM_ 7 RM_ PIU0 Q NLRM0 NLRM0 PIU07 RM_ RM_ Q NLRM0 PIU0 PIU0 +.v Vcco_ 0 RM_ Q NLRM0 PIU00 NLRM00 RM_0 0 RM_ opyrights: -Y-S.0 Patents: pache.0 PIU00 0 Q PI00 O0 0 PI0 O PI0 NLRM0 NLRM0 PIU0 O RM_ RM_ PIU0 Q NLRM0 PIU0 NLRM0KE RM_KE 7 or WGJH-I PIU07 NLRM0LK KE RM_LK or SMS-7TN PINT0 NT PINT0 PIU0 LK NLRM0\\S\0 RM_S0 ONT 0 PIU0 S N PIU00 NLRM0WE# RM_WE# PIU0 WE NLRM0\\\S RM_S 7 RM_QML PIU07 S QML NLRM0QML NLRM0\R\\S0HSWPEN PIU0 RM_RS_HSWPEN RM_QMH PIU0 RS QMH NLRM0QMH PIU0 V V V VQ VQ VQ VQ optional RM clk termination 7 OU MTLMP-7 +.v PIU0 PIU0 PIU07 PIU0 PIU0 PIU0 PIU0 lassname: Power +.v local.v local.v +.v OU Net lass PIU0 targetulpi_0 VT T0 OJ i PI0 PI0 PI0 NLtargetULPI00 PIU0 targetulpi_ local.v V T O O O NLtargetULPI0 PIU0 PIU0 NLtargetVUS targetulpi_ VUS v PIU0 VIO T target_n PI0 00 PI0 PI0 NLtargetULPI0 PIJ0 PIU0 7 targetulpi_ - uf uf T NLtargetULPI0 PIJ0 PIU07 target_p uf targetulpi_ + O O X7R >=.v X7R >=.v local.v V T NLtargetULPI0 PIJ0 PIJ0 PIU0 PIU0 PI0 PI0 X7R >=.v 0 targetulpi_ 00 0.uF uf 00 T OR NLtargetULPI0 PIJ0 PIJ0 PIU00 7 targetulpi_ X7R >=.v X7R >=.v targetvus PIU07 VUS T 7-0LF PI0 PI0 NLtargetULPI0 PIR0 PIR0PIU07 PIU0 0K 00 targetulpi_7 T7 OP NLtargetULPI07 PIU0 targetulpi_rst targetulpi_stp target_n targetulpi_stp M STP NLtargetULPI0STP PIP0 PIP0 PIU0 PIU0 NLJ0shield targetulpi_ir targetulpi_lk target_p targetulpi_nxt J_shield PIP0 PIP0 P NXT PI0 targetulpi_nxt targetulpi_0 targetulpi_ir IR targetulpi_ targetulpi_ OTP NLtargetULPI0IR NLtargetULPI0NXT PIU0 PIU0 PIP0 PIP0 PIU0 O PIP07 7 PIP0 X7R >=.v targetulpi_ targetulpi_ O NLtargetI PI0 targetulpi_lk 0.uF 00 0 I LKOUT NLtargetULPI0LK PIP0 PIP00 PI0 PI0 PITP0 PIU0 PIU0 targetulpi_ targetulpi_ X7R >=.v PIP0 PIP0 targetulpi_7 00 targetvus PIP0 PIP0 OY 0.uF 0 OTP OR PIU00 XO Header 7X PIR0 PIR0 PIY0 PIY0 PIU0 OJ REFLK/XI RIS PIU0 PITP0 NP (0) 0 PIR0 MHz targetulpi_rst OR VUS RESET PIU0 target_n.0k% - OR target_p US PIR0 00 NLJ0shield NLtargetULPI0RST PIJ0 PIU0 PIJ0 PIP0 PIP0 PIR0 PIJ0 + PIJ0 PI0 PIR0 M 00 PI0 PIJ0 PIJ0 O O E7--00 PI0 pf PI0 pf OP PI0 urrent measurement lassname: US lassname: US O targettap_n NLtargettap0N OR target_n NLtarget0N Net lass PIR0 PIR0 i Net lass PI uF 00 K X7R >=.v targettap_p NLtargettap0P OR target_p NLtarget0P Net lass PIR0 PIR0 i Net lass 00 lassname: US K lassname: US J_shield

4 OU 70 IO_LP_LK_ NLLK OU PIU070 IO_LP_ IO_LN_M0_MPMISO_ NLM0 Signals used during FPG configuration RM_ NLRM0 PIU0 (see XPP0): RM_ IO_LN_VREF_ NLRM0 +.v OR LE0 NLLE0 PIU0 PIU0 7 SW 0-7 RM_ 0 00 red 00 IO_LP_MPLK_ OTP IO_LP_ NLRM0 PIR0 PIR0 PIL0 PIL0 PIU07 IO_LN_MPMOSI_ NLUS PIU0 PIU0 PITP0 SI_, RWR_, LK, PROG_, IO_LN_ RM_7 ONE, INIT_, M0, M 0 RM_ La OL IO_LP_0_IN_MISO_MISO_ IO_LP_ IO_LN_MOSI_SI MISO0_ NLSI0 NL0 NLRM07 PIU0 NLRM0 PIU0 PIU00 SI_ RM_ OR7 PIU0 IO_LN_ 7 IO_LP MISO_ NL NLRM0 LE NLLE PIU0 dditional signals used during FIFO RM_ IO_L7P_ NLRM0 PIR70 PIR70 PIL0 PIL0 yel PIU0 IO_LN MISO_ NL PIU PIU0 IO_L7N_ 0 IO_LP_M_ NLM mode: RM_ NLRM0 PIU0 US0 (RXF#) RM_LK IO_LP_GLK7_ NLRM0LK OL PIU00 PIU0 LE US (R#) RM_QMH OR IO_LN_0_ PIU0 IO_LN_GLK_ LE LE US (WR#) RM_ IO_LP IO_LP_GLK_TRY_ NLRM0 NLRM0QMH NLLE PIU0 PIR0 PIR0 PIL0 PIL0 grn PIU0 PIU IO_LN PIU07 LE0 US (LKOUT) IO_LN_GLK_ RM_ RM_KE US (OE#) 7 RM_0 OL IO_L0P_GLK IO_LP_GLK_ IO_L0N_GLK0_USERLK_ NLUS0 NLRM0KE NLRM0 PIU0 NLRM00 PIU0 PIU07 RM_ OR PIU0 IO_LN_GLK_IRY_ IO_LP_GLK NLLKOUT NLRM0 PIU0 spare I/Os: RM_ green IO_LP_GLK_ 0 OR NLRM0 PIR0 PIR0 PIL0 PIL0 PIU0 RM_ IO_LN_GLK0 IO_LN_GLK0_ IO_LP_7_ NL7 NLOSO PIU0 NLRM0 PIU00 PIR0 PIR0 PIU0 RM_ OL 00 PIU0 00 IO_LP_ 7 RWR_ RM_ IO_LN_RWR VREF_ IO_LN_ 0 RM_ IO_LP NL NLRWR0 NLRM0 PIU0 IO_L0P_ NLRM0 NLRM0 PIU07 PIU0 PIU0 RM_ IO_LN NL PIU00 +.v PIU0 IO_L0N_ RM_ IO_LP NL PIU0 IO_LP_ 7 RM_0 PIR0 IO_LN IO_LN_ RM_0 IO_LP NLUS NL NLRM00 NLRM0 NLRM0 PIU0 PIU0 PIU0 PIU07 OR PIU0 IO_LP_ 0 RM_ IO_LN NLUS NLRM00 PIU0 IO_LN_ NLRM0 00 OU PIU00 INIT_ RM_0 0 IO_LP_INIT IO_LP_ RM_S0 IO_LN_SO NLUS NLINIT0 PIU0 PIR0 PIU0 IO_LN_VREF_ NLRM0\\S\0 NLRM00 V OUT NLSPRE PIU0 PIU0 PIU0 PIU0 PIU0 PIU0 EN PIU0 XSLX-TQG XSLX-TQG OU 0 O0 PI00 0MHz RM_RS_HSWPEN IO_LP_HSWPEN_0 RM_S IO_LN_VREF_0 NLRM0\\\S NLRM0\R\\S0HSWPEN PIU0 0.uF PI00 PIU0 RM_WE# X7R >=.v IO_LP_0 NLRM0WE# PIU0 RM_QML OU 00 IO_LN_0 0 RM_7 0 targettap_p IO_LP_0 IO_LP_ RM_ 0 targettap_n Spare 0MHz clock for bringup IO_LN_0 IO_LN_VREF_ RM_ 0 SPRE0 IO_LP_0 IO_LP_ 7 RM_ 0 IO_LN_0 NLRM0 NLRM0 NLRM0 NLRM07 NLRM0QML PIU0 PIU00 NLtargettap0N NLtargettap0P PIU00 PIU0 PIU00 PIU0 PIU00 SPRE OP PIU07 IO_LN_ RM_ 00 SPRE Trigger in IO_LP_GLK_0 IO_LP_ PIP0 PIP0 OJ RM_ SPRE IO_LN_GLK_0 IO_LN_ RM_ SPRE IO_LP_GLK7_0 IO_LP_ SM RM_0 7 SPRE trig_in IO_LN_GLK_0 NLRM00 NLRM0 NLRM0 NLRM0 PIU00 PIU0 PIU000 NLSPRE0 NLSPRE PIU0 PIU0 PIP0 PIP0 NLSPRE NLSPRE PIU0 PIU0 PIP0 PIP0 NLSPRE NLSPRE NLtrig0in PIU0 IO_LN_ 7 7 TRGETULPI_RST SPRE IO_LP_GLK_0 NLTRGETULPI0RST PIU07 PIP07 PIP0 PIJ0 NLSPRE NLSPRE7 PIR0 PIU07 IO_L0P_GLK_ PIU0 PIP0 0 PIP00 TRGETULPI_STP SPRE7 SPRE OR IO_LN_GLK_0 IO_L0N_GLK0_ TRGETULPI_IR SPRE 00 IO_L7P_GLK_0 NLTRGETULPI0IR NLTRGETULPI0STP NLSPRE PIU0 PIU0 PIP0 PIP0 NLSPRE0 NLSPRE PIU0 IO_LP_GLK_IRY_ TRGETULPI_LK SPRE 0 IO_L7N_GLK_0 IO_LN_GLK_ TRGETULPI_NXT SPRE0 PIJ0 PIJ0 PIJ0 PIJ0 NLTRGETULPI0LK PIU0 PIP0 PIP0 NLSPRE NLSPRE PIR0 PIU0 PIU0 PIP0 PIP0 IO_LP_0 IO_LP_GLK7_ 7 0 TRGETULPI_0 7 SPRE IO_LN_VREF_0 NLTRGETULPI00 NLTRGETULPI0NXT NLSPRE NLSPRE PIU0 PIU0 PIP07 PIP0 NLSPRE NLSPRE7 PIU00 IO_LN_GLK_TRY_ 0 TRGETULPI_ SPRE IO_LP_SP7_0 NLTRGETULPI0 PIU07 PIP0 PIP00 NLSPRE NLSPRE PIU0 IO_LP_GLK_ TRGETULPI_ SPRE IO_LN_SP_0 NLTRGETULPI0 PIU0 PIP0 PIP0 PIU0 IO_LN_GLK_ +.v PIP0 PIP0 +v 7 TRGETULPI_ SPRE Trigger out IO_LP_SP_0 NLTRGETULPI0 PIU0 PIU07 IO_LP_ +.v PIP0 PIP0 +.v OJ TRGETULPI_ SPRE IO_LN_SP_0 NLTRGETULPI0 PIU0 PIU0 IO_LN_ TRGETULPI_ SPRE Header X IO_LP_SP_0 NLTRGETULPI0 PIU0 PIU0 IO_LP_ SM TRGETULPI_ 0 SPRE7 trig_out IO_LN_SP_0 NLTRGETULPI0 PIU0 PIU0 IO_LN_ TRGETULPI_7 7 SPRE IO_LP_SP_0 NLTRGETULPI07 NLtrig0out PIU00 PIJ0 PIU0 IO_L7P_ PIU07 OTP 7 SPRE IO_LN_SP0_0 PIU0 PITP0 IO_L7N_ PIU07 XSLX-TQG OUE 7 trig_in IO_L7P_WKE_ OP +.v 7 7 trig_out PIU07 ONE_ IO_L7N_OUT_USY_ PIJ0 PIJ0 PIJ0 PIJ0 NLONE PIU07 PIU07 PIP0 7 XSLX-TQG PIP0 NLPROG PIU07 PROGRM 7 PIP0 PIU07 SUSPEN TK opyrights: -Y-S.0 Patents: pache.0 PIP0 NLTK 0 PIP0 PIU00 TK TO NLTI 0 +.v OSW PIP0 PIU00 TI TI NLTO 0 OR0 NLSW 7 PIP07 PIU00 TO PIR00 PIR00 PISW0 PISW0 NLTMS Size Number Revision PIP0 PIU007 TMS 0K PISW0 PISW0 TMS PIP0 OTP7 7 TL0LF0Q or TL0F0Q PITP70 PIU07 MPS Header ate: /0/0 Sheet of XSLX-TQG File: Z:\ov_ftdi\hardware\fpga.Schoc rawn y: NK NK a NK NK

5 ate: /0/0 Sheet of File: Z:\ov_ftdi\hardware\usb.Schoc rawn y: >=.v X7R power used during FPG configuration XPP0): RWR_, LK, PROG_, INIT_, M0, M OL NLVpll +.v PIL0 PIL0 +.v +.v +.v +.v +.v +.v +.v i Net lass ferrite bead 0 OL lassname: power PI0 O PI0 O PI0 O PI0 O PI0 O PI70 7 O7 PI0 O NLVphy +.v PIL0 PIL0 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF 0.uF i Net lass ferrite bead 0 PI0 X7R >=.v PI0 X7R >=.v PI0 X7R >=.v PI0 X7R >=.v PI0 X7R >=.v PI70 X7R >=.v PI0 X7R PI0 PI0 PI00 O0 0 PI70 O7 7 lassname: power uF O O >=.v PI0 PI0 PI00 PI70 00 lassname: +.v +.v Signals i Net lass (see.7uf 0.uF 0.uF i Net lass X7R >=.v 00 PIU70 PIU70 PIU70 PIU707 PIU70 PIU700 PIU70 PIU70 PIU70 lassname: power SI_, OU7 ONE, +.v 0 0 dditional signals used during FIFO PIU700 VregIn US0 PIU70 0.uF PI0 O 7 mode: US PIU707 X7R >=.v US0 (RXF#) +.v PIU70 VregOut US PIU70 00 PI0 PI0 O US (R#) US PIU70 0.uF US (WR#) US PIU70 NLVusb PI0 X7R >=.v US (LKOUT) US PIU70 OJ 00 US (OE#) US PIU70 7 VUS PIJ0 US7 PIU70 NLUS0N US_N 7 spare I/Os: - PIJ0 PIU707 M NLUS0P US_P US0 PIJ0 + PIJ0 PIU70 P US0 PIU70 7 OR LK PIJ0 PIJ0 US PIU707 PIR0 PIR0 OP FTH US 00 US PIU70 NL0 NL US PIP0 PIP0 7-0LF US PIU70 NL NL 0 US PIP0 PIP0 K % US PIU700 OR NL NL LKOUT PIP0 PIP0 PIR0 PIR0PIU70 PIU70 REF US PIU70 PIR0 PIR0 NL NL7 00 US 00 PIP07 7 PIP0 US.K US7 0 +.v PIU70 NLUS0 NLLK PIP0 PIP00 PIR0 PIR0PIU70 PIU70 RESET# US7 PIU70 NLUS NLUS +.v 00 PIP0 PIP0 NLUS NLLKOUT FTI_TK PIP0 PIP0 US0 PIU70 NLUS NLUS7 PIR0 PIR0 PIR0 FTI_TI PIP0 PIP0 US PIU70 OR OR OR FTI_TK FTI_TI NLFTI0TI 0 FTI_TO PIP07 7 PIP US PIU700 FTI_TO FTI_TMS NLFTI0TMS FTI_TMS PIP0 0 PIP00 0K 0K 0K US PIU70 NLUS NLUS PIR0 PIR0 PIR0 US PIP0 PIP0 US PIU70 NLEES NLUS NLUS7 US PIP0 PIP0 US PIU70 SI_ RWR_ NLEELK NLSI0 NLRWR0 US PIP0 PIP0 US PIU70 NLEET NLONE NLPROG US7 PIP07 7 PIP0 PIU70 EES US7 PIU70 INIT_ OU NLUS NLINIT0 PIP0 0 PIP00 PIU70 EELK NLM0 NLM SI_ PIP0 PIP0 PIU0 S V PIU0 PIU70 EET US0 PIU70 RWR_ PIP0 PIP0 +.v PIU0 ORG US OR7 PIU70 ONE PIU0 Q PIU0 PIR70 PIR70 US PIU70 Header 7X 00.K PROG PIU0 SL US PIU70 7 NLOSI US U PIU07 PIU70 OSI US PIU70 7 INIT_ PIU0 US PIU707 FTI_TK NLFTI0TK XT-N M0 NT PINT0 PINT0 US PIU70 MWMN OY MHz M US7 FTI_TI ONT PIU70 -NSH- NLOSO NT PINT0 PINT0 PIY0 PIY0 PIU70 OSO PI00 PI0 0 0 O0 O PWREN# FTI_TO ONT PIU700 NLFTI0TO Pulls per UG0 p PINT0 NT PINT0 PIU70 pf pf TEST SUSPEN# PIU70 +.v PI00 PI FTI_TMS ONT OR ONE PINT0 NT PIR0 PIR ONT OR PIU700 PIU70 PIU70 PIU70 PIU70 PIU70 PIU70 PIU707 PIU70 PINT0 PROG opyrights: -Y-S.0 Patents: pache.0 PIR0 0K PIR0 00 OR0 INIT_ PIR00 PIR00 0K 00 OR RM_RS_HSWPEN Size PIR0 PIR0 0K 00 Number Revision 0 7 gnd Vphy Vpll Vcore Vcore Vcore 7 0 onfiguration / FIFO to FPG Inspired by page 7

6 Quantityesignator VLUE omment Footprint igikey PN Mouser PN Notes 7-7 0uF 00 XR >=.v eramic cap N -GRMR0KE -0.7uF 00 X7R >=.v eramic cap N -GRMR7KK - uf 00 X7R >=.v eramic cap N 0-000KP - 0.uF 00 X7R >=.v eramic cap N 0-000MP 0- pf 00 X7R >=.v eramic cap N 0-000JG F 0 00m resettable polyfuse 0 FT-N 7-0L00YR J, J 7-0LF US jack PTH 0-7-N 7-0LF Might be able to use 00 parts here J E7--00 US jack PTH UE700-N E7--00 L.7uH xmm power inductor xmm SRN0-R7MT-N -SRN0-R7M Needs hot air to solder L-L 0 ferrite bead N 7-HI0PR-0 L red LE N 7-VLMS00-GS0 L yellow LE N 7-VLMY00-GS0 L, L green LE N 7-VLMTG00-GS0 M-M / -0 screw part mech H70-N -00 M-M /x/" F/F -0 standoff part mech 0K-N L-7 M-M / x/" F/M -0 standoff part mech 7K-N -7 R 0 Resistor 00 RMF00JT0R0T-N 7-RW00-0-E R.0K Resistor KHRT-N 0-RK7HJTT0F R 00 Resistor 00 RMF00JT00RT-N 7-RW00-00-E R, R K Resistor 00 RMF00JTK00T-N 7-RW00-.0K-E R-R, R 0 Resistor 00 RMF00JT0RT-N 7-RW00-0-E R0-R, R-R 0K Resistor 00 P0KGT-N 7-RW00-0K-E R K % Resistor 00 P.0KHT-N 7-RW00-K-E R, R7.K Resistor 00 P.KGT-N 7-RW00-.K-E R, R Resistor 00 RMF00JTR0T-N 7-RW00--E R M Resistor 00 RMF00JTM00T-N 7-RW00-.0M-E R 0 Resistor 00 RNP00FTRT-N 7-RW00-0-E R NP (0) Resistor 0 SW (option with ) TL0LF0Q pin button PTH EG0-N -TL0LF SW (option without ) TL0F0Q pin button PTH EG7-N -TL0 U LM70MF-..v switching regulator U XSLX-TQG FPG QFP -77-N SOT-N LM70MF-./NOPT-N -LM70MFNOP U SMS-7TN RM TSOP N -SMS-7TN U US ULPI PHY QFN ---N -US-P-TR U 0MHz only necessary for only necessary for only necessary for optional (for current measurement) button with long stalk, for use with button with short stalk, for use without not available at Mouser SEM.x. oscillator NP not used U7 FTH US FIFO QFP 7-0--N -FTHL U MWMN EEPROM SOP_N TN-SH-TT-N -M-WMNTP U TLV7LV.v LO SOT N -TLV7LVYR Y MHz MHz H/US 7-0--N 77-TS0SM-E Y MHz MHz H/US 7---N 77-TS0SM-