Mimas Spartan 6 FPGA Development Board. User Guide. Rev 9

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1 Mimas Spartan 6 FPGA Development Board User Guide Rev 9

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2 Get in touch with us! Please feel free to send a mail to one of the mail IDs below or use the Contact Us page at to drop us a quick message. Technical Help Got technical questions? Please write to help@numato.com Sales Team Questions about making payments, volume discounts, academic/open source discounts, purchase orders and quotes? Please write to sales@numato.com Webmaster Questions/Suggestions about our website? Please write to webmaster@numato.com Like us on Facebook! Visit our blog for news, updates and specials. Mailing Address Numato Systems Pvt Ltd st Floor, #6C Wipro Avenue Phase - Electronic City Bangalore, KA-6000, India * Mail orders, phone orders and direct pick up are not available at this time. Please visit our online store to place your order. Estimated shipping time to your address will be displayed in the shopping cart before checkout. You may use, modify or share this publication or part of thereof adhering to Creative Commons Attribution-ShareAlike.0 Unported (CC BY-SA.0) License. See complete license text at All trademarks are property of their respective owners.

3 Introduction Mimas is an easy to use FPGA Development board featuring Xilinx Spartan-6 FPGA. Mimas is specially designed for experimenting and learning system design with FPGAs. This development board features Xilinx XC6SLX9 TQG FPGA with maximum 70 user IOs. The USB.0 interface provides fast and easy configuration download to the on-board SPI flash. You don t need a programmer or special down loader cable to download the bit stream to the board. Applications Product Prototype Development Home Networking Signal Processing Wired and Wireless Communications Educational tool for schools and universities Board features FPGA: Spartan-6 XC6SLX9 in TQG package Flash memory: 6 Mb SPI flash memory (MP6) 00MHz CMOS oscillator USB.0 interface for On-board flash programming FPGA configuration via JTAG and USB 8 LEDs and four switches for user defined purposes 70 IOs for user defined purposes On-board voltage regulators for single power rail operation 0 NUMATO SYSTEMS PVT LTD

How to use the module The following section describes how to use this module. Components/Tools required Along with the module, you may need the items in the list below for easy and fast installation.

4 How to use the module The following section describes how to use this module. Components/Tools required Along with the module, you may need the items in the list below for easy and fast installation.. USB A to Mini B cable.. DC Power supply (Optional). Connection Diagram This diagram should be used as a reference only. For detailed information, see Mimas schematics at the end of this documentation. Details of individual connectors are as below. 0 NUMATO SYSTEMS PVT LTD

USB Interface The on board full speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to Mini B cable to connect with a PC.

com/cables-accessories to buy cables and accessories for this product. DC Power Supply This module uses +V power supply to function properly.

5 USB Interface The on board full speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to Mini B cable to connect with a PC. By default the module is powered from USB so make sure not to overcrowd unpowered USB hubs. (the picture on the left shows USB Mini connector) Visit to buy cables and accessories for this product. DC Power Supply This module uses +V power supply to function properly. By default the board is configured to use +V supply from USB. So an external +V power is not required unless USB port is unable to supply enough current. In most cases USB ports are capable of providing enough current for the module. Current requirement for this board largely depends on your application. Please consult FPGA datasheet for more details on power requirements. If for any reason, an external V power supply needs to be used for the module, the Power select jumper should be configured properly before connecting the power supply. Please refer to the marking on the board for more details. Power Select The Solder jumper is used to configure the power source for the board. The Solder jumper in pin and is shorted to switch the power source to on board USB port and pin and to use the external DC power. JTAG Connector JTAG connector provides access to FPGA's JTAG pins. A XILINX platform cable tool can be used to for JTAG programming. 0 NUMATO SYSTEMS PVT LTD

6 On-Board Peripherals 8 LEDs and four micro switches are provided on-board for user defined purposes. These peripherals are connected to FPGA IOs and can be controlled from user RTL. The switches do not have pull-ups on board so make sure to enable week pull ups on corresponding IOs in your design. GPIOs This board is equipped with 70 user IO pins that can be used for various custom applications. Pin assignments on the connectors are available in the tables below. HEADER P Header Pin No. Pin description Spartan-6 (XC6SLX9 TQG) Pin No. NA NA IO_LP_ IO_LN_VREF_ IO_LP_ 6 IO_LN_ 7 IO_L6P_ 0 8 IO_L6N_ 9 9 IO_L7P_ 7 0 IO_L7N_ 6 IO_LP_GCLK7_ IO_LN_GCLK6_ IO_LP_GCLK_TRDY_ IO_LN_GCLK_ IO_LP_GCLK_ 7 6 IO_LN_GCLK_IRDY_ 6 7 IO_LP_GCLK_ 8 IO_LN_GCLK0_ 9 IO_L9P_ 0 NUMATO SYSTEMS PVT LTD

7 0 IO_L9N_ IO_L0P_ 0 IO_L0N_ 9 IO_LP_ 8 IO_LN_ 7 IO_LP_ 6 6 IO_LN_ 7 IO_L8P_ 8 IO_L8N_VREF_ 9 IO_LP_0 0 IO_LN_0 IO_LP_0 0 IO_LN_0 9 IO_LP_0 8 IO_LN_0 7 IO_LP_GCLK9_0 6 IO_LN_GCLK8_0 7 IO_LP_GCLK7_0 8 IO_LN_GCLK6_0 9 NA 0 NA HEADER P Header Pin No. Pin description Spartan-6(XC6SLX9 TQG) Pin No. NA NA IO_L6N_D6_ IO_L6P_D_ 0 NUMATO SYSTEMS PVT LTD

8 6 IO_L9N_D_ 6 IO_L9P_D_ 6 7 IO_L8N_RDWR_B_VREF_ 7 8 IO_L8P_D7_ 8 9 IO_LN_GCLK0_D_ 0 0 IO_LP_GCLK_D_ IO_L0N_GCLK0_USERCCLK_ IO_L0P_GCLK_D_ 6 IO_L7N_DOUT_BUSY_ 7 IO_L7P_AWAKE_ 7 IO_L7N_ 78 6 IO_L7P_ 79 7 IO_L6N_ 80 8 IO_L6P_ 8 9 NA 0 NA IO_LN_ 8 IO_LP_ 8 IO_LN_GCLK_ 8 IO_LP_GCLK_ 8 IO_LN_GCLK6_TRDY_ 87 6 IO_LP_GCLK7_ 88 7 IO_LN_GCLK8_ 9 8 IO_LP_GCLK9_IRDY_ 9 9 IO_L0N_GCLK0_ 9 0 IO_L0P_GCLK_ 9 IO_LN_ 97 IO_LP_ 98 IO_LN_ 99 IO_LP_ 00 0 NUMATO SYSTEMS PVT LTD

9 7 IO_LN_ 0 6 IO_LP_ 0 7 IO_LN_VREF_ 0 8 IO_LP_ 0 9 NA 0 NA 0 NUMATO SYSTEMS PVT LTD

8 Driver Installation Windows This product requires a driver to be installed for proper functioning when used with Windows. The driver package can be downloaded from the product page.

10 8 Driver Installation Windows This product requires a driver to be installed for proper functioning when used with Windows. The driver package can be downloaded from the product page. To install the driver, unzip the contents of the downloaded driver package to a folder. Attach USB cable to the PC and when asked by Windows device installation wizard, point to the folder where driver files are present. When driver installation is complete, the module should appear in Windows Device Manager as a serial port (see the picture on the right). Note down the name of the serial port (COM, COM etc..). This information is required while programming the module with configuration tool. Linux To use this product with Linux, USB CDC driver needs to be compiled in with the kernel. Fortunately, most Linux distributions (Ubuntu, Redhat, Debian etc..) has this driver pre-installed. The chances of you requiring to rebuild the kernel to include the USB CDC driver is very slim. When connected to a Linux machine, this product should appear as a serial port in the /dev directory. Usually the name of the device will be ttyacmx or similar. The name may be different depending on the Linux distribution you have. Mac Similar to Linux, Mac operating system comes with the required drivers pre-installed. When connected to a Mac computer, the device should appear as a serial port. 0 NUMATO SYSTEMS PVT LTD

9 Generating Bit Stream for Mimas HDL design needs to be converted to bit stream before it can be programmed to FPGA. Mimas at this time accepts only binary (.

11 9 Generating Bit Stream for Mimas HDL design needs to be converted to bit stream before it can be programmed to FPGA. Mimas at this time accepts only binary (.bin) bit stream created by XILINX ISE ( Once the HDL is synthesized, it is easy to create a binary bit stream out of it. Please follow the Steps below to generate binary bit stream from your design using ISE Web Pack. Step : Right click on the Generate Programming File option in Processes window. 0 NUMATO SYSTEMS PVT LTD

0 Step : Select Process Properties from the pop up menu. In the dialog box, check Create Binary Configuration File Check box and click Apply. Step : Click OK to close the dialog box.

12 0 Step : Select Process Properties from the pop up menu. In the dialog box, check Create Binary Configuration File Check box and click Apply. Step : Click OK to close the dialog box. Right click on Generate Programming File option again and select Run. Now you will be able to find a.bin file in the project directory and that file can be used for Mimas configuration. 0 NUMATO SYSTEMS PVT LTD

13 Powering Up Mimas Mimas can be powered directly from USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. XILINX provides tools to estimate the power consumption. In any case if power from USB is not enough for your application, an external supply can be applied to the board. Mimas requires two different voltages, a.v and a.v supply. On-board regulators derive these voltages from the USB/Ext power supply. Configuring Mimas The Mimas Spartan6 module can be configured by two methods, a) Using Mimas configuration tool through USB. b) Using the Xilinx programming cable.. Configuring Mimas using configuration tool Mimas has an on-board micro-controller which facilitates easy reprogramming of on-board SPI flash through USB interface. The micro-controller receives bit stream from the host application and program it in to the SPI Flash and lets the FPGA boot from the flash. The Mimas configuration application can be downloaded from for free. When Mimas is connected to PC, it shows up as a COM port in Device Manager. Run configuration application, select proper COM Port before downloading bit stream. Click on Open File to select the bit stream file (.bin) and press Program button to download the bit stream. Wait till the download process is finished. Once the download process is over, the configuration controller will try to boot the FPGA from the SPI Flash automatically. Follow the below steps. 0 NUMATO SYSTEMS PVT LTD

14 Step : Open Mimas Configuration Tool. Select the port no.(refer Driver installation for more information on finding port no.) Click Open file and select the.bin file. 0 NUMATO SYSTEMS PVT LTD

15 Step : Click on Program button. Wait till Done appears on the screen. 0 NUMATO SYSTEMS PVT LTD

Configuring Mimas using JTAG Mimas Spartan6 module features an on-board JTAG connector which facilitates easy reprogramming of SRAM and on-board SPI flash through JTAG programmer like XILINX

16 Configuring Mimas using JTAG Mimas Spartan6 module features an on-board JTAG connector which facilitates easy reprogramming of SRAM and on-board SPI flash through JTAG programmer like XILINX Platform-cable usb. Programming Mimas using JTAG requires XILINX ISE impact software which is bundled with XILINX ISE Design Suite. To program the SPI flash we need a ".mcs" file needs to be generated from the ".bit" file. Steps for generating ".mcs" file is discussed below. Programming FPGA SRAM does not require a mcs file to be generated. Generating ".mcs" file for Mimas Step : Open ISE impact. Click on Create PROM file(prom file formatter).in the dialog box, select Configure Single FPGA in storage device type. Then click on the green arrow at the right side. 0 NUMATO SYSTEMS PVT LTD

17 Step : Select 6M in Storage Device (bits) list. Now click on Add Storage Device, then the green arrow at the right side. Step : Set an output file name and an output file location (the ".mcs" file will be generated at this location which will be required later for programming the FPGA), then click OK twice, then select the ".bit" file we already generated then click Open and click NO when it prompts to add another device file. 0 NUMATO SYSTEMS PVT LTD

18 6 Step : Double click on Generate File. Generate Succeeded will be displayed as shown in fig below if the mcs file is generated successfully. 0 NUMATO SYSTEMS PVT LTD

19 7 Programming FPGA using ISE impact Step : Open ISE impact. Click on Boundary Scan in the impact flows window in the left top corner. Then right click on the window panel in the right side. Select Initialize Chain. 0 NUMATO SYSTEMS PVT LTD

8 Step : If the device is detected properly you will get a pop up window as shown below, Click OK. Then right click on the SPI/BPI (next to the black arrow in the below fig.

20 8 Step : If the device is detected properly you will get a pop up window as shown below, Click OK. Then right click on the SPI/BPI (next to the black arrow in the below fig.), select Add SPI/BPI Flash. Step : Select the ".mcs" file we already created and click OK. Now choose MP6 in the dialogue box appeared, then click OK. 0 NUMATO SYSTEMS PVT LTD

21 9 Step : Click on Flash, Double Click on Program, select OK. If the programming is successful, a confirmation message will be displayed. 0 NUMATO SYSTEMS PVT LTD

22 0 Technical Specifications Parameter * Value Unit Basic Specifications Number of GPIOs 70 Number of LEDs 8 Number of Switches On-board oscillator frequency (FXO-HC6R) 00 MHz SPI Flash Memory (MP6) 6 Mb Power supply voltage (USB or external) -7 V Internal supply voltage relative to 0. to. V Auxiliary supply voltage relative to 0. to.7 V Output drivers supply voltage relative to 0. to.7 V FPGA Specifications * All parameters considered nominal. Numato Systems Pvt Ltd reserve the right to modify products without notice. 0 NUMATO SYSTEMS PVT LTD

23 Physical Dimensions Schematics See next page. 0 NUMATO SYSTEMS PVT LTD

24 6 7 A A PowerSupply XC6SLX9 Gpios B POWER SUPPLY VCCINT VUSB VCCINT LED[0...7] SW[0...] LED[0...7] SW[0...] B PowerSupply.sch PIC8FK0 VUSB SPARTAN 6 XC6SLX9 - TQG GPIOs C PIC8FK0 D[0..] RD WR CLK PROGB D[0..] RD WR CLK PROGB GPIO-P[..] GPIO-N[..] GPIO-P[..] GPIO-N[..] C SCS SDI SDO SCK SCS SDI SDO SCK PIC8FK0.sch XC6SLX9.sch Gpios.sch D D E License : CC BY-SA Numato Lab File: Mimas.sch Sheet: / Title: MIMAS SPARTAN 6 FPGA MODULE Size: A Date: dec 0 KiCad E.D.A. 6 7 Rev: Id: / E

25 VCCIN IN LM7 U OUT ADJ 0R R6 C A 0uF A 0R R7 VCCIN IN LM7 U OUT VCCINT VCCINT B EXTERNAL POWER VUSB P VUSB GS VCCIN C 0R R 0R R C 0uF B 7uF VCCIN 0 R C 0uF 0R R 0R R ADJ POWER SELECT - USB POWER - EXT POWER IN LM7 U OUT ADJ C BANK 0,, Power Select -.V -.V GS C License : CC BY-SA Numato Lab File: PowerSupply.sch Sheet: /PowerSupply/ Title: MIMAS SPARTAN 6 FPGA MODULE Size: A Date: dec 0 KiCad E.D.A. Rev: Id: /

26 A USB PF PF C8 MHz C9 USBMINI NC D+ D- VUSB VUSB X VUSB OSC X OSC VR VR VR VR MCLR OSC OSC DP DM C0 7 PIC8FK0 VDD RA/MCLR/VPP RA/AN/OSC/CLKO RA/OSC/CLKI 9 8 D+/PGD D-/PGC VUSB U6 PWR_FLAG VSS 0 RC7/AN9/SDO/TOSC0 9 RC6/AN8/TCKI/TOSC 8 RC/CCP/PA/T0CKI RC/PB/COUT/SRQ 6 RC/AN7/PC/CIN/PGM 7 RC/AN6/PD/CIN/CVREF/INT RC/AN/CIN-/INT/VREF- RC0/AN/CIN+/INT0/VREF+ 6 RB7/TX/CK 0 RB6/SCK/SCL RB/AN/RX/DT RB/AN0/SDI/SDA PIC8FK0 NOT POPULATED 0K R SDO D[0..] D0 D D D RD RD PROGB PROGB CLK WR SCK SCS SDI WR NOT POPULATED 0K R 0K R6 NOT POPULATED A B.0MFD B C PIC ICSP P6 6 MCLR DP DM FWUP P 0K R6 C MCLR SCS SDI SCS SDI R7 00R 00R R8 0K R9 0K R0 SPI FLASH MP6 S Q W VSS U7 VCC HOLD C D C 0K R R 00R R 00R SCK SDO SCK SDO C C License : CC BY-SA Numato Lab File: PIC8FK0.sch Sheet: /PIC8FK0/ Title: MIMAS SPARTAN 6 FPGA MODULE Size: A Date: dec 0 KiCad E.D.A. Rev: Id: /

27 LED[0...7] LED0 LED 0R D LED D A B SW[0...] LED LED LED LED LED6 LED7 SW0 SW SW SW 0R SW SW SW SW R8 R9 LED D D LED LED D LED D6 LED D7 LED D8 LED GPIO-P[..] 9 0 GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P6 GPIO-P7 GPIO-P8 GPIO-P9 GPIO-P0 GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P6 GPIO-P7 GPIO-P8 GPIO-P GPIO-P0 GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P0 GPIO-P9 GPIO-P8 GPIO-P7 GPIO-P6 GPIO-P9 GPIO-P GPIO-P GPIO-P GPIO-P P P GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N6 GPIO-N7 GPIO-N8 GPIO-N9 GPIO-N0 GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N6 GPIO-N7 GPIO-N8 GPIO-N GPIO-N0 GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N0 GPIO-N9 GPIO-N8 GPIO-N7 GPIO-N6 GPIO-N9 GPIO-N GPIO-N GPIO-N GPIO-N 0 HEADER P 9 HEADER P GPIO-N[..] A B C C License : CC BY-SA Numato Lab File: Gpios.sch Sheet: /Gpios/ Title: MIMAS SPARTAN 6 FPGA MODULE Size: A Date: dec 0 KiCad E.D.A. Rev: Id: /

28 A A B B C C D D E E Date: dec 0 KiCad E.D.A. Rev: Size: A Id: / Title: MIMAS SPARTAN 6 FPGA MODULE File: XC6SLX9.sch Sheet: /XC6SLX9/ Numato Lab License : CC BY-SA IO_L6N_ 80 IO_L6P_ 8 IO_LN_ 8 IO_LN_GCLK8_ 9 SUSPEND 7 IO_LP_ 8 IO_LP_GCLK9_IRDY_ 9 IO_L7N_DOUT_BUSY_ 7 IO_LN_GCLK_ 8 IO_L0N_GCLK0_ 9 IO_L7P_AWAKE_ 7 IO_LP_GCLK_ 8 IO_L0P_GCLK_ 9 IO_LN_GCLK6_TRDY_ 87 IO_LN_ 97 IO_L7N_ 78 IO_LP_GCLK7_ 88 IO_LP_ 98 IO_L7P_ 79 IO_LN_ 99 IO_LP_ 00 TDI 0 IO_L6N_VREF_0 0 IO_LP_0 0 IO_LN_ 0 IO_L66N_SCP0_0 IO_L6P_0 IO_LN_GCLK6_0 IO_LN_0 IO_LP_ 0 IO_L66P_SCP_0 IO_LP_GCLK7_0 IO_LP_0 IO_L7N_GCLK_0 IO_LN_GCLK8_0 IO_LN_VREF_ IO_LN_VREF_ 0 IO_L6N_SCP_0 IO_L7P_GCLK_0 IO_LP_GCLK9_0 IO_LP_HSWAPEN_0 IO_LP_ 0 IO_L6P_SCP_0 TDO 06 IO_L6N_SCP_0 6 IO_L6N_GCLK_0 6 TMS 07 IO_L6P_SCP_0 7 IO_L6P_GCLK_0 7 IO_LN_0 7 IO_L6N_SCP6_0 8 IO_LP_0 8 TCK 09 IO_L6P_SCP7_0 9 IO_LN_0 9 UA XC6SLX9-TQGC IO_L8N_VREF_ IO_L8P_ IO_LN_ IO_LP_ 6 IO_LN_ 7 IO_LP_ 8 IO_L0N_ 9 IO_L0P_ 0 IO_L6P_ 0 IO_L6N_D9_ 0 IO_LN_GCLK0_D_ 0 IO_LP_M_ 60 IO_LP_CCLK_ 70 IO_L9N_ IO_LN_GCLK_ IO_L6P_D8_ IO_LP_GCLK_D_ IO_LN_D_MISO_ 6 DONE_ 7 IO_L9P_ IO_LP_GCLK_TRDY_ IO_LN_ IO_LP_D_MISO_ 6 CMPCS_B_ 7 IO_LN_GCLK6_ IO_LP_ IO_L6N_D6_ IO_LN_GCLK0_ IO_LP_GCLK7_ IO_LN_VREF_ IO_L6P_D_ IO_LN_MOSI_CSI_B_MISO0_ 6 IO_LP_GCLK_ IO_LP_ IO_L9N_D_ IO_L0N_GCLK0_USERCCLK_ IO_LP_D0_DIN_MISO_MISO_ 6 IO_LN_GCLK_IRDY_ 6 IO_L7N_ 6 IO_L9P_D_ 6 IO_L0P_GCLK_D_ 6 IO_LN_CMPMOSI_ 66 IO_LP_GCLK_ 7 IO_L7P_ 7 PROGRAM_B_ 7 IO_L8N_RDWR_B_VREF_ 7 IO_LN_D_ 7 IO_LP_CMPCLK_ 67 IO_L6N_CSO_B_ 8 IO_L8P_D7_ 8 IO_LP_D_ 8 IO_L6N_ 9 IO_L6P_INIT_B_ 9 IO_LN_D0_ 9 IO_LN_M0_CMPMISO_ 69 UB XC6SLX9-TQGC VCCO_ 0 90 VCCO_ 9 VCCO_ VCCINT VCCO_ 6 6 VCCO_ 76 VCCO_ VCCO_ 8 VCCINT 8 68 VCCINT 9 9 VCCINT 89 0 VCCO_0 VCCO_ 0 VCCO_0 VCCO_ VCCINT 8 9 UC XC6SLX9-TQGC VCCINT TCK TDI TMS TDO SUSPEND PROGB R.7K R K D9 LED DONE PROGB E/D OUT VCC U FXO-HC6R C6 C7 pf GCLK M TMS TCK TDO TDI HSWAP GCLK LED0 LED LED LED LED LED LED6 LED7 SW0 SW SW SW D GPIO-P GPIO-N M0 GS GS M M0 C6 C7 C8 C9 C0 C C C9 C0 C C C C VCCINT GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N6 GPIO-N7 GPIO-N8 GPIO-N9 GPIO-N0 GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N GPIO-N6 GPIO-N7 GPIO-N8 GPIO-N9 GPIO-N GPIO-N GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P6 GPIO-P7 GPIO-P8 GPIO-P9 GPIO-P0 GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P GPIO-P6 GPIO-P7 GPIO-P8 GPIO-P9 GPIO-P GPIO-P GPIO-N6 GPIO-P6 GPIO-P7 GPIO-N7 GPIO-N8 GPIO-P8 GPIO-N9 GPIO-P9 GPIO-N0 GPIO-P0 GPIO-N GPIO-P GPIO-N GPIO-P GPIO-N GPIO-P GPIO-N GPIO-P GPIO-N0 GPIO-N GPIO-P0 GPIO-P GPIO-P GPIO-N D D D0 R 0K R 0K GPIO-P GPIO-P[..] GPIO-N[..] SUSPEND R0.7K HSWAP PROGB VCCINT SCS LED[0...7] SW[0...] SCK SDO SDI C C C C6 C7 C8 GPIO-N D[0..] C C INIT_B RD GS R.7K INIT_B DONE WR CLK 6 P SPARTAN 6 - XC6SLX9 SPARTAN 6 - XC6SLX9 SPARTAN 6 - XC6SLX9 00MHZ OSCILLATOR JTAG

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