Future of Supercomputing: The Computational Element

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1 C O N F I D E N T I A L Future of Supercomputing: The Computational Element Tommy Toles tommy.toles@amd.com

2 Agenda HPC The New World Order Whole > Sum-of-Parts? Key Challenges A Look Ahead 2

3 All Worldwide Servers Compared To HPC Revenue, Units & Processors All Servers Worldwide 2003 to to CAGR CAGR Total Factory Revenue ($B) $46,149 $49,146 $51,268 $52, % 1.9% Units Shipped (same as nodes) 5,278,222 6,307,484 7,050,099 7,472, % 6.0% Processor Dies Shipped 8,662,823 10,134,624 11,712,766 12,779, % 9.1% Source: IDC 2007 HPC Technical Servers Worldwide 2003 to to CAGR CAGR HPC Server Revenue ($B) $5,698 $7,393 $9,208 $10, % 8.9% Adjusted Revenues (To match enter $5,128 $6,654 $8,287 $9, % 8.9% Node Units Shipped 411, ,510 1,215,735 1,419, % 16.7% Processor Elements Shipped 1,002,905 1,657,827 2,681,079 3,351, % 25.0% Source: IDC 2007 HPC As A Ratio Of All Servers Revenue ($B) 12.3% 15.0% 18.0% 19.2% Adjusted Revenues (Apples-to-apple 11.1% 13.5% 16.2% 17.3% Units Shipped (Nodes) 7.8% 11.6% 17.2% 19.0% Processors Shipped 11.6% 16.4% 22.6% 26.1% Source: IDC 2007

4 Revenue percentage by CPU type Total HPC Revenue by Processor Type Source: IDC 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% x86-64 x86-32 VECTOR RISC EPIC X86 bases system took 63% share in 2006

5 Revenue percentage by O/S Total HPC Revenue by OS Source: IDC 100% 80% 60% 40% Linux Unix W/NT. Other 20% 0% Linux systems accounted for 66% of the total revenue in 2006

6 Historical Performance Metrics Performance Time AMD VSP Custo 6

7 Innovations New Metric: Performance per Watt Performance Increase Performance within Power Envelope Time AMD VSP Custo 7

That s equivalent to ~5000 barrels of oil a day!

8 Power The final frontier The combined total of data centers in California for 2004 were estimated to require ~300MW of energy. That s equivalent to ~5000 barrels of oil a day! SOURCE: California Energy Commission 9/27/

9 Feeding the Beast (Watts) More Back-up Power Generator Requirements $$$ More High-Voltage switch Equipment Requirements $$$ More High-Capacity CRAC units (air-conditioners) $$$ More UPS equipment requirements $$$ Lower Density/ Unusable Floor Space $$$ Data Center Expansion $$$ 9/27/

10 IT Knows it has a Problem Power Consumption/Cooling Issues Tracked By Company: 71% How Are Companies Addressing These Issues Power Consumption 12% Increased Amount Of Power Supplied To Data Center 44% Cooling 21% Stopped Buying More Servers And/Or Consolidated Existing Equipment 26% Both Equally Important Suspect That Both are Issues but do not Track at this Time 12% 38% Implemented "Cool Aisle/Hot Aisle Layout Increased Size Of Data Center Other 25% 23% 16% Neither Presents An Issue at this Time 17% None Of The Above 15% Base: 1,177 IT Decision Makers November 2005 Strategy Group/Ziff-Davis Average of 18% of total rack space wasted due to power and cooling issues 9/27/

11 Next-Generation Power Comparison Watts From: Memory Northbridge CPU In 2006 Next-Generation AMD Opteron Defined A New Standard In Performance-Per-Watt With Energy-Efficient DDR2 Memory and Improved AMD PowerNow! Capabilities 35W 83W 22W 83W 22W 83W 22W 35W In mid-2007 We Plan to Offer Quad-Core AMD Opteron in the Same DDR2-based Platforms at the Same Power Efficiency 190W 290W Dual-Core 180W 266W 190W Quad-Core Rev F Xeon Dempsey Xeon Wood- Crest Xeon Clover- Town Quad-Core 11 Wattage based on 2P systems with 8 DIMMs at max CPU wattage; Wattage for Dempsey, Woodcrest and Clovertown is estimated based on currently publicly available values (see, eg: and is subject to change. The examples contained herein are intended for informational purposes only. Other factors will affect real-world power consumption.

12 At the Wall Power Comparison 12

13 AMD Power Efficiency Innovation Independent Dynamic Core Technology AMD CoolCore Technology Same Power And Thermal Envelopes As Dual-Core! Dual Dynamic Power Management Low-Power DDR2 Memory 13

14 Computational Requirements 14 Source: Andy Bechtolsheim, IEEE Grid & Cluster Conference, 2007

15 What Makes a Great CPU even better? Frequency Lift Instruction Set Enhancement Increasing Cores Core Capabilities Memory Access (Capacity, Bandwidth & Latency) CPU-CPU connectivity IO Connectivity (Data access) Software Scaling 15

PCI-X Bridge 2 nd Processor competes For FSB B/W I/O & memory compete for FSB B/W PCI-X

16 Legacy Northbridge Server Architecture FSB Sharing: Memory CPU-CPU I/O Memory access delayed by passing through NB DDR Server Processor North Bridge (MCH) Server Processor PCI-X Bridge 2 nd Processor competes For FSB B/W I/O & memory compete for FSB B/W PCI-X B/W bottlenecks: link B/W < I/O device B/W IDE, FDC, USB, Etc. South Bridge PCI AMD VSP Custo 16

17 AMD Opteron Direct Connect Server Architecture DDR AMD Opteron Processor AMD Opteron Processor DDR Reduced Bus Contention Separate Mem. And I/O Paths Dedicated Memory Path Reduced Memory Latency Better Scalability AMD-8131 PCI-X Bridge HyperTransport bus has ample bandwidth for I/O devices PCI-X IDE, FDC, USB, Etc. AMD-8111 I/O Hub PCI Fewer chips needed for basic server AMD VSP Custo 17

HyperTransport Technology Buses Enable Glueless Expansion for up to 8-way Servers AMD Opteron Platform HyperTransport Technology Buses for Glueless I/O or CPU Expansion Maximum of Four Processors per

Processor Processor Processor DDR 144-bit Separate Memory and I/O Paths Eliminates Most Bus Contention PCI-X Other I/O AMD Opteron PCI-X Bridge * Other Bridge IDE, USB, LPC, Etc.

18 HyperTransport Technology Buses Enable Glueless Expansion for up to 8-way Servers AMD Opteron Platform HyperTransport Technology Buses for Glueless I/O or CPU Expansion Maximum of Four Processors per Memory Controller Hub Historic MP Server FSB Bus Bandwidth Shared Across All Four Processors DDR 144-bit AMD Opteron AMD Opteron DDR 144-bit Limited Memory Bandwidth Shared by All Memory Processor Processor Processor Processor DDR 144-bit Separate Memory and I/O Paths Eliminates Most Bus Contention PCI-X Other I/O AMD Opteron PCI-X Bridge * Other Bridge IDE, USB, LPC, Etc. AMD Opteron PCI-X Bridge I/O Hub** Fewer Chips Needed for 4-way Server (Reduces Cost) DDR 144-bit HyperTransport Link Has Ample Bandwidth For I/O Devices DDR 144-bit DDR 144-bit DDR 144-bit DDR 144-bit Key Memory Traffic I/O Traffic IPC Traffic Memory Address Buffer 4 Memory Address Buffer Memory Address Buffer Memory Address Buffer IDE, FDC, USB, Etc. Memory Ctlr Hub (MCH) 1 I/O Hub 3 9-Chip Chipset Needed for 4-way Server I/O & Memory Share FSB PCI-X Bridge 2 PCI-X Bridge PCI-X Bridge PCI PCI-X PCI-X PCI-X Bandwidth Bottlenecks: Link Bandwidth < I/O Bridge Bandwidth Scalable memory and I/O bandwidth Up to 8 processors without glue logic Each processor adds more memory Each processor adds additional HyperTransport buses for more PCI-X and other I/O bridges Fewer chips required AMD VSP Custo *AMD-8131 HyperTransport PCI-X Tunnel **AMD-8111 HyperTransport I/O Hub System scalability limited by Northbridge Maximum of 4 processors o Processors compete for FSB bandwidth Memory size and bandwidth are limited Maximum of 3 PCI-X bridges Many more chips required 1 ServerWorks CMIC HE Memory Controller Hub (MCH) 2 ServerWorks CIOB-X 64-bit PCI/PCI-X Controller Hub 3 ServerWorks CSB5 I/O Controller Hub 4 ServerWorks REMC Memory Address Buffer 18

19 AMD Performance Innovation AMD Wide Floating-Point Accelerator AMD Memory Optimizer Technology ~150% 100% Comprehensive Performance Enhancements! Dual-Core Quad-Core Rapid Virtualization Indexing AMD Balanced Smart Cache 19

20 Dual-Core to Quad-Core Uplift Dual-Core AMD Opteron TM 2200 Series vs. Quad-Core AMD Opteron Model Socket Performance Scaling VMmark >124% >124% SPECint_rate % 57% 59% SPECfp_rate2006 Stream memory bandwidth 23% 49% 57% 49% 54% Average Performance Increase SPECompMbase % % = Dual-Core AMD Opteron Processor Performance SPEC and the benchmark name SPECint, SPECfp and SPECOMPM are registered trademarks of the Standard Performance Evaluation Corporation. Benchmark results stated above for Dual-Core AMD Opteron processor Model 2222 reflect results published on as of Sep 9, The comparison presented above is based on results for Quad- Core AMD Opteron processor Model 2350 under submission to SPEC as of Sep 9, For the latest results visit and Stream and VMmark results based on internal measurements at AMD performance labs. 20

die architecture to market in order to claim first to market, only to change the design to true quad-core later - more churn and

21 Quad-Core vs. Dual-Die AMD s design will be a TRUE quad-core processor without compromising performance, power or heat Intel may rush a dual die architecture to market in order to claim first to market, only to change the design to true quad-core later - more churn and increased customer TCO Native Quad-Core Design Optimum performance Same power & thermal envelopes as dual-core Dual Die (Dual Cavity) Can hinder performance (FSB design) Publicly known thermal design power ranges higher than dual-core products 21

22 Native Quad-Core Benefit: Faster Data Sharing Situation: Core 1 needs data in Core 3 cache How Does it Get There? Native Quad-Core AMD Opteron Core 1 L2 System Request Queue Hyper Transport Crossbar L3 Core 2 Core 3 Core L2 L2 L2 Memory Controller Quad-Core Clovertown Core 1 Core 2 Core 3 Core L2 L2 Front-Side Bus Front-Side Bus Memory Controller Northbridge 1. Core 1 probes Core 3 cache, data is copied directly back to Core 1 This happens at processor frequency Result: Improved Quad-Core Performance 1. Core 1 sends a request to the memory controller, which probes Core 3 cache 2. Core 3 sends data back to the memory controller, which forwards it to Core 1 This happens at front-side bus frequency Result: Reduced Quad-Core Performance 22

23 Performance-Per-Watt Leadership Quad-Core AMD Opteron Processor Model 2350 (75 Watt ) vs. Intel Xeon 5345 (80 Watt, without Additional Watts of Memory Controller and FBDIMM) Fluent Fluent (sedan_4m) 67% SPECompMBase2001 SPECompM2001 SPECfp_rate_base2006 SPECfp_rate2006 Both on GCC gcc SPECfp_rate2006 SPECfp_rate2006 PGI Intel compiler vs. PGI compiler 30% 27% 36% LSDyna LSDyna 3 Vehicle 3 Collision Collison SPECint_rate_base2006 SPECint_rate2006 GCC Both on gcc 12% 9% 26% Average Performance Increase SPECint_rate2006 SPECint_rate2006 PGI Intel compiler vs. PGI compiler -5% % = Intel Xeon 5345 SPEC and the benchmark name SPECint, SPECfp and SPECOMPM are registered trademarks of the Standard Performance Evaluation Corporation. Competitive benchmark results stated above reflect results published on as of Sep 9, The comparison presented above is based on results for Quad-Core AMD Opteron processor Model 2350 and Xeon 5345 (specint_rate2006 gcc and SPECompM2001 base) under submission to SPEC as of Sep 9, For the latest results visit Fluent and LSDyna result based on internal measurements at AMD performance labs. 23

24 Interconnect Memory Power CPU AMD Server Platform Roadmap Single Core Dual Core Quad Core Mainstream: 95W Blades/Rack Dense: up to 68W Maximum Performance: 120W (Special Edition) Registered DDR-2 DDR-3 Registered DDR-1 HT 2.6 GHz HyperTransport - 1 GHz

Quad-core 3 rd Generation Platform 2 nd Generation Platform 130nm Single Core 90nm Dual Core 1 st

25 Investment Protection: Stable Platform Progression Long-term success for partners and end-customers 45nm Octal-core nm Dual Core 65nm Quad-core 45nm Quad-core 3 rd Generation Platform 2 nd Generation Platform 130nm Single Core 90nm Dual Core 1 st Generation Platform Stable platforms deliver better long-term value and logical transitions for partners and customers 25

X4200/4100 SC 1435 PowerEdge 2970 PowerEdge

BL685c U20 & U40 WS xw9400 1 st Generation

X3655 X3755 LS21 LS41 E-9422R E-9522R E-9722R

26 Platforms in Market Today 2003 vs. IBM eserver X4600 X2200 X4500 X4200/4100 SC 1435 PowerEdge 2970 PowerEdge 6950 DL585 DL385 DL365 DL145 BL465c X2100 BL685c U20 & U40 WS xw st Generation AMD Opteron Blade X6220 Blade X8420 X3455 X3655 X3755 LS21 LS41 E-9422R E-9522R E-9722R E-9222T XT3 XT4 X630 S2 AMD Validated Solutions BladeFrame ES and EX G

27 Customers are Responding! AMD Opteron Server Market Share WW total 11.9% 16.0% WW x % 17.1% WW x86 2-way 13.6% 18.2% WW x86 4-way 28.2% 40.1% US x % 27.4% US x86 2-way 21.2% 27.9% US x86 4-way 36.0% 56.2% Source: Gartner, IDC, end of year results 27

28 PERF. PERF. 64-bit Single Core POWER/PERF. 64-bit Homogeneous Multi-CPU DIVERSITY Platform Co-Processing Heterogeneous CPU+xPU The Heterogeneous Processing Imperative Dual-Core Opteron AMD64 HD, DRM 486 3D, digital media Java, XML, web services 16-bit Single Core 32-bit Single Core , GUI, PowerPoint, web browsers Spreadsheets, word-processing s 2000s 2010s By the end of the decade, homogenous multi-core becomes increasingly inadequate 28

Continuum of Solutions Fusion" "Stream" general purpose GPU "Torrenza"

Chipset AMD Processor Accelerator Opteron Socket Socket compatible

Accelerator Silicon level integration Accelerated Processors Fusion

Torrenza AMD s code name for: slot or socket based acceleration Slot

29 Continuum of Solutions Fusion" "Stream" general purpose GPU "Torrenza" HTX Accelerator PCI-E PCIe Accelerator Add-in Chipset Accelerator Chipset AMD Processor Accelerator Opteron Socket Socket compatible accelerator Accelerator CPU Package level integration (MCM) C P U NB Accelerator Silicon level integration Accelerated Processors Fusion AMD s code name for: Accelerated Processors (integrated acceleration) Torrenza AMD s code name for: slot or socket based acceleration Slot or Socket Acceleration Stream Specific example of a GPGPU accelerator under Torrenza 29

30 Torrenza: Accelerated Computing Today Direct Connect Accelerators in sockets or slots deliver superior performance without bridge chips 100s of GFlops to solve complex math Application specific optimization Familiar programming interfaces speed time to implementation Partners: Altera Celoxica DRC Lattice Xilinx XtremeData Stream ASICs FPGA Application Libraries Compilers Hardware Interfaces Partners: CTM Celoxica OpenFPGA Peakstream Rapidmind Partners: Bay Microsystems Commex NetLogic Qlogic RMI Tarari Woven IB XML iscsi 10Gb E Search Storage Security Torrenza Scale Up Virtualization Partners: 3Leaf Systems Liquid Computing Mannheim Newisys Panta Systems Specialized Direct Connect devices for highthroughput, low-latency processing cht and HT provide peer level interfaces to build systems from commodity building blocks 30 March 2007 AMD Commercial

31 How Do We Get There? Silicon Budgets Carbon Collaboration Facilities Algorithms 31

32 AMD Collaboration Resources Green Grid Developer Pages Torrenza Forum (accelerators) Home/Torrenza.aspx Lightweight Profiling for increased parallellism HyperTransport interconnect 32

33 My Prediction Texas A&M 38 OSU 13 Gig Em Aggies! 33

34 Disclaimer and Trademark Attribution DISCLAIMER The information contained herein is subject to change and may be rendered inaccurate for many reasons, including, but not limited to product and roadmap changes, component and motherboard version changes, new model and/or product releases, product differences between differing manufacturers, software changes, BIOS flashes, firmware upgrades, or the like. AMD assumes no obligation to update or otherwise correct or revise this information. However, AMD reserves the right to revise this information and to make changes from time to time to the content hereof without obligation of AMD to notify any person of such revisions or changes. AMD MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE CONTENTS HEREOF AND ASSUMES NO RESPONSIBILITY FOR ANY INACCURACIES, ERRORS OR OMISSIONS THAT MAY APPEAR IN THIS INFORMATION. AMD SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. IN NO EVENT WILL AMD BE LIABLE TO ANY PERSON FOR ANY DIRECT, INDIRECT, SPECIAL OR OTHER CONSEQUENTIAL DAMAGES ARISING FROM THE USE OF ANY INFORMATION CONTAINED HEREIN OR FOR THE PERFORMANCE OR OPERATION OF ANY PERSON, INCLUDING, WITHOUT LIMITATION, ANY LOST PROFITS, BUSINESS INTERRUPTION, DAMAGE TO OR DESTRUCTION OF PROPERTY, OR LOSS OF PROGRAMS OR OTHER DATA, EVEN IF AMD IS EXPRESSLY ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Advanced Micro Devices, Inc. AMD, the AMD Arrow logo, AMD Opteron, and combinations thereof, are trademarks of Advanced Micro Devices, Inc. Windows is a registered trademark of Microsoft Corporation in the U.S. and/or other countries. Linux is a registered trademark of Linus Torvalds. WebBench and NetBench are trademarks of Ziff Davis Publishing Holdings Inc., an affiliate of Veritest Inc. Other product and company names are for informational purposes only and may be trademarks of their respective companies. 34

The Future of Computing: AMD Vision

The Future of Computing: AMD Vision Tommy Toles AMD Business Development Executive thomas.toles@amd.com 512-327-5389 Agenda Celebrating Momentum Years of Leadership & Innovation Current Opportunity To