Micro Monitor Supply Control

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1 TECHNICAL DATA Micro Monitor Supply Control The is designed to control power supply and to start microcontroller and microprocessor systems. It is used for securing stable functioning of the system when starting and halting the device as well as in the case of the supply voltage drops. Manufactured in 8-pin SOIC/DIP package MS-012AA. LSI features: rated supply voltage 5.0 V; generation of reset signal when power supply is on for correct start of microprocessor; generation of reset signal when power supply drops below the operating one to avoid incorrect functioning of microprocessor; generation of reset signal when pushing reset button; possibility to program threashold voltage at which reset signal is generated. ORDERING INFORMATION N DIP D SOP T A = -40 to 85 C for all packages. The contains a source of reference voltage, two analog comparators, watchdog timer, digital sampler, digital delay. Functions: generation of reset signal per fixed level of supply voltage; generation of reset signal from external Reset button; generation of signal of watchdog timer status; emergency interruption of primary power source. PBRST 1 Vcc 2 GND 3 8 WDS 7 RST 6 ST IN 4 5 NMI Fig. 2 Pin assignment

2 Industrial temperature range Industrial temperature range - 40 С to + 85 С. Table 1 Recommended operating conditions Symbol Parameter Typical Units min max V СС Supply voltage V V IH Input voltage, high level 2.0 V СС +0.3 V V IL Input voltage, low level V Т A Operating temperature range С Table 2 Absolute maximum ratings Symbol Parameter Typical Units min max V СС Supply voltage V V IH Input voltage, high level - V СС +0.5 V V IL Input voltage, low level V T stg Storage temperature С Exposure to absolute maximum rating conditions may affect reliability of IC and its functional operation. Upon removing the absolute maximum ratings conditions, functional operation is guaranteed in recommended operating conditions. * Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

3 Table 3 DC electrical characteristics (T A = - 40 to + 85 С) Symbol Parameter Test conditions Typical Units min max V IL Input voltage, low level V СС =from 2.4 to 5.5V V V IH Input voltage, high level V СС =from 2.4 to 5.5V 2.0 V I OL I OH I OH1 V OH I LIL1 I LIL2 I LIL3 I LIH Output current, low level (NMI, RST) Output current, high level (WDS, NMI) Output current, high level, (RST) Output voltage, high level (RST) Input leakage current, low level (IN) Input leakage current, low level (ST) Input leakage current, low level (PBRST) Input leakage current, high level V СС =from 2.4 to 5.5V V OL = 0.4V V СС =from 4.5 to 5.5V V OH = 2.4V V CC =from 5.0 to 5.5V V OH =2.4V V СС =from 5.0 to 5.5V I OH = -500мкА V СС =from 1.2 to 5.5V V IL = 0 V V СС = 5.5V V IL = 0 V V СС = 5.5V V IL = 0 V V СС =from 1.2 to 5.5V V IH = V СС ma A ma V СС V A A A A I СС Operating current V СС =from 1.2 to 5.5V - 60 A V IL =0 V, V IH =V CC V CCTP V CC trip point V IL = 0 V, V IH =V CC V V TP IN input trip point V СС =5.0 V V IL = 0 V, V IH =V CC V

4 Table 4 AC electrical characteristics (V СС = 5.0 V, Т A = - 40 to + 85 С) Symbol Parameter Typical Units min max t TD Watchdog timeout s t PDLY PBRST stable low to RST and RST ns t RST Reset active time ms t RPD V СС detect to RST and RST s t RPU V СС detect to RST and RST ms t IPD VIN detect to NMI s t PB (PBRST= V IL ) ns t ST ST Pulse Width 10 - ns

5 RST t ST Timing diagrams PBRST tpb tpdly VIH VIL trst RST VOH Fig. 3 Timing diagram of forming reset signal from external PBRST control button ST Invalid strobe Valid strobe Indeterminate strobe MIN MAX t TD WDS Reset initiated by pushbutton Fig. 4 Timing diagram: strobe input

6 VCC RST WDS (MAX) (MIN) V OL t F t RPD WDS slews with V CC Fig. 5 Timing diagram: power down to V CCTP

7 VCC WDS RST (MIN) (MAX) t R t RPU V OH Fig. 6 Timing diagram: Power-Up

8 V I > 1,25 B NMI (MAX) (MIN) t IPD V OL (MIN) t IPD (MAX) VOH Fig. 7 Timing diagram: Non-Maskable Interrupt

9 IN Vcc PBRST ST + Digital - GND NMI RST WDS Sampler Reference voltage source - + Digital Sampler Digital delay Schmitt Trigger Watchdog Timer Fig. 8 Block Diagram Table 5 Pin description Pin Symbol Description Type 01 PBRST Pushbutton reset input Input 02 Vcc Power supply - 03 GND Ground - 04 IN Input Input 05 NMI Non-maskable interrupt Output 06 ST Watchdog timer strobe Input 07 RST Active low reset Output 08 WDS Watchdog status Output

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