Department PGA/PRM-M2. Date Released: Department NE/PJM. C h a n g e s

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1 Product: FETK-T1.0A Rev : 14 Page 1 of 15 Product : File : TTNR : FETK-T1.0A Release Notes FETK-T1.0A V14.docx F-00K Currently shipped: B011/01 Comments : FPGA-Boot version: V1.1.1 FPGA-A version: V Hardware-state: B011/01 Created: Name R. Mai Department PGA/PRM-M2 Signature R. Mai Date Released: Name A. Sprenger Department NE/PJM Signature A. Sprenger Date C h a n g e s Revision Date Name Signature B010/01 - for FETK-T1.0A - Initial version Mai Mai B011/01 - SBB V2.1 support added and Heat Spreader exchanged B011/01 - FPGA Update for MCE V2 and SW debugger arbitration B011/01 - FPGA Update for several Features and Bug fixes B011/01 - FPGA Update for several Features and Bug fixes B011/01 - FPGA Update for Bug fix B011/01 - FPGA Update for Bug fix B011/01 - FPGA Update for DAP2 and Bug fix Mai Mai Mai Mai Mai Mai Mai Mai Spr Spr Spr Spr Mai Mai

2 Product: FETK-T1.0A Rev : 14 Page 2 of B011/01 - FPGA Update for monitor variables and bug fix B011/01 - FPGA Update for monitor variables and bug fix B011/01 - FPGA Update for monitor variables and bug fix Spr Spr Mai Mai Mai Mai B011/01 - FPGA Update Mai Mai B011/01 - FPGA Update for bug fix Mai Mai B011/01 - FPGA Update and bug fix Mai Mai

3 Product: FETK-T1.0A Rev : 14 Page 3 of 15 Table of content 1 General Information Safety Notice System Requirements Restrictions Miscellaneous Version Syntax and Tool-Chain Information Version-Syntax of the FETK-T1.0A Version information of the tool-chain components Hardware support Software and microcontroller support What s New - Release Notes New or Enhanced Functions In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA HF2 and HSP V In INCA HF2 and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V In INCA and HSP V Known issues In INCA and HSP V In HSP V In INCA and HSP V In INCA HF2 and HSP V In INCA and HSP V Product Variants FETK-T1.0A Firmware Modifications General remarks to this chapter FPGA-Boot-Code FPGA-Code Hardware Modifications General remarks to this chapter Details of Change Change from hardware state B010 to hardware state B Hardware delivery condition Abbreviations... 15

4 Product: FETK-T1.0A Rev : 14 Page 4 of 15 1 General Information 1.1 Safety Notice Calibration activities influence the behavior of the ECU and the systems controlled by the ECU. This may result in unexpected behavior of the vehicle and thus can lead to safety critical situations. Only well trained personnel should be allowed to perform calibration activities. 1.2 System Requirements The following minimum system prerequisites have to be met: Required Hardware GHz Processor GB RAM DVD-ROM drive (for installation) Network adapter Graphics with a resolution of at least 1024x768, 256 MB RAM, 16bit color and DirectX9 Required Operating System Windows 7 SP1 (32 or 64bit*) or higher. Windows 8 (32 / 64 bit*) and Windows 8.1 (32 / 64 bit*) Windows 10 *) INCA uses the 32bit compatibility mode on a 64-bit operating system. Required Free Disk Space 1 GB (not including the size for user data; absolute min. required, but not recommended) The following system prerequisites are recommended: Recommended Hardware GHz Quad-Core Processor or equivalent 16 GB RAM DVD-ROM drive (for installation) Network adapter Graphics with a resolution of at least 1280 x 1024, 1GB RAM, 32bit color and DirectX9 Recommended Operating System Windows 7 SP1 64bit (INCA uses the 32bit compatibility mode on a 64-bit operating system) Recommended Free Disk Space >10 GB Recommendation on Performance Investigation on performance showed: o More Memory improves execution time of repetitive operations o SSD hard disks improve the file access times 1.3 Restrictions WINDOWS 95b, WINDOWS NT, WINDOWS 2000, WINDOWS 98SE, and WINDOWS XP are not supported

5 Product: FETK-T1.0A Rev : 14 Page 5 of Miscellaneous To ensure the highest data throughput from the FETK device up to the PC system the following recommendations should be considered: Set power save mode to the highest level Disable virus scan Use network adapter for ETAS application only Update network adapter drivers 2 Version Syntax and Tool-Chain Information 2.1 Version-Syntax of the FETK-T1.0A The FETK-T1.0A hardware version information is located on the product sticker and can be read out of the FETK using the firmware update tool HSP or XETK Configuration Tool. Overall Hardware Version Syntax: aaabbbcddd/ee of PLD-Code Information (modification details refer chapter 3) aaa bbb FPGA-Boot-Code version (1.0.0, 1.0.1, 1.0.2, ) FPGA-Code version (1.0.0, 1.0.1, 1.0.2, ) The hardware version of the PCB is also located on the label attached to the PCBs. These version is subordinate to the Overall hardware state cannot be read out by software. PCB Hardware State Syntax: deee/ff of Hardware-Information (modification details refer chapter 4) c ddd ee PCB Version (A=V1.0, B=V1.1, C=V1.2, ) PCB Hardware State (010, 011, 012, ) PCB Population Variant (00, 01, 02, ) The first delivered hardware state of the FETK-T1.0A is the following: FETK-T1.0A: B010/01

6 Product: FETK-T1.0A Rev : 14 Page 6 of Version information of the tool-chain components To get this FETK running with the other components of the tool-chain please make sure that the version mentioned below or a newer one is used. If your software, firmware or hardware version is older, please update it. If you have any problems to get this FETK running please contact our local customer support or sales representative. Updates or refreshes can be downloaded from the ETAS homepage: Hardware support The FETK-T1.0A is supported by ES Software and microcontroller support Microcontroller HSP INCA ETK Tools ASCET-RP INTECRIO TC27x-ED C-Step 1) V V7.2.0 V4.1.0 V6.4.1 V4.6.1 TC29x-ED V V7.2.0 V4.1.0 V6.4.1 V ) and higher versions (microcontroller steps) if they support the C-step specifications

7 Product: FETK-T1.0A Rev : 14 Page 7 of 15 3 What s New - Release Notes This chapter lists the main improvements compared to a previous shipped FETK product. Additionally, a detailed list of already known issues can be found here. 3.1 New or Enhanced Functions In INCA and HSP V Support of FETK Alias name Improve round trip time for FETK in combination with ES830 (Rapid prototyping) FETK-T1 reports Aurora link error and repeats AGBT initialization after ECU reset FETK sporadically generates wrong measurement values for trace raster 3.1.2In INCA and HSP V pin DAP setting is inconsitent for FETK-T1.0A Access to ED RAM could fail while concurrently using a debugger by debug api 3.1.3In INCA and HSP V Bugfix: FETK-T1.0 XCP Connection interruption in climate test during trace mirror collision test In INCA and HSP V Bugfix: FETK ECU Access error when debugger is connected support of Fine Grained Trace Windows (Infineon Errata MCDS_TC.059 to be considered for TC2xx ECU Software) In INCA and HSP V Added monitoring variable for Trace Mirror Valid Extended the XCP debug commands DBG_HWIO_AVAILABLE and

8 Product: FETK-T1.0A Rev : 14 Page 8 of 15 DBG_HWIO_SET_GET in order to support to monitor the target power supply and the WDGDIS pin bug fix for debug arbitration with Lauterbach Trace FETK-T1.0 asserts ECUPOR when going into sleep mode FETK, XCP debugging: Behavior of WDGDIS pin does not match with HW arbitration In INCA and HSP V Support of DAP2 (3-Pin) with max 100Mhz Overflows are always handles as fatal errors No HSP update it possible if lots of EV_DAQ_OVERLOAD events occur 3.1.7In INCA and HSP V Improved management of non-recoverable trace errors In INCA and HSP V Measure with FETK-T results in incorrect measured values (64bit values) Measurement Data Overflow with FETK-T Added firmware monitoring variables 3.1.9In INCA and HSP V Trace measurement improvement Support of reconfigurable size, moveable EMU RAM (LERT V3) XCP Debug API: responsive behavior in case of nonexisting memory access improved Support of IEEE 1588 time synchronization , Improved stability of FETK Update In INCA HF2 and HSP V Invalid measurement data in case of unaligned writing to 32 bit data

9 Product: FETK-T1.0A Rev : 14 Page 9 of In INCA HF2 and HSP V increased performance for debugging over XCP Support of fast raster use cases Performance optimization of ETK on ES µs raster beside other raster is now possible In INCA and HSP V Accerlate Trace Mirror initialization, decrease measurement gap in case of measurement overflow enhancement of monitor to log lost measurement data Confusing WP checksum displayed in INCA after power cycle of ES FETK-T stays in boot mode after HSP update from HSP to HSP In INCA and HSP V FETK-T Start of Measurement Improvements (Configuration DISTAB and Trace Interface) SW debugger arbitration for FETK (Debug API) MCEv2.0 support for FETK-T RP_Wait and MC_Wait are not cleared when Ethernet connection to ES891 is lost In INCA and HSP V support of SBB V2.1 added (SBB V3.1 was already available with initial version) In INCA and HSP V Initial version, support of FETK-T1.0A

10 Product: FETK-T1.0A Rev : 14 Page 10 of Known issues In INCA and HSP V # & # For Fine Grained Trace, Infineon Errata MCDS_TC.059 has to be considered for TC2xx ECU Software In HSP V # Incompatibility between ES891 with HSP and FETK-T with HSP In INCA and HSP V # Invalid measurement data in case of unaligned writing to 64 bit data In INCA HF2 and HSP V # Invalid measurement data in case of unaligned writing to 64 bit data In INCA and HSP V # Sporadically the handshake between ECU and FETK- T fails. Remedy is to acknowledge the reset in INCA dialog box.

11 Product: FETK-T1.0A Rev : 14 Page 11 of 15 4 Product Variants In general the FETK-T1.0A can be purchased in one variant. 4.1 FETK-T1.0A Item number F-00K FETK-T1.0A Emulator Probe for the Infineon AURIX microprocessor family For details refer the datasheet

12 Product: FETK-T1.0A Rev : 14 Page 12 of 15 5 Firmware Modifications 5.1 General remarks to this chapter The programmable logic code within the FETK-T1.0A is stored onto programmable logic devices (FPGA). For the version syntax please refer to chapter 2.1. Attention: For updating the FETK - firmware with a later version by using HSP, all FETK firmware packages will be updated one after another. This will last a few minutes and must not be cancelled by the user. In case the firmware update had been finished unsuccessfully due to some reason, the update will have to be repeated. HSP will program the rescue packages onto the FETK. This procedure makes the firmware update fail-safe. 5.2 FPGA-Boot-Code Revision Version Version Initial Version FETK-T1.0 asserts ECUPOR when going into sleep mode (bug fix #578016) Delivery condition: The FPGA-Boot version will be programmed into all shipments 5.3 FPGA-Code Revision Version Initial Version Version Service Based Bypass Version 2.1 support added (SBB V3.1 was already available with initial version) Version Start of Measurement improvements, SW debugger arbitration and MCE V2 support added Version File system update Version Support for fast raster use cases - Increased performance for debugging over XCP Version Invalid measurement data in case of unaligned writing to 32 bit data Version Trace measurement improvement - Improved stability of FETK Update (#553146, ) Version Added firmware monitoring variables - Bug fixes (#551165, ) Version Bug fix (#560302) Version Added DAP2 (3-Pin) support with 100Mhz - Bug fixes (#562626, ) Version Added monitoring variable for Trace Mirror Valid

13 Product: FETK-T1.0A Rev : 14 Page 13 of 15 Version Version Version Version Extended the XCP debug commands DBG_HWIO_AVAILABLE and DBG_HWIO_SET_GET in order to support to monitor the target power supply and the WDGDIS pin - Bug fixes (#572086, and ) Bug fix: FETK ECU Access error when debugger is connected Bugfix: FETK-T1.0 XCP Connection interruption in climate test during trace mirror collision test Bugfix: : 3 pin DAP setting is inconsitent for FETK-T1.0A : Access to ED RAM could fail while concurrently using a debugger by debug api - support of FETK Alias name - RP improvements for Roundtrip time with ES830 Bugfix: ( and ) Delivery condition: The FPGA version will be programmed into all shipments

14 Product: FETK-T1.0A Rev : 14 Page 14 of 15 6 Hardware Modifications 6.1 General remarks to this chapter Hardware issues or obsolete parts can make it necessary to modify the population of the FETK. Information about the modifications is listed underneath. The hardware state starts with version B010/01. For the version syntax please refer to chapter Details of Change Change from hardware state B010 to hardware state B011 Milled Head Spreader was exchanged by die cast Heat Spreader 6.3 Hardware delivery condition The hardware state B011/01 will be delivered with all new shipments.

15 Product: FETK-T1.0A Rev : 14 Page 15 of 15 7 Abbreviations ASCET-RP Rapid Prototyping Software of ETAS CPLD Complex Programmable Logic Device ES891 MC hardware FETK Product (emulator test probe) firmware Software for MC hardware; necessary for implementation of new features or bug fixes FPGA Field Programmable Gate Array; interface component to the application hardware Hot-fix Software bug-fix for a refresh version HS Heat Spreader HSP Hardware Service Pack; ETAS product which includes the firmware for the complete ETAS hardware, shipped together with INCA but also available as standalone product, download at ETAS homepage possible INCA Measurement and Calibration Software of ETAS INTECRIO Rapid Prototyping Software of ETAS MC Measurement & Calibration PCB Printed Circuit Board RP Rapid Prototyping SBB Service Based Bypass tool-chain MC hardware (e.g. ES690) and software (e.g. INCA) XETK Configuration Tool Configuration Software, in order to configure a (X)ETK / FETK