SPI Serial EEPROMs AT25010 AT25020 AT SPI, 1K Serial E 2 PROM
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1 Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and 3 (1,1) Low-voltage and Standard-voltage Operation 5. (V CC = 4.5V to 5.5V) 2.7 (V CC = 2.7V to 5.5V) 3. MHz Clock Rate (5V) 8-byte Page Mode Block Write Protection Protect 1/4, 1/2, or Entire Array Write Protect (WP) Pin and Write Disable Itructio for Both Hardware and Software Data Protection Self-timed Write Cycle (1 ms max) High Reliability Endurance: One Million Write Cycles Data Retention: 1 Years ESD Protection: >4V Automotive Grade and Extended Temperature Devices Available 8-pin PDIP and 8-lead JEDEC SOIC Package Description The AT251/2/4 provides 124/248/496 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 128/256/512 words of 8 bits each. The device is optimized for use in many industrial and commercial applicatio where low-power and low voltage operation are essential. The AT251/2/4 is available in space saving 8-pin PDIP and 8-lead JEDEC (SOIC) packages. The AT251/2/4 is enabled through the Chip Select pin () and accessed via a 3-wire interface coisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (). All programming cycles are completely self-timed, and no separate ERASE cycle is required before WRITE. BLOCK WRITE protection is enabled by programming the status register with one of four blocks of write protection. Separate program enable and program disable itructio are provided for additional data protection. Hardware data protection is provided via the WP pin to protect agait inadvertent write attempts. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Pin Configuratio Pin Name Function 8-pin PDIP SPI Serial EEPROMs 1K (128 x 8) 2K (256 x 8) 4K (512 x 8) AT251 AT252 AT254 SPI, 1K Serial E 2 PROM SI Chip Select Serial Data Clock Serial Data Input SO WP GND VCC HOLD SI SO Serial Data Output GND VCC Ground Power Supply 8-lead SOIC WP HOLD Write Protect Suspends Serial Input SO WP GND VCC HOLD SI Rev. 66F 4/1 1
2 Absolute Maximum Ratings* Operating Temperature C to C Storage Temperature C to + 15 C Voltage on Any Pin with Respect to Ground...-1.V to + 7.V Maximum Operating Voltage V *NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of this specification is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. DC Output Current ma Block Diagram 2 AT251/2/4
3 AT251/2/4 Pin Capacitance (1) Applicable over recommended operating range from T A = 25 C, f = 1. MHz, V CC = +5.V (unless otherwise noted). Symbol Test Conditio Max Units Conditio C OUT Output Capacitance (SO) 8 pf V OUT = V C IN Input Capacitance (,, SI, WP, HOLD) 6 pf V IN = V Note: 1. This parameter is characterized and is not 1% tested. DC Characteristics Applicable over recommended operating range from: T AI = -4 C to +85 C, V CC = +2.7V to +5.5V, T AC = C to +7 C, V CC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Max Units V CC1 Supply Voltage V V CC2 Supply Voltage V I CC1 Supply Current V CC = 5.V at 1 MHz, SO = Open, Read 3. ma V I CC2 Supply Current CC = 5.V at 2 MHz, SO = Open, 6. ma Read, Write I SB1 Standby Current V CC = 2.7V = V CC 5 µa I SB2 Standby Current V CC = 5.V = V CC 1 µa I IL Input Leakage V IN = V to V CC µa I OL Output Leakage V IN = V to V CC, T AC = C to 7 C µa V IL (2) Input Low Voltage -.6 V CC x.3 V V IH (2) Input High Voltage V CC x.7 V CC +.5 V V OL1 Output Low Voltage I OL = 2. ma.4 V 4.5V V CC =5.5V V OH1 Output High Voltage I OH = -1. ma V CC -.8 V V OL2 Output Low Voltage I OL =.15 ma.2 V 2.7V V CC =5.5V V OH2 Output High Voltage I OH = -1 µa V CC -.2 V Notes: 1. This parameter is preliminary and Atmel may change the specificatio upon further characterization. 2. V IL min and V IH max are reference only and are not tested. 3
4 AC Characteristics Applicable over recommended operating range from T A = -4 C to +85 C, V CC = As Specified, CL = 1 TTL Gate and 1 pf (unless otherwise noted). Symbol Parameter Voltage Min Max Units f Clock Frequency MHz t RI Input Rise Time 2 2 µs t FI Input Fall Time 2 2 µs t WH High Time t WL Low Time t High Time t S Setup Time t H Hold Time t SU Data In Setup Time 5 5 t H Data In Hold Time 5 1 t HD Hold Setup Time 1 1 t CD Hold Hold Time 2 2 t V Output Valid t HO Output Hold Time t LZ Hold to Output Low Z 1 1 t HZ Hold to Output High Z 1 1 t DIS Output Disable Time 25 5 t WC Write Cycle Time 5 1 ms Endurance (1) 5.V, 25 C, Page Mode 1M Write Cycles Note: 1. This parameter is characterized and is not 1% tested. 4 AT251/2/4
5 AT251/2/4 Serial Interface Description MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin () is always an input, the AT251/2/4 always operates as a slave. TRANSMITTER/RECEIVER: The AT251/2/4 has separate pi designated for data tramission (SO) and reception (SI). MSB: The Most Significant Bit (MSB) is the first bit tramitted and received. SERIAL OP-CODE: After the device is selected with going low, the first byte will be received. This byte contai the op-code that defines the operatio to be performed. The op-code also contai address bit A8 in both the READ and WRITE itructio. INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the AT251/2/4, and the serial output pin (SO) will remain in a high impedance state until the falling edge of is detected again. This will reinitialize the serial communication. CHIP SELECT: The AT251/2/4 is selected when the pin is low. When the device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO) will remain in a high impedance state. HOLD: The HOLD pin is used in conjunction with the pin to select the AT251/2/4. When the device is selected and a serial sequence is underway, HOLD can be used to pause the serial communication with the master device without resetting the serial sequence. To pause, the HOLD pin must be brought low while the pin is low. To resume serial communication, the HOLD pin is brought high while the pin is low ( may still toggle during HOLD). Inputs to the SI pin will be ignored while the SO pin is in the high impedance state. WRITE PROTECT: The write protect pin (WP) will allow normal read/write operatio when held high. When the WP pin is brought low, all write operatio are inhibited. WP going low while is still low will interrupt a write to the AT251/2/4. If the internal write cycle has already been initiated, WP going low will have no effect on any write operation. SPI Serial Interface 5
6 Functional Description The AT251/2/4 is designed to interface directly with the synchronous serial peripheral interface (SPI) of the 685 and 68HC11 series of microcontrollers. The AT251/2/4 utilizes an 8-bit itruction register. The list of itructio and their operation codes are contained in Table 1. All itructio, addresses, and data are traferred with the MSB first and start with a high-to-low traition. Table 1. Itruction Set for the AT251/2/4 Itruction Name Itruction Format Operation WREN X11 Set Write Enable Latch WRDI X1 Reset Write Enable Latch RDSR X11 Read Status Register WRSR X1 Write Status Register READ A11 Read Data from Memory Array WRITE A1 Write Data to Memory Array Note: A represents MSB address bit A8. WRITE ENABLE (WREN): The device will power up in the write disable state when V CC is applied. All programming itructio must therefore be preceded by a Write Enable itruction. The WP pin must be held high during a WREN itruction. WRITE DISABLE (WRDI): To protect the device agait inadvertent writes, the Write Disable itruction disables all programming modes. The WRDI itruction is independent of the status of the WP pin. READ STATUS REGISTER (RDSR): The Read Status Register itruction provides access to the status register. The READY/BUSY and Write Enable status of the device can be determined by the RDSR itruction. Similarly, the Block Write Protection bits indicate the extent of protection employed. These bits are set by using the WRSR itruction. Table 2. Status Register Format Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit X X X X BP1 BP WEN RDY Table 3. Read Status Register Bit Definition Bit Bit (RDY) Bit 1 (WEN) Definition Bit 2 (BP) See Table 4. Bit 3 (BP1) See Table 4. Bit = (RDY) indicates the device is READY. Bit = 1 indicates the write cycle is in progress. Bit 1 = indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates the device is WRITE ENABLED. Bits 4-7 are s when device is not in an internal write cycle. Bits -7 are 1s during an internal write cycle. WRITE STATUS REGISTER (WRSR): The WRSR itruction allows the user to select one of four levels of protection. The AT251/2/4 is divided into four array segments. Top quarter (1/4), Top half (1/2), or all of the memory segments can be protected. Any of the data within any selected segment will therefore be READ only. The block write protection levels and corresponding status register control bits are shown in Table 4. The two bits, BP1 and BP are nonvolatile cells that have the same properties and functio as the regular memory cells (e.g. WREN, t WC, RDSR). Table 4. Block Write Protect Bits Level Status Register Bits Array Addresses Protected BP1 BP AT251 AT252 AT254 None None None 1 (1/4) 1 6-7F C-FF 18-1FF 2 (1/2) 1 4-7F 8-FF 1-1FF 3 (All) 1 1-7F -FF -1FF READ SEQUENCE (READ): Reading the AT251/2/4 via the SO (Serial Output) pin requires the following sequence. After the line is pulled low to select a device, the READ op-code (including A8) is tramitted via the SI line followed by the byte address to be read (A7-A). Upon completion, any data on the SI line will be ignored. The data (D7-D) at the specified address is then shifted out onto the SO line. If only one byte is to be read, the line should be driven high after the data comes out. The READ sequence can be continued since the byte address is automatically incremented and data will continue to be shifted out. When the highest address is reached, the address counter will roll over to the lowest address allowing the entire memory to be read in one continuous READ cycle. 6 AT251/2/4
7 AT251/2/4 WRITE SEQUENCE (WRITE): In order to program the AT251/2/4, the Write Protect pin (WP) must be held high and two separate itructio must be executed. First, the device must be write enabled via the Write Enable (WREN) Itruction. Then a Write (WRITE) Itruction may be executed. Also, the address of the memory location(s) to be programmed must be outside the protected address field location selected by the Block Write Protection Level. During an internal write cycle, all commands will be ignored except the RDSR itruction. A Write Itruction requires the following sequence. After the line is pulled low to select the device, the WRITE op-code (including A8) is tramitted via the SI line followed by the byte address (A7-A) and the data (D7-D) to be programmed. Programming will start after the pin is brought high. (The LOW to High traition of the pin must occur during the low time immediately after clocking in the D (LSB) data bit. The READY/BUSY status of the device can be determined by initiating a READ STATUS REGISTER (RDSR) Itruction. If Bit = 1, the WRITE cycle is still in progress. If Bit =, the WRITE cycle has ended. Only the READ STATUS REGISTER itruction is enabled during the WRITE programming cycle. The AT251/2/4 is capable of an 8-byte PAGE WRITE operation. After each byte of data is received, the three low order address bits are internally incremented by one; the six high order bits of the address will remain cotant. If more than 8 bytes of data are tramitted, the address counter will roll over and the previously written data will be overwritten. The AT251/2/4 is automatically returned to the write disable state at the completion of a WRITE cycle. NOTE: If the WP pin is brought low or if the device is not Write enabled (WREN), the device will ignore the Write itruction and will return to the standby state, when is brought high. A new falling edge is required to re-initiate the serial communication. 7
8 Timing Diagrams Synchronous Data Timing (for mode ) t V IH V IL ts t H V IH t WH t WL V IL t SU t H SI V IH V IL VALID IN t V t HO t DIS SO V OH HI-Z HI-Z V OL WREN Timing WRDI Timing 8 AT251/2/4
9 AT251/2/4 RDSR Timing SI INSTRUCTION DATA OUT HIGH IMPEDANCE SO MSB WRSR Timing SI INSTRUCTION DATA IN SO HIGH IMPEDANCE READ Timing 9
10 WRITE Timing SI INSTRUCTION BYTE ADDRESS TH BIT OF ADDRESS DATA IN SO HIGH IMPEDANCE HOLD Timing t CD t CD t HD HOLD t HD t HZ SO t LZ 1 AT251/2/4
11 AT251/2/4 AT251 Ordering Information t WC (max) (ms) I CC (max) (µa) I SB (max) (µa) AT251-1PC AT251N-1SC 1 3 AT251-1PI AT251N-1SI AT251-1PC-2.7 AT251N-1SC AT251-1PI-2.7 AT251N-1SI-2.7 f MAX (khz) Ordering Code Package Operation Range Commercial ( C to 7 C) Industrial (-4 C to 85 C) Commercial ( C to 7 C) Industrial (-4 C to 85 C) Package Type 8-pin,.3" Wide, Plastic Dual Inline Package (PDIP) 8-lead,.15" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Optio Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) 11
12 AT252 Ordering Information t WC (max) (ms) I CC (max) (µa) I SB (max) (µa) AT252-1PC AT252N-1SC 1 3 AT252-1PI AT252N-1SI AT252-1PC-2.7 AT252N-1SC AT252-1PI-2.7 AT252N-1SI-2.7 f MAX (khz) Ordering Code Package Operation Range Commercial ( C to 7 C) Industrial (-4 C to 85 C) Commercial ( C to 7 C) Industrial (-4 C to 85 C) Package Type 8-lead,.3" Wide, Plastic Dual Inline Package (PDIP) 8-lead,.15" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Optio Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) 12 AT251/2/4
13 AT251/2/4 AT254 Ordering Information t WC (max) (ms) I CC (max) (µa) I SB (max) (µa) AT254-1PC AT254N-1SC 1 3 AT254-1PI AT254N-1SI AT254-1PC-2.7 AT254N-1SC AT254-1PI-2.7 AT254N-1SI-2.7 f MAX (khz) Ordering Code Package Operation Range Commercial ( C to 7 C) Industrial (-4 C to 85 C) Commercial ( C to 7 C) Industrial (-4 C to 85 C) Package Type 8-pin,.3" Wide, Plastic Dual Inline Package (PDIP) 8-lead,.15" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Optio Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) 13
14 AT251/2/4 Packaging Information, 8-pin,.3" Wide, Plastic Dual Inline Package (PDIP) Dimeio in Inches and (Millimeters) JEDEC STANDARD MS-1 BA, 8-lead,.15" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimeio in Inches and (Millimeters).4 (1.16).355 (9.2) PIN 1.2 (.58).13 (.33).28 (7.11).24 (6.1) PIN (3.99).15 (3.81).244 (6.2).228 (5.79).3 (7.62) REF.37 (.94).27 (.69).5 (1.27) BSC.21 (5.33) MAX SEATING PLANE.15 (3.81).115 (2.92).12 (.35).8 (.23).7 (1.78).45 (1.14).1 (2.54) BSC.15 (.38) MIN.22 (.559).14 (.356).325 (8.26).3 (7.62) 15 REF.43 (1.9) MAX.196 (4.98).189 (4.8).1 (.254).4 (.12).68 (1.73).53 (1.35) REF.1 (.254) 8.7 (.23).5 (1.27).16 (.46) 14
15 Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA TEL (48) FAX (48) Europe Atmel SarL Route des Arsenaux 41 Casa Postale 8 CH-175 Fribourg Switzerland TEL (41) FAX (41) Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL (852) FAX (852) Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg Shinkawa Chuo-ku, Tokyo Japan TEL (81) FAX (81) Atmel Operatio Atmel Colorado Springs 115 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 896 TEL (719) FAX (719) Atmel Rousset Zone Industrielle 1316 Rousset Cedex France TEL (33) FAX (33) Atmel Smart Card ICs Scottish Enterprise Technology Park East Kilbride, Scotland G75 QR TEL (44) FAX (44) Atmel Grenoble Avenue de Rochepleine BP Saint-Egreve Cedex France TEL (33) FAX (33) Fax-on-Demand North America: 1-(8) International: 1-(48) literature@atmel.com Web Site BBS 1-(48) Atmel Corporation 21. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company s standard warranty which is detailed in Atmel s Terms and Conditio located on the Company s web site. The Company assumes no respoibility for any errors which may appear in this document, reserves the right to change devices or specificatio detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licees to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel s products are not authorized for use as critical components in life support devices or systems. Marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper. Rev. 66F-3/2/1/xM
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Integrated circuit 93C56 Features Low Voltage and Standard Voltage Operation 5.0 (V CC = 4.5V to 5.5V) 2.7 (V CC = 2.7V to 5.5V) 2.5 (V CC = 2.5V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) User Selectable Internal
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Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 512 Pages (264 Bytes/Page) Main Memory Optional Page and Block Erase Operations
More information2-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 AT24C16
Features Low-voltage and Standard-voltage Operation 2.7(V CC =2.7Vto5.5V) 1.8(V CC =1.8Vto5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire Serial
More information(Serial Periphrial Interface (SPI) Synchronous Bus)
NM25C040 4K-Bit Serial CMOS EEPROM (Serial Peripheral Interface (SPI) Synchronous Bus) General Description The NM25C040 is a 4096-bit CMOS EEPROM with an SPI compatible serial interface. The NM25C040 is
More information256 (32K x 8) High-speed Parallel EEPROM AT28HC256N. Features. Description. Pin Configurations
Features Fast Read Access Time 90 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum
More information32-megabit 2.7-volt Only Serial DataFlash AT45DB321. AT45DB321 Preliminary 16- Megabit 2.7-volt Only Serial DataFlash
Features Single 2.7V - 3.6V Supply Serial-interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 8192 Pages (528 Bytes/Page) Main Memory Optional Page and Block Erase
More information4-megabit (512K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT49BV040 AT49BV040T AT49LV040 AT49LV040T
Features Single Voltage for Read and Write: 2.7V to 3.6V (BV), 3.0V to 3.6V (LV) Fast Read Access Time 70 ns Internal Program Control and Timer 16K Bytes Boot Block with Lockout Fast Chip Erase Cycle Time
More informationSPI Serial EEPROMs 8K (1024 x 8) 16K (2048 x 8) AT25080B AT25160B. Preliminary
Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and 3 (,) Datasheet Describes Mode Operation Low-voltage and Standard-voltage Operation.8 (V CC =.8V to.v) MHz Clock Rate (V)
More information16-megabit 2.7-volt Only Serial DataFlash AT45DB161
Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 4096 Pages (528 Bytes/Page) Main Memory Optional Page and Block Erase
More informationDistributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. APPLICATION NOTE A V A I L A B L E AN61 16K X25160 2K x 8 Bit SPI Serial
More information8-Megabit 5-volt Only Serial DataFlash AT45D081. Features. Description
Features Single 4.5V - 5.5V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 4096 Pages (264 Bytes/Page) Main Memory Two 264-Byte SRAM Data Buffers
More informationSOIC VCC RESET A11 A10 A9 A8 A7 A6 A5 A4 A12 A13 A14 A15 A16 A17 A18 A19 NC NC NC NC I/O0 RDY/BUSY I/O1 I/O7 I/O6 I/O5 I/O4 VCC I/O2 I/O3 GND GND
Features Single Voltage Operation 5V Read 5V Reprogramming Fast Read Access Time - 90 ns Internal Program Control and Timer 16K Bytes Boot Block With Lockout Fast Erase Cycle Time - 10 seconds Byte-By-Byte
More informationDIP Top View VCC A12 A14 A13 A6 A5 A4 A3 A2 A1 A0 A8 A9 A11 A10 I/O7 I/O6 I/O0 I/O1 I/O2 I/O5 I/O4 I/O3 GND. TSOP Top View Type 1 A11 A9 A8 A13 A14
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Page Program Operation Single Cycle Reprogram (Erase and Program) Internal Address and Data Latches for 64 Bytes Internal Program Control
More information64K (8K x 8) High Speed Parallel EEPROM with Page Write and Software Data Protection AT28HC64BF
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Fast Write Cycle Times Page Write Cycle Time: 2 ms Maximum (Standard) 1 to 64-byte Page
More informationTwo-Wire Serial EEPROM AT24C164 (1)
Features Low Voltage and Standard Voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Internally Organized 2048 x 8 (16K) Two-Wire Serial Interface Schmitt Trigger, Filtered Inputs for
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AVR 305: Half Duplex Compact Software UART Features 32 Words of Code, Only Handles Baud Rates of up to 38.4 kbps with a 1 MHz XTAL Runs on Any AVR Device Only Two Port Pins Required Does Not Use Any Timer
More informationAT25M01. SPI Serial EEPROM 1-Mbit (131,072 x 8) DATASHEET. Features. Description
AT25M1 SPI Serial EEPROM 1-Mbit (131,72 x 8) DATASHEET Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and 3 (1,1) Datasheet Describes Mode Operation Low-voltage Operation
More information512K (64K x 8) 5-volt Only Flash Memory AT29C512
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 512 Sectors (128 Bytes/Sector) Internal Address and Data Latches for 128
More information2-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 AT24C16. Features. Description. Pin Configurations. 1K (128 x 8) 2K (256 x 8) 4K (512 x 8)
Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire
More information2-Wire Serial EEPROM 32K (4096 x 8) 64K (8192 x 8) AT24C32A AT24C64A. Features. Description. Pin Configurations
Features Low-Voltage and Standard-Voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Low-Power Devices (I SB = 6 µa @ 5.5V) Available Internally Organized 4096 x 8, 8192 x 8 2-Wire Serial
More informationTSSOP CLK/IN IN IN IN IN IN IN 19 I/O I/O I/O IN IN IN IN GND. TSSOP is the smallest package of SPLD offering. DIP/SOIC CLK/IN VCC I/O
Features 3.0V to 5.5V Operating Range Lowest Power in It Class Advanced Low-voltage, Zero-power, Electrically Erasable Programmable Logic Device Zero Standby Power (25 µa Maximum) (Input Transition Detection)
More information256K (32K x 8) 5-volt Only Flash Memory AT29C256
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Page Program Operation Single Cycle Reprogram (Erase and Program) Internal Address and Data Latches for 64 Bytes Internal Program Control
More information2-wire Serial EEPROM AT24C1024. Features. Description. Pin Configurations. 1M (131,072 x 8)
Features Low-voltage Operation 2.7 (V CC = 2.7V to 5.5V) Internally Organized 3,072 x 8 2-wire Serial Interface Schmitt Triggers, Filtered Inputs for Noise Suppression Bi-directional Data Transfer Protocol
More information1-megabit (64K x 16) 3-volt Only Flash Memory AT49BV1024A AT49LV1024A
Features Single-voltage Operation Read/Write Operation: 2.7V to 3.6V (BV). 3.0V to 3.6V(LV) Fast Read Access Time 45 ns Internal Program Control and Timer 8K Word Boot Block with Lockout Fast Erase Cycle
More informationFPGA Configuration EEPROM Memory AT17C65 AT17LV65 AT17C128 AT17LV128 AT17C256 AT17LV256
Features EE Programmable 65,536 x 1-, 131,072 x 1-, and 262,144 x 1-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays (FPGAs) In-System Programmable via 2-wire
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K/K/8K/6K/K SPI Serial CMOS E PROM FEATURES 0 MHz SPI Compatible.8 to 6.0 Volt Operation Hardware and Software Protection Zero Standby Current Low Power CMOS Technology SPI Modes (0,0 &,) Commercial, Industrial
More information256K (32K x 8) Paged Parallel EEPROMs AT28C256. Features. Description
Features Fast Read Access Time - 150 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms
More information8051 Microcontrollers. Application Note. Migration from AT89C5131 & AT89C5131A-L to AT89C5131A-M
Migration from AT89C5131 & AT89C5131A-L to AT89C5131A-M This application note is a guide to assist current AT89C5131 & AT89C5131A-L users in converting existing designs to the AT89C5131A-M devices. In
More information256K (32K x 8) 5-volt Only Flash Memory AT29C256
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Page Program Operation Single Cycle Reprogram (Erase and Program) Internal Address and Data Latches for 64 Bytes Internal Program Control
More informationhex file. The example described in this application note is written for the AT94K using the FPSLIC Starter Kit. Creating a New Project
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In-System Circuits for AT1 Series Configurators with Atmel and Xilinx s Atmel AT1 (1) series configurators use a simple serial-access procedure to configure one or more Field Programmable Gate Arrays (s)
More information256 (32K x 8) High-speed Parallel EEPROM AT28HC256
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum
More informationFPGA Configuration EEPROM Memory. Application Note. Programming Atmel s EEPROMs: AT17LV020(A) vs. AT17LV002(A) Introduction.
Programming Atmel s EEPROMs: AT17LV020(A) vs. AT17LV002(A) Introduction This application note provides Atmel s customers with a description of the principal differences in programming the AT17LV020(A)
More information4-megabit (512K x 8) 5-volt Only 256-byte Sector Flash Memory AT29C040A
Features Fast Read Access Time 90 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 2048 Sectors (256 Bytes/Sector) Internal Address and Data Latches for
More informationX K x 8 Bit 64K. 5MHz SPI Serial E 2 PROM with Block Lock TM Protection
64K X25650 5MHz SPI Serial E 2 PROM with Block Lock TM Protection 8K x 8 Bit FEATURES 5MHz Clock Rate Low Power CMOS
More informationSPI. 64K Bits. Serial EEPROM
GT25C64 SPI 64K Bits Serial EEPROM Copyright 2011 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time
More informationBattery-Voltage. 4-megabit (512K x 8/ 256K x 16) Single 2.7-volt. Flash Memory AT49BV4096A AT49LV4096A
Features Single-voltage Read/Write Operation: 2.7V to 3.6V (BV), 3.0V to 3.6V (LV) Fast Read Access Time 70 ns Internal Erase/Program Control Sector Architecture One 8K Word (16K Bytes) Boot Block with
More information2-megabit (256K x 8) 3-volt Only Flash Memory AT29LV020
Features Single Voltage, Range 3V to 3.6V Supply 3-volt Only Read and Write Operation Software Protected Programming Fast Read Access Time - 100 ns Low Power Dissipation 15mAActiveCurrent 40 µa CMOS Standby
More informationISSI Preliminary Information January 2006
2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM January 2006 FEATURES Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Low-voltage Operation Vcc = 1.8V to 5.5V Low
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Annulled Cycle Management on the TSC695 The aim of this application note is to provide TSC695 users with an overview of the annulled cycle management on the TSC695 processor. The indication of annulled
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AT91M55800A Clock Switching Considerations using Advanced Power Management Controller Introduction The AT91M55800A is designed for ultra low-power applications and features an Advanced Power Management
More informationDatasheetDirect.com. Visit to get your free datasheets. This datasheet has been downloaded by
DatasheetDirect.com Your dedicated source for free downloadable datasheets. Over one million datasheets Optimized search function Rapid quote option Free unlimited downloads Visit www.datasheetdirect.com
More information2-megabit 5-volt Only Serial DataFlash AT45D021A
Features 100% Compatible to AT45D021 Single 4.5V - 5.5V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 1024 Pages (264 Bytes/Page) Main Memory Optional
More informationAT45DB Megabit 2.7-Volt Only Serial DataFlash AT45DB041. Features. Description. Pin Configurations
Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 2048 Pages (264 Bytes/Page) Main Memory Two 264-Byte Data Buffers - Allows
More information32-megabit 2.7-volt Only Serial DataFlash AT45DB321B
Features 100% Compatible to AT45DB321 Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 8192 Pages (528 Bytes/Page) Main Memory Optional
More informationTSSOP CLK/IN IN IN IN IN IN IN IN IN IN IN GND VCC IN I/O I/O I/O I/O I/O I/O I/O I/O IN OE/IN CLK/IN 1 VCC
* Features Industry Standard Architecture Emulates Many 24-pin PALs Low-cost Easy-to-use Software Tools High-speed Electrically-erasable Programmable Logic Devices 7.5 ns Maximum Pin-to-pin Delay Several
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Parallel EEPROM Data Protection Advantages of EEPROMs EEPROMs provide the memory solution wherever reprogrammable, nonvolatile memory is required. They are easy to use, requiring little or no support hardware
More information8-megabit (1M x 8/ 512K x 16) Flash Memory AT49BV008A AT49BV008AT AT49BV8192A AT49BV8192AT AT49LV8192A
Features Single-voltage Read/Write Operation: 2.7V to 3.6V (BV), 3.0V to 3.6V (LV) Fast Read Access Time 90 ns Internal Erase/Program Control Sector Architecture One 8K Word (16K Bytes) Boot Block with
More informationFPGA Configuration EEPROM Memory AT17C020A AT17LV020A
Features Serial EEPROM Family for Configuring Altera FLEX Devices Simple Interface to SRAM FPGAs EE Programmable 2M-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate
More information2-Wire Serial EEPROM AT24C02A AT24C04A AT24C08A AT24C02A/04A/ 08A. Features. Description. Pin Configurations. 2K (256 x 8) 4K (512 x 8) 8K (1024 x 8)
Features Write Protect Pin for Hardware Data Protection Utilizes Different Array Protection Compared to the A24C02/04/08 Low Voltage and tandard Voltage Operation 5.0 (V CC = 4.5V to 5.5V) 2.7 (V CC =
More informationFPGA Configuration EEPROM Memory AT17C65A AT17LV65A AT17C128A AT17LV128A AT17C256A AT17LV256A
Features Serial EEPROM Family for Configuring Altera FLEX Devices In-System Programmable via 2-wire Bus Simple Interface to SRAM FPGAs EE Programmable 64K, 128K and 256K Bits Serial Memories Designed to
More information1-megabit (128K x 8) 5-volt Only Flash Memory AT29C010A
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 1024 Sectors (128 Bytes/Sector) Internal Address and Data Latches for
More informationISSI IS25C02 IS25C04 2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM FEATURES DESCRIPTION. Advanced Information January 2005
2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM January 2005 FEATURES Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Low power CMOS Active current less than 3.0
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More informationGT25C256 SPI. 256K Bits. Serial EEPROM
GT25C256 SPI 256K Bits Serial EEPROM Copyright 2013 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time
More information2-megabit (256K x 8) 5-volt Only Flash Memory AT29C020
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 1024 Sectors (256 Bytes/Sector) Internal Address and Data Latches for
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Features High Performance CMOS Technology Low Power Dissipation - Active and Standby Hardware and Software Data Protection Features DATA Polling for End of Write Detection High Reliability Endurance: 10
More information1-megabit (128K x 8) 5-volt Only Flash Memory AT49F001A AT49F001AN AT49F001AT AT49F001ANT. Features. Description. Pin Configurations
Features Single-voltage Operation 5V Read 5V Reprogramming Fast Read Access Time 45 ns Internal Program Control and Timer Sector Architecture One 16K Bytes Boot Block with Programming Lockout Two 8K Bytes
More information2-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 (1) AT24C16 (2) Features. Description. Pin Configurations. 1K (128 x 8) 2K (256 x 8)
Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire
More informationDIP Top View VCC RESET A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND A14 A13 A8 A9 A11 A10 I/O7 I/O6 I/O5 I/O4 I/O3
Features Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (LV) Fast Read Access Time - 70 ns Internal Program Control and Timer Sector Architecture One 16K Byte Boot Block with Programming
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Features Single Voltage, Range 3V to 3.6V Supply 3-volt Only Read and Write Operation Software Protected Programming Fast Read Access Time 150 ns Low Power Dissipation 15 ma Active Current 40 µa CMOS Standby
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Features New Enhanced Baud Rate Generator Generates Any Required Baud Rate Maximum 6 Mbps (0.35 µm) High Baud Rates at Low Crystal Clock Frequencies 6-, 7-, 8- or 9-bit Data Noise Filtering and Noise Error
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More informationDIP Top View * RESET A16 A15 A12 VCC A17 A14 A13 A8 A9 A11 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 A10 I/O7 I/O6 I/O5 I/O4 I/O3 I/O1 I/O2 GND
Features Single-voltage Operation 5V Read 5V Reprogramming Fast Read Access Time 55 ns Internal Program Control and Timer Sector Architecture One 16K Bytes Boot Block with Programming Lockout Two 8K Bytes
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64Kbit 2.7V Minimum Non-volatile Serial Memory SPI Bus Features Memory array: 64Kbit EEPROM-compatible serial memory Single supply voltage: 2.7V - 3.6V Serial peripheral interface (SPI) compatible Supports
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