SPI Serial EEPROMs AT25010 AT25020 AT SPI, 1K Serial E 2 PROM. Features. Description. Pin Configurations 8-Pin PDIP. 1K (128 x 8) 2K (256 x 8)
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1 Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and 3 (1,1) Low-Voltage and Standard-Voltage Operation 5. (V CC = 4.5V to 5.5V).7 (V CC =.7V to 5.5V) 1.8 (V CC = 1.8V to 3.6V).1 MHz Clock Rate (5V) Compatibility 8-Byte Page Mode Block Write Protection Protect 1/4, 1/, or Entire Array Write Protect (WP) Pin and Write Disable Itructio for Both Hardware and Software Data Protection Self-Timed Write Cycle (1 ms max) High Reliability Endurance: 1 Million Write Cycles Data Retention: 1 Years ESD Protection: >4V Automotive Grade and Extended Temperature Devices Available 8-Pin PDIP and JEDEC SOIC Packages Description The AT51//4 provides 14/48/496 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 18/56/51 words of 8 bits each. The device is optimized for use in many industrial and commercial applicatio where low power and low voltage operation are essential. The AT51//4 is available in space saving 8-pin PDIP and 8-pin JEDEC (SOIC) packages. The AT51//4 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface coisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate ERASE cycle is required before WRITE. BLOCK WRITE protection is enabled by programming the status register with one of four blocks of write protection. Separate program enable and program disable itructio are provided for additional data protection. Hardware data protection is provided via the WP pin to protect agait inadvertent write attempts. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Pin Configuratio Pin Name Function 8-Pin PDIP SPI Serial EEPROMs 1K (18 x 8) K (56 x 8) 4K (51 x 8) AT51 AT5 AT54 SPI, 1K Serial E PROM CS SCK SI Chip Select Serial Data Clock Serial Data Input CS SO WP GND VCC HOLD SCK SI SO Serial Data Output GND VCC Ground Power Supply 8-Pin SOIC WP HOLD Write Protect Suspends Serial Input CS SO WP GND VCC HOLD SCK SI Rev. 66E 8/98 1
2 Absolute Maximum Ratings* Operating Temperature C to + 15 C Storage Temperature C to + 15 C Voltage on Any Pin with Respect to Ground...-1.V to + 7.V Maximum Operating Voltage V *NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of this specification is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. DC Output Current ma Block Diagram AT51//4
3 AT51//4 Pin Capacitance (1) Applicable over recommended operating range from T A = 5 C, f = 1. MHz, V CC = +5.V (unless otherwise noted). Symbol Test Conditio Max Units Conditio C OUT Output Capacitance (SO) 8 pf V OUT = V C IN Input Capacitance (CS, SCK, SI, WP, HOLD) 6 pf V IN = V Note: 1. This parameter is characterized and is not 1% tested. DC Characteristics Applicable over recommended operating range from: T AI = -4 C to +85 C, V CC = +1.8V to +5.5V, T AC = C to +7 C, V CC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Max Units V CC1 (1) Supply Voltage V V CC Supply Voltage V V CC3 Supply Voltage V I CC1 Supply Current V CC = 5.V at 1 MHz, SO = Open 3. ma I CC Supply Current V CC = 5.V at MHz, SO = Open 6. ma I SB1 (1) Standby Current V CC = 1.8V CS = V CC 1 µa I SB Standby Current V CC =.7V CS = V CC 1 µa I SB3 Standby Current V CC = 5.V CS = V CC 1 µa I IL Input Leakage V IN = V to V CC µa I OL Output Leakage V IN = V to V CC, T AC = C to 7 C µa V IL () Input Low Voltage -.6 V CC x.3 V V IH () Input High Voltage V CC x.7 V CC +.5 V V OL1 Output Low Voltage I OL =. ma.4 V 4.5V V CC 5.5V V OH1 Output High Voltage I OH = -1. ma V CC -.8 V V OL Output Low Voltage I OL =.15 ma. V 1.8V V CC 3.6V V OH Output High Voltage I OH = -1 µa V CC -. V Notes: 1. This parameter is preliminary and Atmel may change the specificatio upon further characterization.. V IL min and V IH max are reference only and are not tested. 3
4 AC Characteristics Applicable over recommended operating range from T A = -4 C to +85 C, V CC = As Specified, CL = 1 TTL Gate and 1 pf (unless otherwise noted). Symbol Parameter Voltage Min Max Units f SCK SCK Clock Frequency MHz t RI Input Rise Time µs t FI Input Fall Time µs t WH SCK High Time 8 t WL SCK Low Time 8 t CS CS High Time t CSS CS Setup Time t CSH CS Hold Time t SU Data In Setup Time t H Data In Hold Time t HD Hold Setup Time t CD Hold Hold Time 4 t V Output Valid 4 8 t HO Output Hold Time 4 AT51//4
5 AT51//4 AC Characteristics (Continued) Applicable over recommended operating range from T A = -4 C to +85 C, V CC = As Specified, CL = 1 TTL Gate and 1 pf (unless otherwise noted). Symbol Parameter Voltage Min Max Units t LZ Hold to Output Low Z t HZ Hold to Output High Z t DIS Output Disable Time t WC Write Cycle Time 1 ms Endurance 5.V, 5 C, Page Mode 1M Write Cycles Note: 1. This parameter is characterized and is not 1% tested. 5
6 Serial Interface Description MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT51//4 always operates as a slave. TRANSMITTER/RECEIVER: The AT51//4 has separate pi designated for data tramission (SO) and reception (SI). MSB: The Most Significant Bit (MSB) is the first bit tramitted and received. SERIAL OP-CODE: After the device is selected with CS going low, the first byte will be received. This byte contai the op-code that defines the operatio to be performed. The op-code also contai address bit A8 in both the READ and WRITE itructio. INVALID OP-CODE: If an invalid op-code is received, no data will be shifted into the AT51//4, and the serial output pin (SO) will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize the serial communication. CHIP SELECT: The AT51//4 is selected when the CS pin is low. When the device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO) will remain in a high impedance state. HOLD: The HOLD pin is used in conjunction with the CS pin to select the AT51//4. When the device is selected and a serial sequence is underway, HOLD can be used to pause the serial communication with the master device without resetting the serial sequence. To pause, the HOLD pin must be brought low while the SCK pin is low. To resume serial communication, the HOLD pin is brought high while the SCK pin is low (SCK may still toggle during HOLD). Inputs to the SI pin will be ignored while the SO pin is in the high impedance state. WRITE PROTECT: The write protect pin (WP) will allow normal read/write operatio when held high. When the WP pin is brought low, all write operatio are inhibited. WP going low while CS is still low will interrupt a write to the AT51//4. If the internal write cycle has already been initiated, WP going low will have no effect on any write operation. SPI Serial Interface 6 AT51//4
7 AT51//4 Functional Description The AT51//4 is designed to interface directly with the synchronous serial peripheral interface (SPI) of the 685 and 68HC11 series of microcontrollers. The AT51//4 utilizes an 8-bit itruction register. The list of itructio and their operation codes are contained in Table 1. All itructio, addresses, and data are traferred with the MSB first and start with a high-to-low CS traition. Table 1. Itruction Set for the AT51//4 Itruction Name Itruction Format Operation WREN X11 Set Write Enable Latch WRDI X1 Reset Write Enable Latch RDSR X11 Read Status Register WRSR X1 Write Status Register READ A11 Read Data from Memory Array WRITE A1 Write Data to Memory Array Note: A represents MSB address bit A8. WRITE ENABLE (WREN): The device will power up in the write disable state when V CC is applied. All programming itructio must therefore be preceded by a Write Enable itruction. The WP pin must be held high during a WREN itruction. WRITE DISABLE (WRDI): To protect the device agait inadvertent writes, the Write Disable itruction disables all programming modes. The WRDI itruction is independent of the status of the WP pin. READ STATUS REGISTER (RDSR): The Read Status Register itruction provides access to the status register. The READY/BUSY and Write Enable status of the device can be determined by the RDSR itruction. Similarly, the Block Write Protection bits indicate the extent of protection employed. These bits are set by using the WRSR itruction. Table. Status Register Format Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit Bit 1 Bit X X X X BP1 BP WEN RDY Table 3. Read Status Register Bit Definition Bit Bit (RDY) Bit 1 (WEN) Definition Bit (BP) See Table 4. Bit 3 (BP1) See Table 4. Bit = (RDY) indicates the device is READY. Bit = 1 indicates the write cycle is in progress. Bit 1 = indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates the device is WRITE ENABLED. Bits 4-7 are s when device is not in an internal write cycle. Bits -7 are 1s during an internal write cycle. WRITE STATUS REGISTER (WRSR): The WRSR itruction allows the user to select one of four levels of protection. The AT51//4 is divided into four array segments. Top quarter (1/4), Top half (1/), or all of the memory segments can be protected. Any of the data within any selected segment will therefore be READ only. The block write protection levels and corresponding status register control bits are shown in Table 4. The two bits, BP1 and BP are nonvolatile cells that have the same properties and functio as the regular memory cells (e.g. WREN, t WC, RDSR). Table 4. Block Write Protect Bits Level Status Register Bits Array Addresses Protected BP1 BP AT51 AT5 AT54 None None None 1 (1/4) 1 6-7F C-FF 18-1FF (1/) 1 4-7F 8-FF 1-1FF 3 (All) 1 1-7F -FF -1FF READ SEQUENCE (READ): Reading the AT51//4 via the SO (Serial Output) pin requires the following sequence. After the CS line is pulled low to select a device, the READ op-code (including A8) is tramitted via the SI line followed by the byte address to be read (A7-A). Upon completion, any data on the SI line will be ignored. The data (D7-D) at the specified address is then shifted out onto the SO line. If only one byte is to be read, the CS line should be driven high after the data comes out. The READ sequence can be continued since the byte address is automatically incremented and data will continue to be shifted out. When the highest address is reached, the address counter will roll over to the lowest address allowing the entire memory to be read in one continuous READ cycle. 7
8 WRITE SEQUENCE (WRITE): In order to program the AT51//4, the Write Protect pin (WP) must be held high and two separate itructio must be executed. First, the device must be write enabled via the Write Enable (WREN) Itruction. Then a Write (WRITE) Itruction may be executed. Also, the address of the memory location(s) to be programmed must be outside the protected address field location selected by the Block Write Protection Level. During an internal write cycle, all commands will be ignored except the RDSR itruction. A Write Itruction requires the following sequence. After the CS line is pulled low to select the device, the WRITE op-code (including A8) is tramitted via the SI line followed by the byte address (A7-A) and the data (D7-D) to be programmed. Programming will start after the CS pin is brought high. (The LOW to High traition of the CS pin must occur during the SCK low time immediately after clocking in the D (LSB) data bit. The READY/BUSY status of the device can be determined by initiating a READ STATUS REGISTER (RDSR) Itruction. If Bit = 1, the WRITE cycle is still in progress. If Bit =, the WRITE cycle has ended. Only the READ STATUS REGISTER itruction is enabled during the WRITE programming cycle. The AT51//4 is capable of an 8-byte PAGE WRITE operation. After each byte of data is received, the three low order address bits are internally incremented by one; the six high order bits of the address will remain cotant. If more than 8 bytes of data are tramitted, the address counter will roll over and the previously written data will be overwritten. The AT51//4 is automatically returned to the write disable state at the completion of a WRITE cycle. NOTE: If the WP pin is brought low or if the device is not Write enabled (WREN), the device will ignore the Write itruction and will return to the standby state, when CS is brought high. A new CS falling edge is required to re-initiate the serial communication. 8 AT51//4
9 AT51//4 Timing Diagrams Synchronous Data Timing (for mode ) t CS CS V IH V IL tcss t CSH SCK V IH t WH t WL V IL t SU t H SI V IH V IL VALID IN t V t HO t DIS SO V OH HI-Z HI-Z V OL WREN Timing WRDI Timing 9
10 RDSR Timing CS SCK SI INSTRUCTION DATA OUT HIGH IMPEDANCE SO MSB WRSR Timing CS SCK SI INSTRUCTION DATA IN SO HIGH IMPEDANCE READ Timing 1 AT51//4
11 AT51//4 WRITE Timing CS SCK SI INSTRUCTION BYTE ADDRESS TH BIT OF ADDRESS DATA IN SO HIGH IMPEDANCE HOLD Timing CS SCK t CD t CD t HD HOLD t HD t HZ SO t LZ 11
12 AT51 Ordering Information t WP (max) (ms) I CC (max) (µa) I SB (max) (µa) AT51-1PC AT51N-1SC 1 AT51-1PI AT51N-1SI AT51-1PC-.7 AT51N-1SC AT51-1PI-.7 AT51N-1SI AT51-1PC-1.8 AT51N-1SC AT51-1PI-1.8 AT51N-1SI-1.8 f MAX (khz) Ordering Code Package Operation Range ( C to 7 C) (-4 C to 85 C) ( C to 7 C) (-4 C to 85 C) ( C to 7 C) (-4 C to 85 C) Package Type 8-Lead,.3" Wide, Plastic Dual Inline Package (PDIP) 8-Lead,.15" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Optio Blank Standard Device (4.5V to 5.5V) -.7 Low Voltage (.7V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 1 AT51//4
13 AT51//4 AT5 Ordering Information t WP (max) (ms) I CC (max) (µa) I SB (max) (µa) AT5-1PC AT5N-1SC 1 1 AT5-1PI AT5N-1SI AT5-1PC-.7 AT5N-1SC AT5-1PI-.7 AT5N-1SI AT5-1PC-1.8 AT5N-1SC AT5-1PI-1.8 AT5N-1SI-1.8 f MAX (khz) Ordering Code Package Operation Range ( C to 7 C) (-4 C to 85 C) ( C to 7 C) (-4 C to 85 C) ( C to 7 C) (-4 C to 85 C) Package Type 8-Lead,.3" Wide, Plastic Dual Inline Package (PDIP) 8-Lead,.15" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Optio Blank Standard Device (4.5V to 5.5V) -.7 Low Voltage (.7V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 13
14 AT54 Ordering Information t WP (max) (ms) I CC (max) (µa) I SB (max) (µa) AT54-1PC AT54N-1SC 1 1 AT54-1PI AT54N-1SI AT54-1PC-.7 AT54N-1SC AT54-1PI-.7 AT54N-1SI AT54-1PC-1.8 AT54N-1SC AT54-1PI-1.8 AT54N-1SI-1.8 f MAX (khz) Ordering Code Package Operation Range ( C to 7 C) (-4 C to 85 C) ( C to 7 C) (-4 C to 85 C) ( C to 7 C) (-4 C to 85 C) Package Type 8-Lead,.3" Wide, Plastic Dual Inline Package (PDIP) 8-Lead,.15" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) Optio Blank Standard Device (4.5V to 5.5V) -.7 Low Voltage (.7V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 14 AT51//4
15 AT51//4 Packaging Information, 8-Lead,.3" Wide, Plastic Dual Inline Package (PDIP) Dimeio in Inches and (Millimeters) JEDEC STANDARD MS-1 BA, 8-Lead,.15" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimeio in Inches and (Millimeters).4 (1.16).355 (9.). (.58).13 (.33) PIN 1.8 (7.11).4 (6.1) PIN (3.99).15 (3.81).44 (6.).8 (5.79).3 (7.6) REF.37 (.94).7 (.69).5 (1.7) BSC.1 (5.33) MAX SEATING PLANE.15 (3.81).115 (.9).1 (.35).8 (.3).7 (1.78).45 (1.14).1 (.54) BSC.15 (.38) MIN. (.559).14 (.356).35 (8.6).3 (7.6) 15 REF.43 (1.9) MAX.196 (4.98).189 (4.8).1 (.54).4 (.1).68 (1.73).53 (1.35) REF.1 (.54) 8.7 (.3).5 (1.7).16 (.46) 15
16 Atmel Headquarters Corporate Headquarters 35 Orchard Parkway San Jose, CA TEL (48) FAX (48) Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL (44) FAX (44) Atmel Operatio Atmel Colorado Springs 115 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 896 TEL (719) FAX (719) Atmel Rousset Zone Industrielle 1316 Rousset Cedex, France TEL (33) FAX (33) Asia Atmel Asia, Ltd. Room 119 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon, Hong Kong TEL (85) FAX (85) Japan Atmel Japan K.K. Tonetsu Shinkawa Bldg., 9F Shinkawa Chuo-ku, Tokyo Japan TEL (81) FAX (81) Fax-on-Demand North America: 1-(8) International: 1-(48) literature@atmel.com Web Site BBS 1-(48) Atmel Corporation Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company s standard warranty which is detailed in Atmel s Terms and Conditio located on the Company s website. The Company assumes no respoibility for any errors which may appear in this document, reserves the right to change devices or specificatio detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licees to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel s products are not authorized for use as critical components in life support devices or systems. Marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper. 66E 8/98/xM
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Features Single-voltage Operation 5V Read 5V Reprogramming Fast Read Access Time 35 ns Internal Program Control and Timer 8K Word Boot Block with Lockout Fast Erase Cycle Time 10 seconds Word-by-word Programming
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Features Fast Read Access Time - 150 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms
More informationTwo-wire Serial EEPROM Smart Card Modules 128K (16,384 x 8) 256 (32,768 x 8) AT24C128SC AT24C256SC. Features. Description VCC NC
Features Low-voltage and Standard-voltage Operation, V CC = 2.7V to 5.5V Internally Organized 16,384 x 8 and 32,768 x 8 2-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bi-directional
More informationFPGA Configuration EEPROM Memory AT17C65 AT17LV65 AT17C128 AT17LV128 AT17C256 AT17LV256
Features EE Programmable 65,536 x 1-, 131,072 x 1-, and 262,144 x 1-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays (FPGAs) In-System Programmable via 2-wire
More informationDistributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. APPLICATION NOTE A V A I L A B L E AN61 16K X25160 2K x 8 Bit SPI Serial
More information256 (32K x 8) High-speed Parallel EEPROM AT28HC256
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum
More information1-megabit (64K x 16) 3-volt Only Flash Memory AT49LV1024 AT49LV1025
Features Single-voltage Operation 3V Read 3.1V Programming Fast Read Access Time 55 ns Internal Program Control and Timer 8K Word Boot Block with Lockout Fast Erase Cycle Time 10 seconds Word-by-Word Programming
More informationAT45DB Megabit 2.7-Volt Only Serial DataFlash AT45DB041. Features. Description. Pin Configurations
Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 2048 Pages (264 Bytes/Page) Main Memory Two 264-Byte Data Buffers - Allows
More informationParallel EEPROM Die Products. Die Products. Features. Description. Testing
Features High Performance CMOS Technology Low Power Dissipation - Active and Standby Hardware and Software Data Protection Features DATA Polling for End of Write Detection High Reliability Endurance: 10
More information64K (8K x 8) Parallel EEPROM with Page Write and Software Data Protection AT28C64B. Features. Description. Pin Configurations
Features Fast Read Access Time 150 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Fast Write Cycle Times Page Write Cycle Time: 10 ms Maximum (Standard) 2 ms Maximum (Option)
More information4-megabit (512K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT49BV040 AT49LV040
Features Single Voltage for Read and Write: 2.7V to 3.6V (BV), 3.0V to 3.6V (LV) Fast Read Access Time 70 ns Internal Program Control and Timer 16K Bytes Boot Block with Lockout Fast Chip Erase Cycle Time
More informationAT25M01. SPI Serial EEPROM 1-Mbit (131,072 x 8) DATASHEET. Features. Description
AT25M1 SPI Serial EEPROM 1-Mbit (131,72 x 8) DATASHEET Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and 3 (1,1) Datasheet Describes Mode Operation Low-voltage Operation
More informationTSSOP CLK/IN IN IN IN IN IN IN IN IN IN IN GND VCC IN I/O I/O I/O I/O I/O I/O I/O I/O IN OE/IN CLK/IN 1 VCC
* Features Industry Standard Architecture Emulates Many 24-pin PALs Low-cost Easy-to-use Software Tools High-speed Electrically-erasable Programmable Logic Devices 7.5 ns Maximum Pin-to-pin Delay Several
More information2-wire Serial EEPROM AT24C21. 2-Wire, 1K Serial EEPROM. Features. Description. Not Recommended for New Designs. Pin Configurations.
Features 2-wire Serial Interface Schmitt Trigger, Filtered Inputs For Noise Suppression DDC1 / DDC2 Interface Compliant for Monitor Identification Low-voltage Operation 2.5 (V CC = 2.5V to 5.5V) Internally
More informationTwo-wire Serial EEPROM Smart Card Modules 1K (128 x 8) 2K (256 x 8) 4K (512 x 8) 8K (1024 x 8) 16K (2048 x 8)
Features Low-voltage and Standard-voltage Operation, VCC = 2.7V 5.5V Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K), or 2048 x 8 (16K) Two-wire Serial Interface Schmitt Trigger,
More informationFPGA Configuration EEPROM Memory AT17C020A AT17LV020A
Features Serial EEPROM Family for Configuring Altera FLEX Devices Simple Interface to SRAM FPGAs EE Programmable 2M-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate
More information2-Wire Serial EEPROM AT24C02A AT24C04A AT24C08A AT24C02A/04A/ 08A. Features. Description. Pin Configurations. 2K (256 x 8) 4K (512 x 8) 8K (1024 x 8)
Features Write Protect Pin for Hardware Data Protection Utilizes Different Array Protection Compared to the A24C02/04/08 Low Voltage and tandard Voltage Operation 5.0 (V CC = 4.5V to 5.5V) 2.7 (V CC =
More informationCAT25C02/04/08/16/32 2K/4K/8K/16K/32K SPI Serial CMOS E 2 PROM FEATURES
K/K/8K/6K/K SPI Serial CMOS E PROM FEATURES 0 MHz SPI Compatible.8 to 6.0 Volt Operation Hardware and Software Protection Zero Standby Current Low Power CMOS Technology SPI Modes (0,0 &,) Commercial, Industrial
More informationX K x 8 Bit 64K. 5MHz SPI Serial E 2 PROM with Block Lock TM Protection
64K X25650 5MHz SPI Serial E 2 PROM with Block Lock TM Protection 8K x 8 Bit FEATURES 5MHz Clock Rate Low Power CMOS
More informationGT25C256 SPI. 256K Bits. Serial EEPROM
GT25C256 SPI 256K Bits Serial EEPROM Copyright 2013 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time
More informationSPI. 64K Bits. Serial EEPROM
GT25C64 SPI 64K Bits Serial EEPROM Copyright 2011 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time
More informationSecure Microcontrollers for Smart Cards. AT90SC Summary
Features High-performance, Low-power 8-bit AVR RISC Architecture 120 Powerful Instructions Most Single Clock Cycle Execution Up to 64K Bytes Flash Program Memory Endurance: 10K Write/Erase Cycles Up to
More informationDIP Top View VCC RESET A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND A14 A13 A8 A9 A11 A10 I/O7 I/O6 I/O5 I/O4 I/O3
Features Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (LV) Fast Read Access Time - 70 ns Internal Program Control and Timer Sector Architecture One 16K Byte Boot Block with Programming
More informationISSI Preliminary Information January 2006
2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM January 2006 FEATURES Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Low-voltage Operation Vcc = 1.8V to 5.5V Low
More information1-megabit 2.7-volt Only Serial DataFlash AT45DB011. AT45DB011 Preliminary 16- Megabit 2.7-volt Only Serial DataFlash
Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 512 Pages (264 Bytes/Page) Main Memory Optional Page and Block Erase Operations
More information256 (32K x 8) High-speed Parallel EEPROM AT28HC256N. Features. Description. Pin Configurations
Features Fast Read Access Time 90 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum
More informationHighperformance EE PLD ATF16V8B ATF16V8BQ ATF16V8BQL. Features. Block Diagram. All Pinouts Top View
Features Industry-standard Architecture Emulates Many 20-pin PALs Low-cost Easy-to-use Software Tools High-speed Electrically-erasable Programmable Logic Devices 7.5 ns Maximum Pin-to-pin Delay Several
More information2-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 AT24C16
Features Low-voltage and Standard-voltage Operation 2.7(V CC =2.7Vto5.5V) 1.8(V CC =1.8Vto5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire Serial
More informationa Serial Peripheral Interace (SPI). Embedded RISC Microcontroller Core Peripheral
Features Full-duplex, 3-wire Synchronous Data Transfer Master or Slave Operation Maximum Bit Frequency of f CLOCK /4 (in M-bits/second) LSB First or MSB First Data Transfer Four Programmable Bit Rates
More informationISSI IS25C02 IS25C04 2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM FEATURES DESCRIPTION. Advanced Information January 2005
2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM January 2005 FEATURES Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Low power CMOS Active current less than 3.0
More information64K (8K x 8) High Speed Parallel EEPROM with Page Write and Software Data Protection AT28HC64BF
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Fast Write Cycle Times Page Write Cycle Time: 2 ms Maximum (Standard) 1 to 64-byte Page
More information32-megabit 2.7-volt Only Serial DataFlash AT45DB321. AT45DB321 Preliminary 16- Megabit 2.7-volt Only Serial DataFlash
Features Single 2.7V - 3.6V Supply Serial-interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 8192 Pages (528 Bytes/Page) Main Memory Optional Page and Block Erase
More informationDIP Top View VCC A12 A14 A13 A6 A5 A4 A3 A2 A1 A0 A8 A9 A11 A10 I/O7 I/O6 I/O0 I/O1 I/O2 I/O5 I/O4 I/O3 GND. TSOP Top View Type 1 A11 A9 A8 A13 A14
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Page Program Operation Single Cycle Reprogram (Erase and Program) Internal Address and Data Latches for 64 Bytes Internal Program Control
More informationEPROM. Application Note CMOS EPROM. Interfacing Atmel LV/BV EPROMs on a Mixed 3-Volt/5- Volt Data Bus
Interfacing Atmel LV/BV EPROMs on a Mixed 3-volt/5-volt Data Bus Introduction Interfacing Atmel Corporation s low voltage (LV/BV) EPROMs on a common data bus with standard 5-volt devices can be achieved
More information2-Wire Serial EEPROM 32K (4096 x 8) 64K (8192 x 8) AT24C32A AT24C64A. Features. Description. Pin Configurations
Features Low-Voltage and Standard-Voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Low-Power Devices (I SB = 6 µa @ 5.5V) Available Internally Organized 4096 x 8, 8192 x 8 2-Wire Serial
More informationTwo-Wire Serial EEPROM AT24C164 (1)
Features Low Voltage and Standard Voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Internally Organized 2048 x 8 (16K) Two-Wire Serial Interface Schmitt Trigger, Filtered Inputs for
More informationFeatures INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS COMPARATOR AND WRITE ENABLE EEPROM ARRAY READ/WRITE AMPS DATA IN/OUT REGISTER 16 BITS
July 2000 FM9366 (MICROWIRE Bus Interface) 4096- Serial EEPROM General Description FM9366 is a 4096-bit CMOS non-volatile EEPROM organized as 256 x 16-bit array. This device features MICROWIRE interface
More information2-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 AT24C16. Features. Description. Pin Configurations. 1K (128 x 8) 2K (256 x 8) 4K (512 x 8)
Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-wire
More informationGT25C64 SPI. 64K bits. Serial EEPROM
ADVANCED GT25C64 SPI 64K bits Serial EEPROM www.giantec-semi.com a0 1/20 Table of Content 1 FEATURES... 3 2 DESCRIPTION... 4 3 PIN CONFIGURATION... 5 4 BLOCK DIAGRAM... 6 5 FUNCTIONAL OPERATIONS... 7 6
More information16-megabit 2.7-volt Only Serial DataFlash AT45DB161
Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 4096 Pages (528 Bytes/Page) Main Memory Optional Page and Block Erase
More information512K (64K x 8) 5-volt Only Flash Memory AT29C512
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 512 Sectors (128 Bytes/Sector) Internal Address and Data Latches for 128
More informationAT17A Series FPGA Configuration EEPROM Memory. Application Note. FPGAs. AT17A Series Conversions from Altera FPGA Serial Configuration Memories
ATA Series Conversions from Altera FPGA Serial Configuration Memories Introduction The Atmel ATA FPGA Configuration EEPROM () is a serial memory that can be used to load SRAM based FPGAs. This application
More informationAT24C01A/02/04/08/16. 2-Wire Serial CMOS E 2 PROM. Features. Description. Pin Configurations. 1K (128 x 8) 2K (256 x 8) 4K (512 x 8) 8K (1024 x 8)
AT24C01A/02/04/08/16 Features Low Voltage and Standard Voltage Operation 5.0 (V CC = 4.5V to 5.5V) 2.7 (V CC = 2.7V to 5.5V) 2.5 (V CC = 2.5V to 5.5V) 1.8 (V CC = 1.8V to 5.5V) Internally Organized 128
More information2-wire Serial EEPROM AT24C1024. Features. Description. Pin Configurations. 1M (131,072 x 8)
Features Low-voltage Operation 2.7 (V CC = 2.7V to 5.5V) Internally Organized 3,072 x 8 2-wire Serial Interface Schmitt Triggers, Filtered Inputs for Noise Suppression Bi-directional Data Transfer Protocol
More informationSPI Serial. Electrically Erasable and Programmable Read-only Memory
Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Data Sheet Describes Mode 0 Operation Low-voltage and Standard-voltage Operation 1.8 (V CC = 1.8V to.v) 0MHz
More informationOrCAD Support for Atmel PLDs. Application Note. OrCAD Support for Atmel PLDs. Overview
OrCAD Support for Atmel PLDs Atmel Device Support for OrCAD PLD 386+ ATV750/ATV750B Device Family ATV2500/ATV2500B Device Family For ATF1500 Support Please Contact Atmel PLD Applications For 16V8, 20V8,
More information1-megabit (64K x 16) 3-volt Only Flash Memory AT49BV1024A AT49LV1024A
Features Single-voltage Operation Read/Write Operation: 2.7V to 3.6V (BV). 3.0V to 3.6V(LV) Fast Read Access Time 45 ns Internal Program Control and Timer 8K Word Boot Block with Lockout Fast Erase Cycle
More information64K (8K x 8) High Speed Parallel EEPROM with Page Write and Software Data Protection AT28HC64BF
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Fast Write Cycle Times Page Write Cycle Time: 2 ms Maximum (Standard) 1 to 64-byte Page
More information256K (32K x 8) 5-volt Only Flash Memory AT29C256
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Page Program Operation Single Cycle Reprogram (Erase and Program) Internal Address and Data Latches for 64 Bytes Internal Program Control
More informationRM25C64C. 64Kbit 2.7V Minimum Non-volatile Serial Memory SPI Bus. Features. Description
64Kbit 2.7V Minimum Non-volatile Serial Memory SPI Bus Features Memory array: 64Kbit EEPROM-compatible serial memory Single supply voltage: 2.7V - 3.6V Serial peripheral interface (SPI) compatible Supports
More informationAT94K Series Field Programmable System Level Integrated Circuit. Application Note. FPSLIC Baud Rate Generator
FPSLIC Baud Rate Generator Features: Generates any required baud rate High baud rates at low crystal clock frequencies Uses both internal and external clock sources Supports in both single speed and double
More informationProduct Description. Application Note. AVR360: XmodemCRC Receive Utility for the AVR. Features. Theory of Operation. Introduction
AVR360: XmodemCRC Receive Utility for the AVR Features Programmable Baud Rate Half Duplex 128 Byte Data Packets CRC Data Verification Framing Error Detection Overrun Detection Less than 1k Bytes of Code
More information4-megabit (512K x 8) 5-volt Only 256-byte Sector Flash Memory AT29C040A
Features Fast Read Access Time 90 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 2048 Sectors (256 Bytes/Sector) Internal Address and Data Latches for
More information8-bit Microcontroller. Application Note. AVR134: Real-Time Clock (RTC) using the Asynchronous Timer. Features. Theory of Operation.
: Real-Time Clock (RTC) using the Asynchronous Timer Features Real-Time Clock with Very Low Power Consumption (4µA @ 3.3V) Very Low Cost Solution Adjustable Prescaler to Adjust Precision Counts Time, Date,
More information256K (32K x 8) 5-volt Only Flash Memory AT29C256
Features Fast Read Access Time 70 ns 5-volt Only Reprogramming Page Program Operation Single Cycle Reprogram (Erase and Program) Internal Address and Data Latches for 64 Bytes Internal Program Control
More informationPreparations. Creating a New Project
AVR030: Getting Started with C for AVR Features How to Open a New Project Description of Option Settings Linker Command File Examples Writing and Compiling the C Code How to Load the Executable File Into
More informationTwo-wire Serial EEPROM AT24C11
Features Low Voltage and Standard Voltage Operation 2.7 (V CC = 2.7V to 5.5V).8 (V CC =.8V to 5.5V) Internally Organized 28 x 8 Two-wire Serial Interface Bidirectional Data Transfer Protocol 400 khz (.8V)
More informationInterrupt Controlled UART
AVR306 Design Note: Using the AVR UART in C Features Setup and Use the AVR UART Code Examples for Polled and Interrupt Controlled UART Compact Code C-Code Included for AT90S8515 Description This application
More informationTSSOP CLK/IN IN IN IN IN IN IN 19 I/O I/O I/O IN IN IN IN GND. TSSOP is the smallest package of SPLD offering. DIP/SOIC CLK/IN VCC I/O
Features 3.0V to 5.5V Operating Range Lowest Power in It Class Advanced Low-voltage, Zero-power, Electrically Erasable Programmable Logic Device Zero Standby Power (25 µa Maximum) (Input Transition Detection)
More informationTwo-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 (1) AT24C16 (2)
Features Low-voltage and Standard-voltage Operation.7 (V CC =.7V to.v).8 (V CC =.8V to.v) Internally Organized 8 x 8 (K), 6 x 8 (K), x 8 (4K), 04 x 8 (8K) or 048 x 8 (6K) Two-wire Serial Interface Schmitt
More informationBattery-Voltage. 4-megabit (512K x 8/ 256K x 16) Single 2.7-volt. Flash Memory AT49BV4096A AT49LV4096A
Features Single-voltage Read/Write Operation: 2.7V to 3.6V (BV), 3.0V to 3.6V (LV) Fast Read Access Time 70 ns Internal Erase/Program Control Sector Architecture One 8K Word (16K Bytes) Boot Block with
More informationAT25010B, AT25020B, AT25040B
AT21B, AT22B, AT24B SPI Serial EEPROM 1K (128x8), 2K (26x8), 4K (12x8) DATASHEET Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and 3 (1,1) Data Sheet Describes Mode Operation
More information4-megabit (512K x 8) 5-volt Only 256-byte Sector Flash Memory AT29C040A
Features Fast Read Access Time 90 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 2048 Sectors (256 Bytes/Sector) Internal Address and Data Latches for
More information64K (8K x 8) Battery-Voltage Parallel EEPROM with Page Write and Software Data Protection AT28BV64B
Features Single 2.7V to 3.6V Supply Hardware and Software Data Protection Low Power Dissipation 15 ma Active Current 20 µa CMOS Standby Current Fast Read Access Time 200 ns Automatic Page Write Operation
More information2-megabit (256K x 8) 3-volt Only Flash Memory AT29LV020
Features Single Voltage, Range 3V to 3.6V Supply 3-volt Only Read and Write Operation Software Protected Programming Fast Read Access Time - 100 ns Low Power Dissipation 15mAActiveCurrent 40 µa CMOS Standby
More information1-Megabit (128K x 8) 5-volt Only Flash Memory AT29C010A. Features. Description. Pin Configurations
Features Fast Read Access Time - 70 ns 5-Volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 1024 Sectors (128 bytes/sector) Internal Address and Data Latches for
More information2-megabit (256K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT29BV020
Features Single Supply Voltage, Range 2.7V to 3.6V Single Supply for Read and Write Software Protected Programming Fast Read Access Time 120 ns Low Power Dissipation 15 ma Active Current 50 µa CMOS Standby
More information512K (64K x 8) 3-volt Only Flash Memory AT29LV512
Features Single Supply Voltage, Range 3V to 3.6V 3-volt Only Read and Write Operation Software Protected Programming Low-power Dissipation 15 ma Active Current 50 µa CMOS Standby Current Fast Read Access
More information2-megabit 5-volt Only Serial DataFlash AT45D021A
Features 100% Compatible to AT45D021 Single 4.5V - 5.5V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 1024 Pages (264 Bytes/Page) Main Memory Optional
More information32-megabit 2.7-volt Only Serial DataFlash AT45DB321B
Features 100% Compatible to AT45DB321 Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 8192 Pages (528 Bytes/Page) Main Memory Optional
More information