Micrel 10/100BaseT LAN and SPI Flash Memory Using ichip CO2064SEC

Transcription

1 Reference esign Micrel 0/00aseT LN and SPI Flash Memory Using ihip O0SE Revision History Version ate escription.0 November 00 Original release Introduction This reference design demonstrates the ihip O0SE Secure Ethernet ontroller connected to a 0/00aseT Ethernet LN via an RMII interface, to a host processor via an RS interface, and to a flash memory chip via an SPI interface. LN access is based on ihip O0SE s internal Ethernet M and an external Micrel KSZ0NL chip. The design is intended to connect to a host device through a standard EI RS serial port. onnect One s Ti commands are accepted at baud rates of up to Mbps. Features Standard RS serial input channel Supports serial host interface rates of up to Mbps (0K, M,.M, M) SSL/TLS security implemented in hardware ata and Internet connection through a 0/00aseT Ethernet controller Full hardware flow control Supports Ti commands for Internet connectivity Reference esign This reference design outlines the connections required to link an ihip O0SE Secure Ethernet ontroller with a 0/00aseT Ethernet LN and an external flash memory chip, based on the block diagram, below. The host is connected to ihip O0SE via an RS serial input channel. The external 0/00aseT Ethernet PHY is connected via an RMII interface. The external flash memory (MP0-VMPG from STMicroelectronics) is connected via an SPI interface. onnect One Ltd. opyright November

2 R lock iagram The diagram below illustrates an architecture in which the ihip O0SE loads its firmware from external flash memory. ll the components required for this architecture are listed in the ill of Materials section, below. Schematics Page 00 onnect One Ltd.

3 PLL ORE PLL R 0 ORE.UF/V PF PF MHz Y U XIN XOUT ONREG IO IO IO 9 RES M P HM HP /PIO PIO F/W_RY/TLK0/PIO MSEL/TIO0/PIO ihip_error/tio0/pio T_RY/FIQ/PIO 0 IRQ0/PIO TX/PIO RX/PIO LFT TST VREF 9 PLL ORE ORE ORE ORE SPI0_MISO/S_LK/PIO SPI0_MOSI/S_/PIO SPI0_SPLK/S_/PIO SPI0_S/S_RST/PIO SPI_MISO/S_IO/PIO SPI_MOSI/S_INT/PIO9 SPI_LK/I_TW/PIO0 SPI_S/I_TWK/PIO MII_ERXK/RX/PIO MII_ETX/TR/PIO MII_ETX//PIO MII_ETXER/TX/PIO MII_ERX/SR/PIO MII_ERX/RI/PIO MII_ERS/TS/PIO MII_EOL/RTS/PIO9 MII_ETXK/RMII_REFLK/PIO0 MII_ETXEN/PIO MII_ETX0/PIO MII_ETX/PIO MII_ERXV/RMII_RSV/PIO MII_ERX0/PIO MII_ERX/PIO MII_ERXER/PIO MII_EM/PIO MII_EMIO/PIO9 IRQ/RMII_EF00/PIO RX TR TX TS RTS EREFK ETXEN ETX0 ETX RSV ERX0 ERX ERXER EM EMIO IRQ U MP0-VMPG LK_IN SO SI S HOL WP TS TR RTS RX TX J IO IO IO ORE ORE ORE ORE 0UF/.V HEER O0 0 U. U. U. ORE U.9 U. U. U. U. U. U. 0UF/V 9 0 U.0 U. U. U. PU 0 SPI FLSH Title REFERENE ESIGN O0 LN Size ocument Number Rev.0 ate: Sunday, November 0, 00 Sheet of

4 R 0K KHM0 L UF EMIO IRQ U E/ OUT F00-0MHZ EREFK R RSV R R.K K K ETX ETX0 ETXEN ERXER ERX ERX0 R.K EM UF U 9 XI/REF_LK TX TX TX TX0 TXEN/TX_EN TX RX/PHY0 RX/PHY RX/PHY RX0/UPLEX 9 RX RXV/RSV/ONFIG 0 RXER/RX_ER/ISO OL/ONFIG0 9 RS/ONFIG M MIO INTRP RST KSZ0NL IO_. _. PLL_. X0 TX RX TX- RX- REXT 0 LE0/NWYEN 0 LE/SPEE 00PF 9 0 R.9K% UF R R9 9.9 % 9.9 % R0 R 9.9 % 9.9 % 0UF/V 000PF/KV J TP TN RP TT RT RN N 9 SHIL 0 SHIL 099 RJ 0 R 0 R RMII INTERFE Title REFERENE ESIGN O0 LN Size ocument Number Rev.0 ate: Sunday, November 0, 00 Sheet of

5 R ill of Materials Item Quantity Reference Part Manufacturer.UF/V ny, PF ny,,,, 9, 0,,,,,, 0,, ny 0UF/.V ny, 0UF/V ny,, 9 UF ny 00PF ny 000PF/KV ny 9 J HEER ny 0 J 099 ny L KHM0 ny R 0 ny R 0K ny R, R K ny R, R.K ny R.9K% ny R, R9, R0, R 9.9 % ny R, R 0 ny 9 U O0 onnect One 0 U MP0-VMPG STMicroelectronics U F00-0MHZ FOX U KSZ0NL Micrel Page 00 onnect One Ltd.

6 R Item Quantity Reference Part Manufacturer Y MHZ ny Page 00 onnect One Ltd.