Emerging Non-volatile Storage Memories
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1 Emerging Non-volatile Storage Memories Gian-Luca Bona IBM Research, Almaden Research Center
2 Outline Non-volatile Memory Landscape Emerging Non-volatile Storage Memory Examples - Phase Change Memory - Polymer-based Charge Storage Memory - Storage Probe Memory - Magnetic Shift Register Memory Summary & Conclusion: Expected Advances in Solid State Storage Technology IBM
3 Non-volatile Storage Memories SL m SL m+1 SL m-1 WL n-1 WL n WL n+1 Everyone is looking for a dense (cheap) crosspoint memory. It is relatively easy to identify materials that show bistable hysteretic behavior (easily distinguishable, stable on/off states). IBM
4 The Nonvolatile Memory Landscape
5 The Nonvolatile Memory Landscape More new non-volatile memory technologies under development today than at any time in history 2 reasons Year Flash Technology node (nm) Flash NOR tunnel oxide thickness (nm) Manufacturing solution exist ITRS 2004 Manufacturing solution is known Manufacturing solution is NOT known Scaling: Oxide thickness will reach limit very soon Explosive market growth Diversified applications
6 Non-volatile Storage Memory SCM Specs: Storage Class Memory (SCM): Key Features: Much faster to write small blocks than Flash, HDD Less expensive than Flash More rugged than HDD Lower standby power than HDD Access Time <2.5 us Data Rate (MB/s) Endurance HER (/TB) MTBF (MH) On Power (mw) Standby (mw) Cost ($/GB) <5.5 1.E+05 1.E+03 1.E+01 1.E-01 1.E+01 Tape 1.E-01 HDD 1.E-03 DRAM SCM 1.E-05 1.E-07 1.E-09 Performance (IOPS) CGR 35% Access Time (s)
7 IOPS dependence on access time and data rate IOPS vs Access Time and Data 4kB IO DRAM 1,000, ,000 SCM HDD 10, K-1M IOPS 1, K-100K 3-4 1K-10K 100 NAND (read) K NAND (write) Data Rate (MB/Sec) Access Time (us)
8 Example: Phase Change Solid State Memory (PCM) Writing: transition from crystalline to amorphous phase by melting and fast cooling (10 ns) in GST-material (GeSbTe) Erase: heating over T cryst and slow cooling ( ns) Read: Measure R at low current Companies report contact pore or line diameter as small as 50 nm Most materials characterization is done on blanket films Need to investigate properties of nanostructure to study scaling write temperature erase T melt T cryst crystalline amorphous time M. H. R Lankhorts et al., Philips, Nature Mat. 4 (2005) 347 S. L. Cho et al., Samsung, 2005 Symp. On VLSI Technol.
9 SEM of GST nanostructures Scanning electron microscope image of 200 nm square GST patterns. Scanning electron microscope image of 65 nm round GST patterns. Fabricated nanostructures of variable sizes from GST and 65 nm diameter from GeSb Measured crystallization temperature as a function of structure size (for details see S. Raoux et al., Collaboration IBM, Macronix & Infineon, Sep. 2005, )
10 Crosspoint PCM devices Test arrays: defined by ARC ARC Material focus & fast prototyping: Substantial improvements: -> T G, T cryst -> fast switching, a few ns -> min. cell size: >=65nm Devices >10 8 switching cycles shown Collaboration IBM, Macronix & Infineon 8 Prototyping at MRL Watson
11 Example: Nanotrap Memory Polymer-based Charge Storage Crosspoint Memory First Alq3 layer Wide band-gap organic semiconductor containing... Layer of metallic nanoparticles Between metal electrodes Granular Al or Au Metal electrodes: Al ( 50nm) Granular metal: Al (5 nm) Charge transport medium:alq3 (50 nm) FIB SEM by V. Deline
12 Response of Nanotrap Memory Element Current Density (A/cm 2 ) ON OFF REGION I Al/Alq3/Al/Alq3/Al V th V max V min REGION II REGION III Voltage (V) Region I Bistable ON and OFF states retained for > 1 year Pulse to V max to turn ON Pulse to V min to turn OFF Region II Negative differential resistance Increasing charge on particles L. D. Bozano et al. Appl. Phys Lett., 2004 Region III Normal current flow
13 Example: MILLIPEDE Probe Storage MILLIPEDE SCANNER shuttle MICROMECHANICAL DATA STORAGE permanent magnet (on shutte) fixed coil movable table for storage medium (6.5 x 6.5 mm) parallelization beam Lever Electronic Cell pivot spring system frame Coil Magnet Scanner CMOS Chip Lever Interconnect read resistor write resistor Base Plate Interconnect Bonding Pad Spacer tip capacitive platform hinge 100 nm THERMOMECHANICAL RECORDING 1.14 Tbit / in nm 641 Gbit / in nm LEVER ARRAY 410 Gbit / in nm IBM
14 Small-scale Storage Prototype Small-scale storage prototype comprises: MEMS assembly in form factor (2D array/microscanner/thermal sensors) Readback electronics in non-form factor (parallel operation of up to 8 levers) Navigation/servo system Microcontroller for controlling all functions of prototype storage system MEMS Assembly Microscanner Cantilever array Data controller / ECC Compact Flash Interface 512 byte sector size 4 RS codeword per sector, 4-way interleaved Encoder/Decoder RS (151,129) (1,7) modulation Encoder/Decoder IBM
15 Breaking the Terabit / in 2 Barrier Bit-pitch Areal = Density 13 nm Track-pitch Tbits/in = 27 2 nm Bit pitch 13.3 nm, Track pitch 26.6 nm Single Lever Test-stand Data Set Size > 300 K bits BIT-ERROR RATE 10 4 Track pitch: 26.6 nm On-track min. indent spacing: 26.6 nm Modulation code d=1 Criterion: raw bit-error-rate < 10-4 Conclusion: Thermomechanical recording achieves 1.2 Tbit/in 2 in a stringent, industry-standard areal density demonstration cf. Magnetic recording: < 250 Gbit/in 2 AREAL DENSITY (Gb/in 2 ) IBM
16 Summary: Storage Probe Memory Millipede Demonstration of small-scale prototype storage system with servo navigation and parallel read/write/erase capability using nano-scale probe-storage technology First time a scanning-probe recording technology has reached this level of technical maturity demonstrating joint operation of all building blocks of a storage device Challenges/open questions: - Tracking of multiple probes at sub-nanometer resolution - Optimization of tip/medium interaction - Optimal tradeoff between number of tips, data rate, and power consumption - Dependence of device operation on environmental conditions - System level reliability not yet assessed 2D Cantilever Array on CMOS Chip Storage media on xy scanner IBM
17 Storage-Class Memory: Example: Magnetic Race-track Philosophy Want a solid-state memory with no moving parts which is very cheap and of moderate to high performance Main approaches Make extremely small cells Requires significant engineering developments Current roadmaps suggest that F<45nm will be possible within 5 years, thus making this approach extremely challenging Access multiple bits from one set of logic Similar philosophy used in conventional storage drives and in millipede However we want a solid state memory with no moving parts Recent developments in magnetic materials makes this approach viable and attractive by storing information in domain walls (spatially varying order parameter in homogeneous material) Lots of new science: Spin currents and torque, domain wall fringing fields IBM
18 Current induced Domain wall motion θ = 0, φ Current torque on DW t t 0 Massless motion!! θ (Magnetic field pressure on DW, ) t 0, φ t 0 From Sadamichi Maekawa IBM
19 Magnetic Race-track Memory A novel three-dimensional spintronic storage class memory The capacity of a hard disk drive but the reliability and performance of solid state memory - a disruptive technology based on recent developments in spintronic materials and physics Parkin, US patents , , Current pulses move domains along racetrack shift register TMR sensor to read bit pattern Special current pulse-driven element to re-write a bit IBM
20 Magnetic Racetrack Memory: writing mechanism Writing a bit current pulse on special write element Parkin, US patents , , IBM
21 Magnetic Shift Register Memory Magnetic race-tracks can be connected in series Many other configurations possible IBM
22 Magnetic Race-Track Memory: Domain-Wall Magnetic Shift Register Alternating layers of two ferromagnetic materials to pin domain walls domain wall Information stored as domain walls in vertical race track Reading and writing carried out along bottom of race track Electronics built under race track using conventional CMOS Domains moved around track using nano second long pulses of current - Data stored in the third dimension in tall columns of magnetic material - Domains race around track for reading and writing - 10 to 100 times the storage capacity of conventional solid state memory - Could displace flash memory and hard disk drives for many applications Spintronics Stuart Parkin
23 Expected Advances in Solid State Storage Technology Storage Class Memories (SCM): cost, scaling and density matters Various cheap, non-volatile memories (SCM) are under development. If successful, they can displace flash first Maturing and will be on market in a few years: Phase Change Memory (PCM) advanced demonstrations in and most mature in Samsung, Intel,. Effort in IBM, partnership with Infineon, Macronix MRAM - > Scaling demonstrations pursued to 45nm in MRAM and PCM Exploratory: Polymer (charge storage), Magnetic Shift Register (domain wall motion), Probe Storage Millipede, Perovskite (resistance change), Advancements in low cost manufacturing is key Nanoimprint Lithography (stamping), Self-assembly, Multiple bits per cell, Multiple cell layers per chip
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