ECE251: Thursday November 8

Size: px
Start display at page:

Download "ECE251: Thursday November 8"

Transcription

1 ECE251: Thursday November 8 Universal Asynchronous Receiver & Transmitter Text Chapter 22, Sections read carefully TM4C Data Sheet Section 14-no need to read this A key topic but not a lab HW #7 due one week; Homework #8 due Nov. 29 Lab #8 this week and next; due week of Nov 26 Lab #9 week of Nov. 26; due week of Dec. 3 Practical #2 is week of Dec. 3 in lab. Final Exam on Monday, Dec 10, 2:00 p.m. Lecture #24 1

2 Types of Serial Communications Simplex--1 wire, 1 direction (TV, Radio, etc.) Half-Duplex--1 wire, 2 directions (Telephone) Line is switched: Protocol to determine how switched Full-Duplex--2 wires, 2 simultaneous directions Lecture #24 2

3 What does UART Mean? Universal UART is programmable. Asynchronous Sender provides NO clock signal to receivers Receive & Transmit Lecture #24 3

4 Serial Communication Terminology Clock: Defines the rate of data transfers (in Hz) Bit rate: The number of bits transmitted per second. It equals the clock signal rate (in bits/sec vs Hz) Bit time: Reciprocal of bit rate (sec) i.e. bit period Baud: Unit of bits transmitted per second. Baud = bits/sec. NRZ line code: Non-Return to Zero. Line Code describes the format used to transfer each information bit NRZ: The bit (1 or 0) is place on the transmission line for the entire bit cell: e.g.: Serial bit stream Bit data MODEM: MOdulator/DEModulator Used to turn digital signals into audio (telephone) signals and viceversa. Lecture #24 4

5 Serial Communication Terminology ASCII: American Standard Code for Information Interchange 7 bit code--all numbers + upper/lower case characters + many more E.g. h = $68 D = $44? = $3F = $20 See Appendix C on Lab page Parity Bit: Additional bit (usually most significant bit) used to detect a single error in a sequence of bits Typically done at character level: Use 8 bits to send a 7 bit ASCII character + parity May be Odd (extra bit makes entire sequence have odd # of ones) or may be Even (extra bit makes entire sequence have even # of ones) Example: What is D in an Odd Parity transmission? In Even? $44 = 2_ _ = $C4 odd $44 = 2_ _ = $44 even Lecture #24 5

6 Serial Communication Standards RS-232: Historically the most common asynchronous standard Established in 1960 By Electronic Industry Association (EIA) for interfacing between a computer and a modem. Revised in 1991and renamed: EIA-232-E. Still called RS-232. Computers and Terminals are Data Terminal Equipment Modems, Bridges, Routers, etc. are Data Communications Equipment Four aspects of standard Electrical--voltage levels, rise times, fall times, data rates, distances, Functional--function of signals Mechanical--# of pins, shape/dimensions of connectors Procedural--sequence of events for transmitting data Data Terminal Equipment Data Communications Equipment Lecture #24 6

7 Down and Dirty with RS-232 Signal levels: (large, ugly" voltages) 0 --between +3 and +25 v. (Typically +12 v) 1 --between -3 and -25 v. (Typically -12 v) Signal format: Start and Stop bit used to Synchronize signals Idle (high) Start bit 8-bit ASCII Code (least significant first) Stop bit 1 frame ~ 10 bit times Receiver must have a clock running at 16X the transmitter s bit rate. At 28,800 baud, how long does it take to send TM4C12, including start and stop bits? What speed is the internal receiver clock? 6 char. x 10 bits/char 28,800 bits/sec = msec for 6 chars 28.8 KHz*16 = 460 KHz receiver clock frequency Lecture #24 7

8 UART Hardware UART = Universal Asynchronous Receiver/Transmitter It s the hardware (IC components in our processor/i/o subsystem) that is used to handle the asynchronous communications, at the heart of a modem s or computer s serial communication functionality. It performs Parallel Serial (transmit) and Serial Parallel (receive) conversion. See ECE102 It has a sophisticated programmable clock generator to handle multiple data frequencies very accurately. It often has a multi-byte buffer to reduce frequency of CPU interrupts to transfer more data. Lecture #24 8

9 TM4C UART Capability 8 Separate UART systems on chip Half-duplex operation can do both transmit and receive, but not at same time FIFO Buffers NRZ (Non-Return-to-Zero) signal format. Baud rate selection using baud rate registers. Programmable 5 to 8 data bit (excluding parity) format. Interrupt generation capability. Receiver noise error detection. Framing error detection (If stop bit is not detected). Transmitter parity creation and receiver parity error detection. Lecture #24 9

10 UART Block Diagram Lecture #24 10

11 UART Character Frame from TM4C Data Sheet n is the TM4C UART number: 0-7 Lecture #24 11

12 Details of Character Frame Always a logic 0 One Start bit May be a logic 0 or 1 Always a logic 1 One or more Stop bits 7 bits plus parity 8 bits plus parity Least significant bit first Parity bit last Lecture #24 12

13 Transmitting Bytes 0x32 and 0x3C 104µsec 1 start bit, 1 stop bit, 8 data bits, no parity, baud rate = 9.6 Kbaud How would this change with even parity? With odd parity? With 7 data bits no parity? With even parity? With odd parity? With 2 stop bits? Can these transmissions represent ASCII? Lecture #24 13

14 UART Synchronization Understand this concept! IDLE SIGNAL-Stop Bit START Bit ECE102 State Machine Lecture #24 14

15 Practice with RS-232 Signals µsec time What is the Baud rate? If I told you there are 7-8 data bits & one stop bit per frame, with one starting on left side of slide, how many frames are being sent? Can you tell if this is 8 bits of data vs. 7 bits of data + parity If it s 7 bits of data + parity, what IS the parity So, can you tell which by looking at this chart? If it is 7 bits + parity, can it represent ASCII? If so, what ASCII characters are being transmitted? If it is 8 bits without parity, what are the bytes being transmitted (in time order)? From end of first stop bit to end of last stop bit above, how long does this transmission take? Other questions about this? Lecture #24 15

16 Practice with RS-232 Signals µsec time What is the Baud rate? If I told you there are 7-8 data bits & one stop bit per frame, with one starting on left side of slide, how many frames are being sent? Can you tell if this is 8 bits of data vs. 7 bits of data + parity If it s 7 bits of data + parity, what IS the parity So, can you tell which by looking at this chart? If it is 7 bits + parity, can it represent ASCII? If so, what ASCII characters are being transmitted? If it is 8 bits without parity, what are the bytes being transmitted (in time order)? From end of first stop bit to end of last stop bit above, how long does this transmission take? Other questions about this? Lecture #24 16

17 Practice with RS-232 Signals µsec time What is the Baud rate? If I told you there are 7-8 data bits & one stop bit per frame, with one starting on left side of slide, how many frames are being sent? Can you tell if this is 8 bits of data vs. 7 bits of data + parity If it s 7 bits of data + parity, what IS the parity So, can you tell which by looking at this chart? If it is 7 bits + parity, can it represent ASCII? If so, what ASCII characters are being transmitted? If it is 8 bits without parity, what are the bytes being transmitted (in time order)? From end of first stop bit to end of last stop bit above, how long does this transmission take? Other questions about this? Lecture #24 17

18 Practice with RS-232 Signals µsec time What is the Baud rate? If I told you there are 7-8 data bits & one stop bit per frame, with one starting on left side of slide, how many frames are being sent? Can you tell if this is 8 bits of data vs. 7 bits of data + parity If it s 7 bits of data + parity, what IS the parity So, can you tell which by looking at this chart? If it is 7 bits + parity, can it represent ASCII? If so, what ASCII characters are being transmitted? If it is 8 bits without parity, what are the bytes being transmitted (in time order)? From end of first stop bit to end of last stop bit above, how long does this transmission take? Other questions about this? Lecture #24 18

19 More Practice with RS-232 bit cell time Suppose baud rate is 9.6 Kbaud/sec with one stop bit per frame and 7-8 data bits How long is a bit cell? Use correct engineering units! What else can you tell me about this specific signal? Lecture #24 19

20 Even More Practice bit cell time We want to send 2Pi at 4.8Kbaud rate, using one stop bit per frame with even parity. What is the bit cell width? Show the signal above What clock rate should the receiver be using to decode this signal? OK! Do you understand RS-232 signals well enough for a similar question on the final exam? Good chance there will be one! Lecture #24 20

21 TM4C UART Interfaces External Interfaces Each module uses two signal pins (n is module number 0-7) UnRX receives data UnTX transmits data These pins are alternate functions for GPIO pins (next slide) UART supports hardware parity for transmit and receive When enabled, parity bit is generated for transmitted data and computed/compared for received data. Received parity errors are flagged in hardware and can generate interrupts. UART Baud Rate Generator Uses Bus Clock or Precision Clock See slides from next lecture for more details and examples Lecture #24 21

22 UART Signals GPIO pins used for UART Signals AFSEL Register set to specify something other than GPIO function Which other function? PMCn field of GPIO PCTL register assigns UART signal to the specified GPIO Port pin see next slide Lecture #24 22

23 UART Alternate Function Select - Review Alternate function selected as in Timer Module: Uses GPIO DIR, AFSEL, PCTL, and AMSEL for particular port to be used Clear DIR register bits corresponding to input pins and set DIR register pins corresponding to output pins (0 thru 7 for both) Enable alternate function in AFSEL register for port to be used and for the 2 bits corresponding to pins using as Rx and Tx In Register PCTL for port to be used, set appropriate bits (4 per pin) to choose UART (value 1). E.g. for U3Rx, which uses PC6, set bits 27:24 of GPIO_PORTC_PCTL to 0x01 Disable analog for both Rx and Tx pins by clearing corresponding bits of AMSEL register for the port to be used. See Timer Module Lecture for a complete example Do you need to remember all this? NO. Just know where to find it! Lecture #24 23

24 More on UART Next Lecture UART Signal Review Baud Rate Generation TM4C Registers TM4C Setup and Operation USB Section 22.4 of text Chapter 18 of TM4C Data Sheet NOT an exam question Lecture #24 24

EE251: Thursday November 30

EE251: Thursday November 30 EE251: Thursday November 30 Course Evaluation Forms-fill out Memory Subsystem continued Timing requirements Adding memory beyond 4 Gbyte Time Allowing: Begin Review for Final Exam Homework due next Tuesday,

More information

EE251: Tuesday December 4

EE251: Tuesday December 4 EE251: Tuesday December 4 Memory Subsystem continued Timing requirements Adding memory beyond 4 Gbyte Time Allowing: Begin Review for Final Exam Homework #9 due Thursday at beginning of class Friday is

More information

Serial Communication Prof. James L. Frankel Harvard University. Version of 2:30 PM 6-Oct-2015 Copyright 2015 James L. Frankel. All rights reserved.

Serial Communication Prof. James L. Frankel Harvard University. Version of 2:30 PM 6-Oct-2015 Copyright 2015 James L. Frankel. All rights reserved. Serial Communication Prof. James L. Frankel Harvard University Version of 2:30 PM 6-Oct-2015 Copyright 2015 James L. Frankel. All rights reserved. Overview of the Serial Protocol Simple protocol for communicating

More information

Serial Communications

Serial Communications April 2014 7 Serial Communications Objectives - To be familiar with the USART (RS-232) protocol. - To be able to transfer data from PIC-PC, PC-PIC and PIC-PIC. - To test serial communications with virtual

More information

Input-Output Organization

Input-Output Organization Ted Borys - CSI 404 5/1/2004 Page 11-1 Section 11 Input-Output Organization ASCII Character Set 94 printable characters Upper & lowercase letters 10 numerals Special characters such as $, @, #, % 34 control

More information

Basics of UART Communication

Basics of UART Communication Basics of UART Communication From: Circuit Basics UART stands for Universal Asynchronous Receiver/Transmitter. It s not a communication protocol like SPI and I2C, but a physical circuit in a microcontroller,

More information

Lecture-65 SERIAL DATA COMMMUNICATION The data bus of a microcomputer system is designed to transfer data to and from I/O device in parallel - all

Lecture-65 SERIAL DATA COMMMUNICATION The data bus of a microcomputer system is designed to transfer data to and from I/O device in parallel - all Lecture-65 SERIAL DATA COMMMUNICATION The data bus of a microcomputer system is designed to transfer data to and from I/O device in parallel - all bits of a data word are transformed simultaneously. This

More information

8051SERIAL PORT PROGRAMMING

8051SERIAL PORT PROGRAMMING 8051SERIAL PORT PROGRAMMING Basics of Serial Communication Computers transfer data in two ways: Parallel Often 8 or more lines (wire conductors) are used to transfer data to a device that is only a few

More information

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Serial Port Communication Module No: CS/ES/11 Quadrant 1 e-text

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Serial Port Communication Module No: CS/ES/11 Quadrant 1 e-text e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Serial Port Communication Module No: CS/ES/11 Quadrant 1 e-text In this lecture, serial port communication will be discussed in

More information

To be familiar with the USART (RS-232) protocol. To be familiar with one type of internal storage system in PIC (EEPROM).

To be familiar with the USART (RS-232) protocol. To be familiar with one type of internal storage system in PIC (EEPROM). Lab # 6 Serial communications & EEPROM Objectives To be familiar with the USART (RS-232) protocol. To be familiar with one type of internal storage system in PIC (EEPROM). Serial Communications Serial

More information

Sender Receiver Sender

Sender Receiver Sender EEE 410 Microprocessors I Spring 04/05 Lecture Notes # 19 Outline of the Lecture Interfacing the Serial Port Basics of Serial Communication Asynchronous Data Communication and Data Framing RS232 and other

More information

EE251: Thursday November 15

EE251: Thursday November 15 EE251: Thursday November 15 Major new topic: MEMORY A KEY topic HW #7 due today; HW #8 due Thursday, Nov. 29 Lab #8 finishes this week; due week of Nov. 26 All labs MUST be completed/handed-in by Dec.

More information

Serial Interfaces Part 1. ECE 153B Sensor & Peripheral Interface Design Winter 2016

Serial Interfaces Part 1. ECE 153B Sensor & Peripheral Interface Design Winter 2016 Serial Interfaces Part 1 ECE 153B Sensor & Peripheral Interface Design Serial Interfaces Simple Serial Interfaces RS-232C (UART) Provides for point to point communications, primarily Among the simplest

More information

Hello, and welcome to this presentation of the STM32 Universal Synchronous/Asynchronous Receiver/Transmitter Interface. It covers the main features

Hello, and welcome to this presentation of the STM32 Universal Synchronous/Asynchronous Receiver/Transmitter Interface. It covers the main features Hello, and welcome to this presentation of the STM32 Universal Synchronous/Asynchronous Receiver/Transmitter Interface. It covers the main features of this USART interface, which is widely used for serial

More information

EECS 373 Design of Microprocessor-Based Systems

EECS 373 Design of Microprocessor-Based Systems EECS 373 Design of Microprocessor-Based Systems Prabal Dutta University of Michigan Lecture 10: Serial buses October 2, 2014 Some material from: Brehob, Le, Ramadas, Tikhonov & Mahal 1 Announcements Special

More information

School of Computer Science Faculty of Engineering and Computer Science Student ID Number. Lab Cover Page. Lab Date and Time:

School of Computer Science Faculty of Engineering and Computer Science Student ID Number. Lab Cover Page. Lab Date and Time: Student Information First Name School of Computer Science Faculty of Engineering and Computer Science Last Name Student ID Number Lab Cover Page Please complete all fields: Course Name: Structure and Application

More information

Parallel-to-Serial and Serial-to-Parallel Converters

Parallel-to-Serial and Serial-to-Parallel Converters Session 1532 Parallel-to-Serial and Serial-to-Parallel Converters Max Rabiee, Ph.D., P.E. University of Cincinnati Abstract: Microprocessors (MPUs) on a computer motherboard communicate in a parallel format

More information

MCS-51 Serial Port A T 8 9 C 5 2 1

MCS-51 Serial Port A T 8 9 C 5 2 1 MCS-51 Serial Port AT89C52 1 Introduction to Serial Communications Serial vs. Parallel transfer of data Simplex, Duplex and half-duplex modes Synchronous, Asynchronous UART Universal Asynchronous Receiver/Transmitter.

More information

Communication. Chirag Sangani

Communication. Chirag Sangani Communication Scope of Communication Telephones and cell phones. Satellite networks. Radio and DTH services. Campus LAN and wireless. Internet. Intra-galactic communication. Essentials of Communication

More information

ELEG3923 Microprocessor Ch.10 Serial Port Programming

ELEG3923 Microprocessor Ch.10 Serial Port Programming Department of Electrical Engineering University of Arkansas ELEG3923 Microprocessor Ch.10 Serial Port Programming Dr. Jingxian Wu wuj@uark.edu OUTLINE 2 Basics of Serial Communication Serial port programming

More information

Universität Dortmund. IO and Peripheral Interfaces

Universität Dortmund. IO and Peripheral Interfaces IO and Peripheral Interfaces Microcontroller System Architecture Each MCU (micro-controller unit) is characterized by: Microprocessor 8,16,32 bit architecture Usually simple in-order microarchitecture,

More information

Hello, and welcome to this presentation of the STM32 Low Power Universal Asynchronous Receiver/Transmitter interface. It covers the main features of

Hello, and welcome to this presentation of the STM32 Low Power Universal Asynchronous Receiver/Transmitter interface. It covers the main features of Hello, and welcome to this presentation of the STM32 Low Power Universal Asynchronous Receiver/Transmitter interface. It covers the main features of this interface, which is widely used for serial communications.

More information

Fig.12.5 Serial Data Line during Serial Communication

Fig.12.5 Serial Data Line during Serial Communication Lecture-66 Asynchronous Serial Data Communication A serial data signal is divided into time intervals called bit times as shown in fig.2.5. During each bit time interval (T B ), the signal is either a

More information

More on IO: The Universal Serial Bus (USB)

More on IO: The Universal Serial Bus (USB) ecture 37 Computer Science 61C Spring 2017 April 21st, 2017 More on IO: The Universal Serial Bus (USB) 1 Administrivia Project 5 is: USB Programming (read from a mouse) Optional (helps you to catch up

More information

Embedded Systems and Software

Embedded Systems and Software Embedded Systems and Software Serial Communication Serial Communication, Slide 1 Lab 5 Administrative Students should start working on this LCD issues Caution on using Reset Line on AVR Project Posted

More information

Serial communication

Serial communication Serial communication CSCI 255: Introduction to Embedded Systems Keith Vertanen Copyright 2011 Serial communication Terminology RS-232 protocol Baud rates Flow control Example Overview Develop functions

More information

Embedded Systems and Software. Serial Communication

Embedded Systems and Software. Serial Communication Embedded Systems and Software Serial Communication Slide 1 Using RESET Pin on AVRs Normally RESET, but can be configured via fuse setting to be general-purpose I/O Slide 2 Disabling RESET Pin on AVRs Normally

More information

EEE310 MICROPROCESSORS M. Fatih Tüysüz CHAPTER 7

EEE310 MICROPROCESSORS M. Fatih Tüysüz CHAPTER 7 EEE31 MICROPROCESSORS M. Fatih Tüysüz CHAPTER 7 CHAPTER 7 Contents Midterm Questions & Solutions Serial I/O Data Transfer Midterm Questions & Solutions Q1: a) Why Microprocessors use only two digits (

More information

Amarjeet Singh. January 30, 2012

Amarjeet Singh. January 30, 2012 Amarjeet Singh January 30, 2012 Website updated - https://sites.google.com/a/iiitd.ac.in/emsys2012/ Lecture slides, audio from last class Assignment-2 How many of you have already finished it? Final deadline

More information

Concepts of Serial Communication

Concepts of Serial Communication Section 6. Serial Communication Communication Using Serial Interfaces: UART and SPI Concepts of Serial Communication Limitations of Parallel Bus Clock skew becomes a serious issue for high speed and long

More information

Serial Communication. Simplex Half-Duplex Duplex

Serial Communication. Simplex Half-Duplex Duplex 1.5. I/O 135 Serial Communication Simplex Half-Duplex Duplex 136 Serial Communication Master-Slave Master Master-Multi-Slave Master Slave Slave Slave (Multi-)Master Multi-Slave Master Slave Slave Slave

More information

University of Florida EEL 4744 Spring 2014 Dr. Eric M. Schwartz Department of Electrical & Computer Engineering 1 April Apr-14 9:03 AM

University of Florida EEL 4744 Spring 2014 Dr. Eric M. Schwartz Department of Electrical & Computer Engineering 1 April Apr-14 9:03 AM Page 1/15 Exam 2 Instructions: Turn off cell phones beepers and other noise making devices. BEAT UCONN! Show all work on the front of the test papers. If you need more room make a clearly indicated note

More information

Typical modules include interfaces to ARINC-429, ARINC-561, ARINC-629 and RS-422. Each module supports up to 8 Rx or 8Tx channels.

Typical modules include interfaces to ARINC-429, ARINC-561, ARINC-629 and RS-422. Each module supports up to 8 Rx or 8Tx channels. Modular PCI Range of Cards Summary features Modular Architecture Interface compatible with PCI Local bus Specification, revision 2.1, June 1995 2 or 4 Module General Purpose Carrier Cards 8 Channels per

More information

Serial Communications

Serial Communications 1 Serial Interfaces 2 Embedded systems often use a serial interface to communicate with other devices. Serial Communications Serial implies that it sends or receives one bit at a time. Serial Interfaces

More information

Unit 4 Part 2: Communications - Asynchronous Serial Protocols

Unit 4 Part 2: Communications - Asynchronous Serial Protocols 1300 Henley Court Pullman, WA 99163 509.334.6306 www.store.digilent.com Unit 4 Part 2: Communications - Asynchronous Serial Protocols Revised May 23, 2017 This manual applies to Unit 4 Part 2. 1 Introduction

More information

PD215 Mechatronics. Week 3/4 Interfacing Hardware and Communication Systems

PD215 Mechatronics. Week 3/4 Interfacing Hardware and Communication Systems PD215 Mechatronics Week 3/4 Interfacing Hardware and Communication Systems Interfacing with the physical world A compute device (microprocessor) in mechatronic system needs to accept input information

More information

Serial Communication. Spring, 2018 Prof. Jungkeun Park

Serial Communication. Spring, 2018 Prof. Jungkeun Park Serial Communication Spring, 2018 Prof. Jungkeun Park Serial Communication Serial communication Transfer of data over a single wire for each direction (send / receive) Process of sending data one bit at

More information

UART Register Set. UART Master Controller. Tx FSM. Rx FSM XMIT FIFO RCVR. i_rx_clk o_intr. o_out1 o_txrdy_n. o_out2 o_rxdy_n i_cs0 i_cs1 i_ads_n

UART Register Set. UART Master Controller. Tx FSM. Rx FSM XMIT FIFO RCVR. i_rx_clk o_intr. o_out1 o_txrdy_n. o_out2 o_rxdy_n i_cs0 i_cs1 i_ads_n October 2012 Reference Design RD1138 Introduction The Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel conversion on data characters received from a peripheral device or a

More information

COMP 273 Winter asynchronous I/O April 5, 2012

COMP 273 Winter asynchronous I/O April 5, 2012 All the I/O examples we have discussed use the system bus to send data between the CPU, main memory, and I/O controllers. The system bus runs at a slower clock speed than the CPU because of greater distances

More information

EECS 373 Design of Microprocessor-Based Systems

EECS 373 Design of Microprocessor-Based Systems EECS 7 Design of Microprocessor-Based Systems Matt Smith University of Michigan Serial buses, digital design Material taken from Brehob, Dutta, Le, Ramadas, Tikhonov & Mahal 1 Timer Program //Setup Timer

More information

RS 232 Interface. RS 232 is the Serial interface on the PC. Three major wires for the Serial interface: Transmit Pin 2 Receive Pin 3

RS 232 Interface. RS 232 is the Serial interface on the PC. Three major wires for the Serial interface: Transmit Pin 2 Receive Pin 3 RS 232 Interface RS 232 is the Serial interface on the PC Three major wires for the Serial interface: Transmit Pin 2 Receive Pin 3 Note: SR510 switches pins 2,3 internally HP Func. Gen. Requires a null

More information

Asynchronous Transmission. Asynchronous Serial Communications & UARTS

Asynchronous Transmission. Asynchronous Serial Communications & UARTS Asynchronous Transmission Asynchronous Serial Communications & UARTS 55:036 Embedded Systems and Systems Software asynchronous: transmitter and receiver do not share a common clock or explicitly coordinate

More information

DIGITAL COMMUNICATION SWAPNIL UPADHYAY

DIGITAL COMMUNICATION SWAPNIL UPADHYAY DIGITAL COMMUNICATION SWAPNIL UPADHYAY SCOPE OF DIGITAL COMMUNICATION Internet Mobile Networks Wireless Networks OUR INTEREST ARDUINO SHIELDS Use SPI or UART to communicate with arduino boards JPG COLOR

More information

EECS 373 Design of Microprocessor-Based Systems

EECS 373 Design of Microprocessor-Based Systems EECS 373 Design of Microprocessor-Based Systems Mark Brehob University of Michigan Timers Material taken from Dreslinski, Dutta, Le, Ramadas, Smith, Tikhonov & Mahal 1 Agenda A bit on timers Project overview

More information

UART Devices. ECE 480: Design Team 3. Application Note. By: Hoyoung Jung. Date: 4/3/15

UART Devices. ECE 480: Design Team 3. Application Note. By: Hoyoung Jung. Date: 4/3/15 UART Devices ECE 480: Design Team 3 Application Note By: Hoyoung Jung Date: 4/3/15 Abstract The integration and communication of electronic systems requires the receiving and transmitting of data. In order

More information

Learn how to communicate

Learn how to communicate USART 1 Learn how to communicate Programmed I/O (Software Polling) Interrupt Driven I/O Direct Memory Access (DMA) 2 Programmed I/O (Polling) Processor must read and check I/O ready bits for proper value

More information

HDLC-ETH. Serial Ethernet Converter. Rev. Dec 20, Datasheet. Website:

HDLC-ETH. Serial Ethernet Converter. Rev. Dec 20, Datasheet.   Website: HDLC-ETH Serial Ethernet Converter Rev. Dec 20, 2017 HDLC-ETH Datasheet Email: yacer@yacer.cn Website: www.yacer.cn 1 Overview... 3 1.1 Introduction... 3 1.2 Features... 3 1.3 Applications... 3 1.4 Technical

More information

Interfacing Techniques in Embedded Systems

Interfacing Techniques in Embedded Systems Interfacing Techniques in Embedded Systems Hassan M. Bayram Training & Development Department training@uruktech.com www.uruktech.com Introduction Serial and Parallel Communication Serial Vs. Parallel Asynchronous

More information

COMP asynchronous buses April 5, 2016

COMP asynchronous buses April 5, 2016 All the I/O examples we have discussed use the system bus to send data between the CPU, main memory, and I/O controllers. The system bus runs at a slower clock speed than the CPU because of greater distances

More information

Infineon C167CR microcontroller, 256 kb external. RAM and 256 kb external (Flash) EEPROM. - Small single-board computer (SBC) with an

Infineon C167CR microcontroller, 256 kb external. RAM and 256 kb external (Flash) EEPROM. - Small single-board computer (SBC) with an Microcontroller Basics MP2-1 week lecture topics 2 Microcontroller basics - Clock generation, PLL - Address space, addressing modes - Central Processing Unit (CPU) - General Purpose Input/Output (GPIO)

More information

UNIT-V COMMUNICATION INTERFACE

UNIT-V COMMUNICATION INTERFACE UNIT-V COMMUNICATION INTERFACE SERIAL DATA TRANSFER INTRODUCTION Data transmission, digital transmission or digital communications is the physical transfer of data (a digital bit stream) over a point-to-point

More information

Hierarchy of I/O Control Devices

Hierarchy of I/O Control Devices Hierarchy of I/O Control Devices 8155 I/O + Timer 2 Port (A,B), No Bidirectional HS mode (C) 4 mode timer 8253/54 Timer 6 mode timer 8255 I/O 2 Port (A,B) A is Bidirectional HS mode (C) Extra controls

More information

Parallel and Serial Bus Analysis Instructor s Guide

Parallel and Serial Bus Analysis Instructor s Guide A collection of lab exercises to explore analysis of parallel and serial buses with a digital oscilloscope. Revision 1.0 Page 1 of 21 Copyright Notice and Reproduction Rights 2009 Tektronix, Inc. This

More information

Informatics for industrial applications

Informatics for industrial applications Informatics for industrial applications Lecture 5 - Peripherals: USART and DMA Martino Migliavacca martino.migliavacca@gmail.com October 20, 2011 Outline 1 Introduction to USART Introduction Synchronous

More information

CSCE 236 Embedded Systems, Fall 2017 Homework 5

CSCE 236 Embedded Systems, Fall 2017 Homework 5 CSCE 236 Embedded Systems, Fall 2017 Homework 5 Started: Tuesday, November 7th, 2017 Due: Friday, November 17th, 2017 (5pm) Instructions: This homework is an individual assignment, collaboration is not

More information

SPART - A Special Purpose Asynchronous Receiver/Transmitter

SPART - A Special Purpose Asynchronous Receiver/Transmitter ECE 554 - Digital Engineering Laboratory Miniproject SPART - A Special Purpose Asynchronous Receiver/Transmitter VERSION S02 (Revision 1 - Changes in Red) INTRODUCTION In this miniproject, you are to implement

More information

Parallel IO. Serial IO. Parallel vs. Serial IO. simplex vs half-duplex vs full-duplex. Wires: Full Duplex. Wires: Simplex, Half-duplex.

Parallel IO. Serial IO. Parallel vs. Serial IO. simplex vs half-duplex vs full-duplex. Wires: Full Duplex. Wires: Simplex, Half-duplex. Parallel IO Parallel IO data sent over a group of parallel wires. Typically, a clock is used for synchronization. D[15:0] clk Serial IO Serial IO data sent one bit at a time, over a single wire. A clock

More information

SPART. SPART Design. A Special Purpose Asynchronous Receiver/Transmitter. The objectives of this miniproject are to:

SPART. SPART Design. A Special Purpose Asynchronous Receiver/Transmitter. The objectives of this miniproject are to: SPART A Special Purpose Asynchronous Receiver/Transmitter Introduction In this miniproject you are to implement a Special Purpose Asynchronous Receiver/Transmitter (SPART). The SPART can be integrated

More information

SPART. SPART Design. A Special Purpose Asynchronous Receiver/Transmitter. The objectives of this miniproject are to:

SPART. SPART Design. A Special Purpose Asynchronous Receiver/Transmitter. The objectives of this miniproject are to: SPART A Special Purpose Asynchronous Receiver/Transmitter Introduction In this miniproject you are to implement a Special Purpose Asynchronous Receiver/Transmitter (SPART). The SPART can be integrated

More information

Universal Asynchronous Receiver Transmitter Communication

Universal Asynchronous Receiver Transmitter Communication Universal Asynchronous Receiver Transmitter Communication 13 October 2011 Synchronous Serial Standard SPI I 2 C Asynchronous Serial Standard UART Asynchronous Resynchronization Asynchronous Data Transmission

More information

Data Communication/MIDI. Juan P Bello

Data Communication/MIDI. Juan P Bello Data Communication/MIDI Juan P Bello MIDI The Musical Instrument Digital Interface (MIDI) is a standard for communication between electronic musical instruments, which has also been applied to a larger

More information

Serial Interfacing. Asynchronous Frame

Serial Interfacing. Asynchronous Frame Serial Interfacing Serial Data Transfer used by keyboards, plotters, modems and other peripherals with low data transfer rates (low bandwidth) 2 Types: Asynchronous CPU and device are not using a common

More information

HZX N03 Bluetooth 4.0 Low Energy Module Datasheet

HZX N03 Bluetooth 4.0 Low Energy Module Datasheet HZX-51822-16N03 Bluetooth 4.0 Low Energy Module Datasheet SHEN ZHEN HUAZHIXIN TECHNOLOGY LTD 2017.7 NAME : Bluetooth 4.0 Low Energy Module MODEL NO. : HZX-51822-16N03 VERSION : V1.0 1.Revision History

More information

CoE3DJ4 Digital Systems Design. Chapter 5: Serial Port Operation

CoE3DJ4 Digital Systems Design. Chapter 5: Serial Port Operation CoE3DJ4 Digital Systems Design Chapter 5: Serial Port Operation Serial port 8051 includes an on-chip serial port Hardware access to the port is through TXD and RXD (Port 3 bits 1 and 0) Serial port is

More information

Review for Exam 3. Write 0x05 to ATD0CTL4 to set at fastest conversion speed and 10-bit conversions

Review for Exam 3. Write 0x05 to ATD0CTL4 to set at fastest conversion speed and 10-bit conversions Review for Exam 3 A/D Converter Power-up A/D converter (ATD0CTL2) Write 0x05 to ATD0CTL4 to set at fastest conversion speed and 10-bit conversions Write 0x85 to ATD0CTL4 to set at fastest conversion speed

More information

Design and development of embedded systems for the Internet of Things (IoT) Fabio Angeletti Fabrizio Gattuso

Design and development of embedded systems for the Internet of Things (IoT) Fabio Angeletti Fabrizio Gattuso Design and development of embedded systems for the Internet of Things (IoT) Fabio Angeletti Fabrizio Gattuso Microcontroller It is essentially a small computer on a chip Like any computer, it has memory,

More information

ECE 598 Advanced Operating Systems Lecture 5

ECE 598 Advanced Operating Systems Lecture 5 ECE 598 Advanced Operating Systems Lecture 5 Vince Weaver http://www.eece.maine.edu/~vweaver vincent.weaver@maine.edu 2 February 2015 HW#2 was posted Announcements 1 HW#1 Review Short answers OK, but please

More information

Serial Communication. Simplex Half-Duplex Duplex

Serial Communication. Simplex Half-Duplex Duplex 1.5. I/O 128 Serial Communication Simplex Half-Duplex Duplex 129 Serial Communication Master-Slave Master Master-Multi-Slave Master Slave Slave Slave (Multi-)Master Multi-Slave Master Slave Slave Slave

More information

ECE/CS 5780/6780: Embedded System Design

ECE/CS 5780/6780: Embedded System Design ECE/CS 5780/6780: Embedded System Design Scott R. Little Lecture 16: SCI Register Configuration and Ritual Scott R. Little (Lecture 16: SCI Config) ECE/CS 5780/6780 1 / 19 Administrivia Schedule This is

More information

CprE 288 Introduction to Embedded Systems (UART Interface Overview)

CprE 288 Introduction to Embedded Systems (UART Interface Overview) CprE 288 Introduction to Embedded Systems (UART Interface Overview) Instructors: Dr. Phillip Jones http://class.ece.iastate.edu/cpre288 1 Announcement HW 4, Due Wed 6/13 Quiz 4 (15 min): Monday 6/11 at

More information

The MMDVM Specification ( )

The MMDVM Specification ( ) The MMDVM Specification (20150922) Introduction The MMDVM is intended to be an open-source Multi-Mode Digital Voice Modem, which utilises the power of an ARM processor and a simple analogue interface board.

More information

Outline GPIO SPI UART. Ref. PIC Family Reference Manual:

Outline GPIO SPI UART. Ref. PIC Family Reference Manual: PIC32&I/O& E155& Outline GPIO SPI UART Ref. PIC Family Reference Manual: http://www.microchip.com/wwwproducts/devices.aspx?ddocname=en545644 2 GPIO PIC32 organizes groups of GPIOs into ports that are read

More information

Understanding the basic building blocks of a microcontroller device in general. Knows the terminologies like embedded and external memory devices,

Understanding the basic building blocks of a microcontroller device in general. Knows the terminologies like embedded and external memory devices, Understanding the basic building blocks of a microcontroller device in general. Knows the terminologies like embedded and external memory devices, CISC and RISC processors etc. Knows the architecture and

More information

CHAPTER 4 DATA COMMUNICATION MODES

CHAPTER 4 DATA COMMUNICATION MODES USER S MANUAL CHAPTER DATA COMMUNICATION MODES. INTRODUCTION The SCC provides two independent, full-duplex channels programmable for use in any common asynchronous or synchronous data communication protocol.

More information

Digital Input and Output

Digital Input and Output Digital Input and Output Topics: Parallel Digital I/O Simple Input (example) Parallel I/O I/O Scheduling Techniques Programmed Interrupt Driven Direct Memory Access Serial I/O Asynchronous Synchronous

More information

Chapter 2 Lecture 5 Computer Systems Organization

Chapter 2 Lecture 5 Computer Systems Organization Chapter 2 Lecture 5 Computer Systems Organization This chapter provides an introduction to the components Processors: Primary Memory: Secondary Memory: Input/Output: Buses, Data Transfer, Input/Output,

More information

ECE 354 Introduction to Lab 1. February 5 th, 2003

ECE 354 Introduction to Lab 1. February 5 th, 2003 ECE 354 Introduction to Lab 1 February 5 th, 2003 Lab 0 Most groups completed Lab 0 IDE Simulator Questions? ICD Questions? What s the difference? ECE 354 - Spring 2003 2 Addition to Honesty Policy It

More information

Features: Analog to Digital: 12 bit resolution TTL outputs, RS-232 tolerant inputs 4.096V reference (1mV/count) 115K max speed

Features: Analog to Digital: 12 bit resolution TTL outputs, RS-232 tolerant inputs 4.096V reference (1mV/count) 115K max speed The Multi-I/O expansion board gives users the ability to add analog inputs and outputs, UART capability (for GPS or modem) and isolated high current outputs to the Flashlite 386Ex. Available in several

More information

1 The Attractions of Soft Modems

1 The Attractions of Soft Modems Application Note AN2451/D Rev. 0, 1/2003 Interfacing a Low Data Rate Soft Modem to the MCF5407 Microprocessor The traditional modem has been a box or an add-on card with a phone connection on one end and

More information

Keyboards. The PS/2 Protocol

Keyboards. The PS/2 Protocol Keyboards The PS/2 Protocol Debugging Always start from a known working state; stop in a working state. If it breaks, what changed? Take a simple small step, check it carefully, then take another small

More information

HDLC-PCIE. Synchronous Serial Card. Rev. Dec 22, Datasheet. Website:

HDLC-PCIE. Synchronous Serial Card. Rev. Dec 22, Datasheet.   Website: HDLC-PCIE Synchronous Serial Card Rev. Dec 22, 2017 HDLC-PCIE Datasheet Email: yacer@yacer.cn Website: www.yacer.cn 1 Overview... 3 1.1 Introduction... 3 1.2 Features... 3 1.3 Driver Support... 3 1.4 Applications...

More information

Growing Together Globally Serial Communication Design In Embedded System

Growing Together Globally Serial Communication Design In Embedded System Growing Together Globally Serial Communication Design In Embedded System Contents Serial communication introduction......... 01 The advantages of serial design......... 02 RS232 interface......... 04 RS422

More information

Chapter 11: Input/Output Organisation. Lesson 05: Asynchronous RS232C Serial Port data transfer

Chapter 11: Input/Output Organisation. Lesson 05: Asynchronous RS232C Serial Port data transfer Chapter 11: Input/Output Organisation Lesson 05: Asynchronous RS232C Serial Port data transfer Objective Understand the RS232C asynchronous data transfer and signals Learn the RS232C serial port communication

More information

or between microcontrollers)

or between microcontrollers) : Communication Interfaces in Embedded Systems (e.g., to interface with sensors and actuators or between microcontrollers) Spring 2016 : Communication Interfaces in Embedded Systems Spring (e.g., 2016

More information

TMS470R1x Serial Communication Interface (SCI) Reference Guide

TMS470R1x Serial Communication Interface (SCI) Reference Guide TMS470R1x Serial Communication Interface (SCI) Reference Guide Literature Number: SPNU196A September 2002 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to

More information

Interfacing a Hyper Terminal to the Flight 86 Kit

Interfacing a Hyper Terminal to the Flight 86 Kit Experiment 6 Interfacing a Hyper Terminal to the Flight 86 Kit Objective The aim of this lab experiment is to interface a Hyper Terminal to 8086 processor by programming the 8251 USART. Equipment Flight

More information

UART Application Kit for Digi Embedded Linux User's Manual

UART Application Kit for Digi Embedded Linux User's Manual UART Application Kit for Digi Embedded Linux User's Manual Digi document reference number: 90000920_A Digi International Inc. 2008. All Rights Reserved. The Digi logo is a registered trademark of Digi

More information

HP 48 I/O Technical Interfacing Guide

HP 48 I/O Technical Interfacing Guide HP 48 I/O Technical Interfacing Guide HP 48 I/0 Technical Interfacing Guide CONTENTS INTRODUCTION... 3 WIRED SERIAL I/O HARDWARE... 3 CABLE WIRING... 3 SERIAL FORMAT... 5 Example: an 'H' (48 hex)... 5

More information

NUC123xxxAN Series Errata Sheet. Errata Sheet for 32-bit NuMicro Family Rev May 19, 2016

NUC123xxxAN Series Errata Sheet. Errata Sheet for 32-bit NuMicro Family Rev May 19, 2016 NUC123xxxAN Series Errata Sheet Errata Sheet for 32-bit NuMicro Family Rev. 1.04 May 19, 2016 Document Information Abstract Apply to This errata sheet describes the functional problems known at the release

More information

CS/ECE 5780/6780: Embedded System Design

CS/ECE 5780/6780: Embedded System Design CS/ECE 5780/6780: Embedded System Design John Regehr Lecture 16: SCI Register Configuration and Ritual SCI Register Information & Terminology The information in this lecture is found: Textbook pages 346-9.

More information

LCM-160. Low-Power Embedded Communication Module. Rev. Dec 26, LCM-160 Datasheet. Website:

LCM-160. Low-Power Embedded Communication Module. Rev. Dec 26, LCM-160 Datasheet.   Website: LCM-160 Low-Power Embedded Communication Module Rev. Dec 26, 2017 LCM-160 Datasheet Email: yacer@yacer.cn Website: www.yacer.cn 1 Overview... 3 1.1 Introduction... 3 1.2 Features... 3 1.3 Applications...

More information

EE 354 November 13, 2017 ARM UART Notes

EE 354 November 13, 2017 ARM UART Notes EE 354 November 13, 2017 ARM UART Notes For serial communications you should be familiar with the following terms: UART/USART Baud rate Synchronous/Asynchronous communication Half-Duplex/Full-Duplex The

More information

18-349: Introduction to Embedded Real-Time Systems

18-349: Introduction to Embedded Real-Time Systems 18-349: Introduction to Embedded Real-Time Systems Embedded Real-Time Systems Lecture 5: Serial Buses Anthony Rowe Electrical and Computer Engineering Carnegie Mellon University Last Lecture ARM ASM Part

More information

lecture 22 Input / Output (I/O) 4

lecture 22 Input / Output (I/O) 4 lecture 22 Input / Output (I/O) 4 - asynchronous bus, handshaking - serial bus Mon. April 4, 2016 "synchronous" bus = clock based (system bus clock is slower than CPU clock) "asynchronous" bus = not clock

More information

BV4615. Dual Interface Zero Keypad. Product specification. Dec 2009 V0.a. ByVac Page 1 of 11

BV4615. Dual Interface Zero Keypad. Product specification. Dec 2009 V0.a. ByVac Page 1 of 11 Product specification Dec 2009 V0.a ByVac Page 1 of 11 Contents 1. Introduction...3 2. Features...3 3. Physical Specification...3 3.1. Serial connector...3 3.2. Multiple Devices...4 3.3. I2C...4 4. Output

More information

19.1. Unit 19. Serial Communications

19.1. Unit 19. Serial Communications 9. Unit 9 Serial Communications 9.2 Serial Interfaces Embedded systems often use a serial interface to communicate with other devices. Serial implies that it sends or receives one bit at a time. µc Device

More information

APPLICATION NOTE 5306 Programming Baud Rates of the MAX3108 UART

APPLICATION NOTE 5306 Programming Baud Rates of the MAX3108 UART Maxim > Design Support > Technical Documents > Application Notes > Interface Circuits > APP 5306 Keywords: UART, RS232, RS485, SPI, I2C, half duplex, HDX, full duplex, FDX, WLP, wafer level package, FIFO,

More information

C-MAX CME8000-BUS. Module Layout CME8000-BUS-LP02 RS232. Industrial Module with CME8000 receiver IC. Short Description

C-MAX CME8000-BUS. Module Layout CME8000-BUS-LP02 RS232. Industrial Module with CME8000 receiver IC. Short Description Industrial Module with CME8000 receiver IC RF Technology Specialist Short Description The CME8000 is a BiCMOS integrated straight through receiver with build in very high sensitivity and a pre-decoding

More information

ECEN 468 Advanced Logic Design Department of Electrical and Computer Engineering Texas A&M University. Lab 2

ECEN 468 Advanced Logic Design Department of Electrical and Computer Engineering Texas A&M University. Lab 2 ECEN 468 Advanced Logic Design Department of Electrical and Computer Engineering Texas A&M University (Lab exercise created by Jaeyeon Won and Jiang Hu) Lab 2 Design of UART Transmitter Purpose: In this

More information

Christian Brothers High School, Lewisham. Year 12 Information Processes & Technology. Assessment Task 3: Communications Systems.

Christian Brothers High School, Lewisham. Year 12 Information Processes & Technology. Assessment Task 3: Communications Systems. Name: Teacher: Christian Brothers High School, Lewisham Year 12 Information Processes & Technology Assessment Task 3: Communications Systems June 2001 Outcomes Assessed: H1.1, H1.2, H2.1, H3.1, H5.2. Weighting:

More information