Input-Output Organization

Transcription

1 Ted Borys - CSI 404 5/1/2004 Page 11-1 Section 11 Input-Output Organization ASCII Character Set 94 printable characters Upper & lowercase letters 10 numerals Special characters such as #, % 34 control characters Format effectors such as CR, LF, HT, BS Information separators such as RS, FS Communication control such as STX, ETX Slides with white background courtesy of Mano text for this class 1 2 ASCII ASCII Control Characters 3 4 Differences Central computer Electronic Fast transfer rate Addressable at word level Peripheral Mechanical & magnetic; signal converted Slow transfer rate Addressable at groups of words level (e.g., sector, track, block) Interface Unit Hardware components between peripheral device and processor bus Supervise and synchronize all I/Os 5 6

2 Ted Borys - CSI 404 5/1/2004 Page 11-2 I/O Bus and Connected Devices 7 I/O Bus Data Data read or written Address Each interface has a unique address Control Passes commands to interface Control command tells peripheral what to do Status command asks peripheral to report something I/O command sends or receives data to/from peripheral 8 Tape Unit Example Computer issues control command to activate transport mechanism (move the tape) Computer issues status commands to monitor tape movement When tape in correct position, computer issues data output control command Interface responds by reading data off the I/O bus and sending it to the tape drive I/O versus Memory Bus Two completely separate busses I/O processor (data channel) in addition to CPU One common bus with separate control lines Isolated I/O CPU has different instructions for memory and I/O One common bus with common control lines Memory-mapped I/O CPU issues same instructions for memory and I/O 9 10 Asynchronous Data Transfer Source and destination do not share a common clock Need communication methodology Strobe Control signal handshaking Source-Initiated Strobe 11 12

3 Ted Borys - CSI 404 5/1/2004 Page 11-3 Destination-Initiated Strobe Source-Initiated Handshaking Destination-Initiated Handshaking Asynchronous Serial Transfer One conductor + common ground Each unit has separate clock at same frequency Idle time has conductor in 1-state Character frame One start bit, conductor in 0-state Character bits, usually 8 One or two stop bits, conductor in 1-state Asynch Serial Transfer Diagram Baud Rate 1 0 Data transfer speed in bits per second 110 baud 10 characters / second Bits: 1 start, 8 data, 2 stop 300 baud 30 characters / second Bits: 1 start, 8 data, 1 stop 17 18

4 Ted Borys - CSI 404 5/1/2004 Page 11-4 FIFO Buffer 4 x 4 FIFO Buffer Memory unit that stores information such that the first item in is the first item out Input data rate and output data rate can be different Memory / Peripheral Xfer Modes Programmed I/O Interrupt-initiated I/O Direct memory access (DMA) Programmed I/O Transfer data under program control Transfer data from/to CPU register & peripheral Transfer data from/to memory & CPU register Peripheral status constantly monitored by CPU Interrupt-Initiated I/O Peripheral interrupts CPU when ready for I/O CPU stops what it is currently doing to service I/O interrupt When I/O completes, CPU returns to what it was doing before interrupt took place Direct Memory Access CPU initiates I/O by giving interface unit the starting address and word count Interface unit performs I/O directly with memory using the memory bus while CPU is doing other work Interface unit interrupts CPU to indicate it is done 23 24

5 Ted Borys - CSI 404 5/1/2004 Page 11-5 Interrupt Vector w/priority Input-Output Processor (IOP) Processor with DMA capability that communicates with one or more peripherals I/O activities are offloaded from CPU Computer system may have > 1 IOP CPU & IOP Block Diagram CPU IOP Communication IBM 370 I/O Channel (IOP) Multiplexer Connects multiple slow and medium speed devices Can perform concurrent I/O with multiple devices I/O done one byte at a time Selector Normally controls one high speed device Handles one I/O at a time Block-multiplexer Connects multiple high speed devices I/O done one block at a time 29 Intel 8089 IOP 30

6 Ted Borys - CSI 404 5/1/2004 Page 11-6 Data Communication Processor I/O processor that collects and distributes data from many remote devices connected through telephone and communication lines Peripheral IOP converses via common bus DC IOP converses via pair of wires Data and control information on same wires Phone Lines Analog transmission originally used for voice Digital signals converted to audio by sending modem Audio signals converted to digital by receiving modem Transmission can be synchronous or asynchronous Asynchronous Transmission Each character has start and stop bits to frame it Each character checked for transmission error via parity Terminals used by humans also have sent characters echoed back for visual confirmation Synchronous Transmission Characters grouped together in a block Control characters at the beginning and end of the block frame it Transmission error-checking Each character has a parity bit At end of block Longitudinal redundancy check (LRC) character Exclusive-OR of all transmitted characters Cyclic redundancy check (CRC) Two or four byte code generated by sending data through a feedback shift register containing XOR gates Transmission Modes Simplex One direction only Radio broadcasting Half-duplex Both directions Only one direction at a time Time to switch directions called turnaround Full-duplex Both directions simultaneously Need 4 wires 35 36

7 Ted Borys - CSI 404 5/1/2004 Page 11-7 SYN Character ASCII Comm Control Chars Used to synchronize transmitter and receiver Receiver keeps checking last 8 bits looking for a SYN character Once the first SYN is framed, next character must also be SYN If third character is SYN, receiver goes into a synchronous idle state Typical Message Format Terminal to Processor Example BCC is usually either LRC or CRC Processor to Terminal Example 41