ME 4447/6405. Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics. Instructor: Professor Charles Ume.

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1 ME 4447/6405 Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics Instructor: Professor Charles Ume Timers

2 Lecture Outline General Description of Main Timer Input Capture Concept Output Compare Concept Pulse Accumulator

3 General Description of Main Timer Central element:16-bit free running counter TCNT Bit 15 - Bit Bit 7 Bit 0 $0044 $0045 At reset counter is disabled Once enabled, counter starts from $0000 and counts up continuously When $FFFF is reached, counter rolls over to $0000 Cannot be written to during operation (only writable in test mode) May be reset upon successful Output Compare 7

4 Enabling the Free-Running Counter Timer Enable (TEN) bit determines operation of the timer and counter Writing a 1 to TEN turns on the counter, writing a 0 disables the system, reducing power consumption TSCR1 TEN TSWAI TSFRZ TFFCA $0046

5 Counter Prescaler Allows 4 clocking rates of the timer counter E-Clock rate divided by: 1, 4, 8, 16, 32, 64, 128 At reset the default prescale factor is 1 May be changed at any time Will take effect after some number of clock cycles (see p. 450 of Family Reference Manual for details)

6 Changing the Counter Prescaler Trade-off between timer resolution and timer range TOI 0 0 TSCR2 0 TCRE PR2 PR1 PR0 $004D Prescale Factor Resolution (one count) Range (Overflow) PR2 PR1 PR ns 250 ns 500 ns 1 µs 2 µs 4 µs 8 µs 16 µs ms ms ms ms ms ms ms s

7 Counter Overflows Timer overflow flag (TOF) status bit set each time the counter rolls over from $FFFF to $ TOF 0 0 TFLG $004F TOF status bit can generate an automatic interrupt request by setting the timer overflow interrupt (TOI) enable bit TOI 0 0 TSCR2 0 TCRE PR2 PR1 PR0 $004D

8 Input Capture Vs. Output Compare Each of the eight IO pins of Port T may be used as either an input capture or an output compare If IOSX is 0, the corresponding channel acts as an input capture If IOSX is 1, the corresponding channel acts as an output compare

9 Input Capture Concept Used to record the time an event occurs When an input signal is received, the time is stored in memory by capturing the contents of the free-running counter

10 Features of Input Capture Function 16-bit registers Input edge-detection logic Interrupt generation logic

11 Input Capture Registers Eight 16-bit input capture registers are available Each register has a corresponding timer input pin (TC0 -TC7) located on Port T pins PT0-PT7 When an edge is detected at a timer input pin, the current value of the free-running counter is stored in the corresponding input capture register

12 Input Capture Registers (cont d) TC Bit 15 - Bit Bit 7 Bit 0 $0050 $0051 TC Bit 15 Bit Bit 7 Bit 0 $005E $005F Can be read at any time as a pair of 8-bit registers using instructions like LDD or LDX Writing when used as Input Capture has no meaning

13 Input Edge-Detection Logic Used to select which edge of an input is detected TCTL3 EDG7B EDG7A EDG6B EDG6A EDG5B EDG5A EDG4B EDG4A $004A TCTL4 EDG3B EDG3A EDG2B EDG2A EDG1B EDG1A EDG0B EDG0A $004B Configuration EDGxB EDGxA Capture Disabled 0 0 Capture on Rising Edge Only 0 1 Capture on Falling Edge Only 1 0 Capture on Any Edge 1 1

14 Interrupt Generation Logic Input capture status flags are automatically set to one each time a selected edge is detected 7 TFLG1 C7F C6F C5F C4F C3F C2F C1F C0F $004E Input capture interrupt enable bits TIE C7I C6I C5I C4I C3I C2I C1I C0I $004C If CXI is 1when CXF is set, interrupt condition is met

15 Application of Input Captures Period or frequency measurement Capture the time of two successive rising or falling edges Pulse width measurement Capture the time between two adjacent pulses

16 Period Measurement Example Code FIRST EQU $2000 DEFINE A 2-BYTE LOCATION TO STORE FIRST EDGE PERIOD EQU $2002 DEFINE A 2-BYTE LOCATION TO STORE PERIOD ORG $1000 LDAA #$80 STAA $0046 ENABLES FREE RUNNING COUNTER LDX #$0000 LDAA #$00 ENSURES PT1 IS USED AS AN INPUT CAPTURE STAA $0040 NOTE: THIS IS THE CASE BY DEFAULT LDAA #$04 STAA $004B EDGE DETECTION FOR IC1 SET TO RISING EDGES LDAA #$02 STAA $004E CLEARS ANY OLD FLAGS FROM IC1F LOOP1 BRCLR $4E #$02 LOOP1 LOOP HERE UNTIL FIRST RISING EDGE IS DETECTED LDD $0052 READ TIME OF FIRST CAPTURE STD FIRST STORE FIRST CAPTURE VALUE LDAA #$02 STAA $004E CLEAR THE IC1F FLAG BEFORE NEXT EDGE LOOP2 BRCLR $4E #$02 LOOP2 LOOP HERE UNTIL NEXT RISING EDGE IS DETECTED LDD $0052 READ TIME OF SECOND CAPTURE SUBD FIRST FIND THE TIME DIFFERENCE BEWTEEN EDGES STD PERIOD STORE THE RESULT AS THE PERIOD : George : W. Woodruff School of Mechanical Engineering, Georgia Tech :

17 Measuring Long Periods Using Counter Overflow Extending the range of the 16-bit counter with an 8-bit software counter Software keeps track of counter overflows Creates a 24-bit counter Time values are stored as 3-byte numbers

18 Application of Input Captures (cont ) Can be used as a time reference for an output function. Input Capture records the event time Offset representing time delay is added to the input capture and stored to an output compare. Both input captures and output compares are referenced from the same counter, so software latencies do not affect the accuracy to time delay

19 Other Uses of Input Capture Pins Can be used as general purpose IO pins when the timer functions are not needed Logic levels can be read even if the input -capture function is enabled Can serve as flexible interrupt input pins Have some advantages over the IRQ pin

20 Output Compare: Basic Concept 16 Bit Register Stores a Number 8 possible Registers to store this number: Comparator checks Number against Free Running Counter (TCNT Register) Really 8 comparators-one for each number This is done in hardware, no processor time used When Counter matches TCx Register, it triggers an event

21 What Event is triggered? Three Non-Exclusive Possibilities: Changes the ouput of one or several of the pins in Port T Set a Flag in TFLG Register Cause an Interrupt

22 Output Compare causes Port T Pins to change state (Part I) Output Compares 0 to 6: Each Output compare controls a SINGLE PIN: Output Compare 0 PT0 Output Compare 1 PT1 Output Compare 2 PT2 Output Compare 3 PT3 Output Compare 4 PT4 Output Compare 5 PT5 Output Compare 6 PT6

23 Output Compare causes Port A Pins to change state (Part II) Output Compares 0 to 6: TCTL1 ($0048) and TCTL2 ($0049) Registers Control How Each Pin Changes TCTL1 $1020

24 Output Compare causes Port A Pins to change state (Part II)

25 Output Compare causes Port T Pins to change state (Part III) Output Compare 7: Causes 8 Port T pins to change simultaneously Notice PT0-PT6 are also used by Output Compares 0-6 OC7M Register determines which Port A Pins will be Controlled by Output Compare 1 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 OC7M7 OC7M6 OC7M5 OC7M4 OC7M3 OC7M2 OC7M1 OC7M0 OC7D Register sets value to be written to Port A pins selected in OC1M OC7D7 OC7D6 OC7D5 OC7D4 OC7D3 OC7D2 OC7D1 OC7D0 OC7M $0042 OC7D $0043

26 Output Compare Causes Flag to Be Set (Part I) When Output Compare is successful it sets corresponding Flag in TFLG1 Control Register: TFLG1 C7F C6F C5F C4F C3F C2F C1F C0F $004E Software must constantly poll TFG1 register to check for flags

27 Output Compare Causes Flag to be Set part (II) You Must clear the Flag after it is set You clear the Flag by writing a 1 to the corresponding Bit in TFLG! Use LDAA, STA commands to write 1 to Flag But DON T USE BSET!!!!

28 Output Compare Causes a Interrupt Output compare will cause an interrupt when corresponding bit in TIE is set: TIE C7I C6I C5I C4I C3I C2I C1I C0I $004C

29 Measuring Long Intervals: Problems with Overflow Bit You must measure this length of time t Record Start Time Record End Time This is where timer rolls over (overflow) t time But I only have this much time to record last overflow then I need to record the end time! t=[t END -T START ]+(# of overflows)*(t overflow )

30 Forced Output If you need to change state of Port T Pin BEFORE output compare occurs Use Forced Output software triggers compare to occur and Pin T will change state accordingly FOC7 FOC6 FOC5 FOC4 FOC3 FOC2 FOC1 FOC0 CFORC $0041

31 Pulse Accumulator Overview 16-bit Counter Incremented by edge on pin or by logic level of pin Used to measure duration of pulse number of events

32 Key Things to Know Can be read or written at any time 2 Modes Event Counter Gated Time Accumulation Pulse Accumulator Input Pin: Port T Pin 7 Registers

Pulse Accumulator Registers PACNT $0062 & $0063

33 Pulse Accumulator Registers PACNT $0062 & $ Bit PA Count B15 B7 B8 B0 PACTL $0060 PAFLG $0061

34 Register Settings PAEN: 0=Disabled, 1=Enabled PAMOD: 0=Event Counter, 1=Gated Time PEDGE: Event Counter: 0=Falling Edges, 1=Rising Edges Gated Time: 0=Inhibit Gate level is zero, 1=Inhibit Gate level is one

35 Register Settings CLK[0:1]: Timer Clock Selection PAOVF: 0=No Overflow, 1=Overflow PAOVI: 0=Polling, 1=Interrupt-Driven PAIF: 0=No Interrupt, 1=Interrupt PAI: 0=Polling, 1=Interrupt-Driven

36 Event Counting Mode PAMOD=0 Counts Active Edge of PAI pin PT7/ IOC7 16-BIT COUNTER PACNT Example: (PACNT=0;PAEN=1;PEDGE=1) PAI PACNT Value

37 Event Counting Example A light emitter/detector pair can be used in an assembly line to count the number of parts going by.

38 Gated Time Accumulation Mode PAMOD=1 Free-running bus clock divided by 64 Subject to PT7/IOC7 pin being active bus/64 CLOCK (from Main Timer) Clock PT7/ IOC7 AND 16-BIT COUNTER PACNT

39 Gated Time Example PACNT=0;PAEN=1;PEDGE=1 PEDGE=1 means inhibit gate is 1 (inhibit counting when PT7/IOC7 is 1) bus/64 PT7 PACNT Value

40 Pulse Width Measurement Common use of Gated mode Measure duration of single pulses Easier than with Input Capture Counter is zero before pulse starts After pulse, pulse time directly read (need starting and ending count for input capture)

41 Example: Interrupt at Specified Time Gated Time Accumulation (PAMOD=1) Set Pulse Accumulator to interrupt after 5ms Steps: Calculate time for one bus/64 cycle Divide delay by time for one bus/64 cycle Take 2 s complement and store in PACNT When input goes to active level, counter will increment until overflow

42 Assembly Code: Initialization to Count Negative Edges LDAA #$01 STAA PAFLG ;Clear PAIF by writing 1 to it LDAA #$41 ;PAEN=1, PAMOD=0, PEDGE=0, PAI=1 STAA PACTL

43 Questions???

ECE3120: Computer Systems Chapter 8: Timer Module

ECE3120: Computer Systems Chapter 8: Timer Module ECE32: Computer Systems Chapter 8: Timer Module Manjeera Jeedigunta http://blogs.cae.tntech.edu/msjeedigun2 Email: msjeedigun2@tntech.edu Tel: 93-372-68, Prescott Hall 2 Why are Timer Functions Important?