Practical approaches for re-architecture with benefits for AUTOSAR or non-autosar implementations Dave Hoadley Principle Pilot Engineer

Transcription

1 Practical approaches for re-architecture with benefits for AUTOSAR or non-autosar implementations Dave Hoadley Principle Pilot Engineer 2013 The MathWorks, Inc. 1

2 Simulink Model Architecture Partitioning a model/componentization Systems, interfaces, interconnections Motivation Team collaboration Unit testing Software architecture Reuse of components Safety partitioning (ASIL) 2

3 Agenda Walkthrough of partitioning Simple multirate demo model Basic AUTOSAR compatibility Software architecture compliance Unit test example 3

4 Simple Multi-rate Model 4

5 Configure for AUTOSAR No model changes needed 5

6 AUTOSAR Code and exported ARXML void Runnable_simple_alg_Step(void) real_t rtb_gain; real_t rtb_delay; real_t rtb_delay1; real_t rtb_tmpsignalconversionatfast_i; if (simple_alg_m->timing.taskcounters.tid[1] == 0) Rte_Receive_Fast_in_Fast_in(&rtb_TmpSignalConversionAtFast_i); rtb_delay = simple_alg_dwork.delay_dstate; rtb_delay1 = simple_alg_dwork.delay1_dstate; rtb_gain = simple_alg_dwork.delay2_dstate; rtb_gain = (((rtb_tmpsignalconversionatfast_i + simple_alg_dwork.delay_dstate) + simple_alg_dwork.delay1_dstate) + rtb_gain) * simple_alg_p.gain_gain; if (simple_alg_m->timing.taskcounters.tid[2] == 0) simple_alg_b.ratetransition = rtb_gain; simple_alg_dwork.delay_dstate = rtb_tmpsignalconversionatfast_i; simple_alg_dwork.delay1_dstate = rtb_delay; simple_alg_dwork.delay2_dstate = rtb_delay1; if (simple_alg_m->timing.taskcounters.tid[2] == 0) Rte_IWrite_Runnable_simple_alg_Step_Out1_Out1(simple_alg_B.RateTransition + Rte_IRead_Runnable_simple_alg_Step_Slow_in_Slow_in()); rate_scheduler(); <RUNNABLE-ENTITY UUID="aef16585-a f-accd-1a548ca22e27"> <SHORT-NAME>Runnable_simple_alg_Step</SHORT-NAME> <MINIMUM-START-INTERVAL>0</MINIMUM-START-INTERVAL> <CAN-BE-INVOKED-CONCURRENTLY>false</CAN-BE-INVOKED-CONCURRENTLY> <DATA-READ-ACCESSS> <VARIABLE-ACCESS> <SHORT-NAME>IN_Slow_in_Slow_in</SHORT-NAME> </RUNNABLE-ENTITY> <SENDER-RECEIVER-INTERFACE> <SHORT-NAME>Out1</SHORT-NAME> <IS-SERVICE>false</IS-SERVICE> <DATA-ELEMENTS> <VARIABLE-DATA-PROTOTYPE> <SHORT-NAME>Out1</SHORT-NAME> </VARIABLE-DATA-PROTOTYPE> </DATA-ELEMENTS> </SENDER-RECEIVER-INTERFACE> 6

7 Software architecture compliance AUTOSAR case study? void Runnable_simple_alg_Step(void) 7

8 To Function-call architecture 8

9 Functional-call code generation 9

10 Functional-call code generation void t_1tic_a(void) real_t rtb_delay; real_t rtb_delay1; rtb_delay = Component_DWork.Delay_DSTATE; rtb_delay1 = Component_DWork.Delay1_DSTATE; Component_B.Sum = ((Component_U.Fast_in + Component_DWork.Delay_DSTATE) + Component_DWork.Delay1_DSTATE) + Component_DWork.Delay2_DSTATE; Component_DWork.Delay_DSTATE = Component_U.Fast_in; Component_DWork.Delay1_DSTATE = rtb_delay; Component_DWork.Delay2_DSTATE = rtb_delay1; void t_1tic_b(void) Component_B.Gain = Component_P.Gain_Gain * Component_B.Sum; void t_10tic(void) Component_B.Add = Component_B.Gain + Component_U.Slow_in; Component_Y.Out1 = Component_B.Add; Rate 0 Rate 1 Rate 2 10

11 Multirunnable code generation 11

12 Multirunnable code generation void Runnable_Runnable1(void) real_t rtb_tmpsignalconversionatin1out; real_t rtb_delay; real_t rtb_delay1; rtb_delay = Component_DWork.Delay_DSTATE; rtb_delay1 = Component_DWork.Delay1_DSTATE; rtb_tmpsignalconversionatin1out = Rte_IRead_Runnable_Runnable1_Fast_in_Fast_in (); Rte_IrvIWrite_Runnable_Runnable1_a(((rtb_TmpSignalConversionAtIn1Out + Component_DWork.Delay_DSTATE) + Component_DWork.Delay1_DSTATE) + Component_DWork.Delay2_DSTATE); Component_DWork.Delay_DSTATE = rtb_tmpsignalconversionatin1out; Component_DWork.Delay1_DSTATE = rtb_delay; Component_DWork.Delay2_DSTATE = rtb_delay1; void Runnable_Runnable2(void) Rte_IrvIWrite_Runnable_Runnable2_b(Component_P.Gain_Gain * Rte_IrvIRead_Runnable_Runnable2_a()); void Runnable_Runnable3(void) Rte_IWrite_Runnable_Runnable3_Out1_Out1(Rte_IrvIRead_Runnable_Runnable3_b() + Rte_IRead_Runnable_Runnable3_Slow_in_Slow_in()); 12

13 Componentization Key Simulink features are Atomic Subsystems and Charts, Libraries and Model Reference 13

14 Componentization Reuse of Legacy Code Integration for simulation, production code generation Can generate AUTOSAR RTE API access points void Runnable_Runnable1(void) real32_t rtb_tmpsignalconversionatin1out; real32_t rtb_unitdelay; real32_t rtb_sldemo_sfun_filterv1; rtb_tmpsignalconversionatin1out = Rte_IRead_Runnable_Runnable1_Fast_in_Fast_in(); rtb_unitdelay = Component_DWork.UnitDelay_DSTATE; rtb_sldemo_sfun_filterv1 = filterv1( (real32_t)rtb_tmpsignalconversionatin1out, (real32_t)rtb_unitdelay, (real32_t)component_p.sldemo_sfun_filterv1_p1); Rte_IrvIWrite_Runnable_Runnable1_a(rtb_sldemo_sfun_filterV1); Component_DWork.UnitDelay_DSTATE = rtb_sldemo_sfun_filterv1; 14

15 Unit testing Verify behavior incrementally 15

16 Resources Model Architecture Links for model architecture resources Product features: Advice: Model-Based Design for Large Safety-Critical Systems Large-Scale Modeling for Embedded Systems: Scale%20Modeling%20for%20Embedded%20Applications.pdf Applying Model-Based Design to Commercial Vehicle Electronics Systems: %20Applying%20MBD%20to%20CV%20Electronics.pdf Today s Master Class on motor control 16

17 Resources AUTOSAR Links for AUTOSAR support Main page: Target Production Package: Technical support resources AUTOSAR table this afternoon Half-day hands-on workshop, 8:30AM 12PM, June 11 th; ; register at Contact MathWorks Pilot Engineering and your Account Representative dave.hoadley@mathworks.com, holly.keener@mathworks.com 17