Syllabus. Chapter 1. Course Goals. Course Information. Course Goals. Course Information

Transcription

1 COMPUTER ORGNIZTION ND DESIGN The Hardware/Software Interface 5 th Edition Syllabus Chapter 1 Computer bstractions and Technology Course syllabus is posted online s.asp Class website Or Google CPRE 381 Chapter 1 Computer bstractions and Technology 4 Course Information Prerequisite: CprE 288 Course Description: (3-2) Cr. 4. Introduction to computer organization, evaluating performance of computer systems, instruction set design. ssembly level programming: arithmetic operations, control flow instructions, procedure calls, stack management. Processor design. Datapath and control, scalar pipelines, introduction to memory and I/O systems. Course Goals To learn the principles of computer architecture using solid engineering fundamentals and quantitative cost/performance tradeoffs. To understand the performance, cost and power aspects of computer systems. To comprehend the design of instruction set architecture, computer arithmetic, CPUs, memories, and storage and I/Os. Chapter 1 Computer bstractions and Technology 2 Chapter 1 Computer bstractions and Technology 5 Course Information Lectures: MWF 9:00-9:50, Lagomarcino W0142 Class attendance is not required but encouraged Weekly lab, Coover 2050 (2048 For Friday 2PM Section There are nine lab sections, 2 hours each The first lab starts next week (ug 30) Lab 1 will be posted within next 1-2 days The labs will be pre-posted; subject to changes Chapter 1 Computer bstractions and Technology 3 Course Goals For future software designers, to understand how the basic hardware techniques work in a system. For future hardware designers, to understand how new hardware designs may affect software systems. Chapter 1 Computer bstractions and Technology 6

2 Learning Objectives By the end of this course, you should be able to Quantitatively analyze the performance/power optimization of computer systems and understand the mdahl's Law Program in MIPS assembly language and understand how C program is translated into MIPS assembly code Design integer arithmetic and logic units, and understand how floating-point units work Textbook, Ref, and On-Line Class website Check regularly for readings, lecture notes, lab assignments and course announcements Textbook companion site p?isbn= The CD contents are posted online Chapter 1 Computer bstractions and Technology 7 Learning Objectives (Continue) Design single-cycle processor including its control and datapath Design in-order processor pipeline with handling of control and data hazards Understand cache and main memory systems Understand storage systems and I/O Textbook, Ref, and On-Line BlackBoard Learn Homework assignments and submission Online discussions ll grades Chapter 1 Computer bstractions and Technology 8 Chapter 1 Computer bstractions and Technology 11 Textbook, Ref, and On-Line Textbook Computer Organization and Design: The Hardware/Software Interface, 5th edition, D.. Patterson and J. L. Hennessy, Morgan Kaufmann Publishers, Inc., 2013 Reference Books: VHDL Tutorial, Peter J. shenden, on the companion CD of the textbook. The Designer's Guide to VHDL, 2nd Edition, Peter J. shenden, Morgan Kaufman Publishers. Instructors and Ts Instructor: khilesh Tyagi Office: 317 Durham Office Hours:TB, by appointment Contact: tyagi@iastate.edu Teaching assistants nanda Biswas, biswas@iastate.edu Taewoon Kim, tkim@iastate.edu dithya Venkataraman, adithyav@iastate.edu Matt Kelley, mkelly2@iastate.edu Varghese Mathew Vaidyan, vaidyan@iastate.edu Office hours TBD

3 Grading Homework 11% Labs and Mini-projects 35% Midterm Exam I 18% (Oct 6) Midterm Exam II 18% (Nov 10) Midterm III/Final Exam 18% (Dec 15 7:30M) Classes of Computers Personal computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized Chapter 1 Computer bstractions and Technology 16 Labs and Projects Lab location: Coover 2050 (Coover 2048 Sec D), Linux machines You will work with partner(s) There will be four lab assignments and three miniprojects Labs will be done using VHDL VHDL tutorial is provided on the textbook CD For e-book users, CD contents are available on-line Lab attendance is mandatory: No attendance, zero point fail the course The last mini-project will be due in the dead week Classes of Computers Supercomputers High-end scientific and engineering calculations Highest capability but represent a small fraction of the overall computer market Embedded computers Hidden as components of systems Stringent power/performance/cost constraints Chapter 1 Computer bstractions and Technology 17 The Computer Revolution Progress in computer technology Underpinned by Moore s Law Makes novel applications feasible Computers in automobiles Cell phones Human genome project World Wide Web Search Engines Computers are pervasive 1.1 Introduction The PostPC Era millions Chapter 1 Computer bstractions and Technology 15 Chapter 1 Computer bstractions and Technology 18

4 The PostPC Era Personal Mobile Device (PMD) Battery operated Connects to the Internet Hundreds of dollars Smart phones, tablets, electronic glasses Cloud computing Warehouse Scale Computers (WSC) Software as a Service (SaaS) Portion of software run on a PMD and a portion run in the Cloud mazon and Google Eight Great Ideas Design for Moore s Law Use abstraction to simplify design Make the common case fast Performance via parallelism Performance via pipelining Performance via prediction Hierarchy of memories Dependability via redundancy 1.2 Eight Great Ideas in Computer rchitecture Chapter 1 Computer bstractions and Technology 19 Chapter 1 Computer bstractions and Technology 22 What You Will Learn How programs are translated into the machine language nd how the hardware executes them The hardware/software interface What determines program performance nd how it can be improved How hardware designers improve performance What is parallel processing Below Your Program pplication software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code Handling input/output Managing memory and storage Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers 1.3 Below Your Program Chapter 1 Computer bstractions and Technology 20 Chapter 1 Computer bstractions and Technology 23 Understanding Performance lgorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed Levels of Program Code High-level language Level of abstraction closer to problem domain Provides for productivity and portability ssembly language Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data Chapter 1 Computer bstractions and Technology 21 Chapter 1 Computer bstractions and Technology 24

5 Components of a Computer The BIG Picture Same components for all kinds of computer Desktop, server, embedded Input/output includes User-interface devices Display, keyboard, mouse Storage devices Hard disk, CD/DVD, flash Network adapters For communicating with other computers 1.4 Under the Covers Opening the Box Capacitive multitouch LCD screen 3.8 V, 25 Watt-hour battery Computer board Chapter 1 Computer bstractions and Technology 25 Chapter 1 Computer bstractions and Technology 28 Touchscreen PostPC device Supersedes keyboard and mouse Resistive and Capacitive types Most tablets, smart phones use capacitive Capacitive allows multiple touches simultaneously Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory,... Cache memory Small fast SRM memory for immediate access to data Chapter 1 Computer bstractions and Technology 26 Chapter 1 Computer bstractions and Technology 29 Through the Looking Glass LCD screen: picture elements (pixels) Mirrors content of frame buffer memory Inside the Processor pple 5 Chapter 1 Computer bstractions and Technology 27 Chapter 1 Computer bstractions and Technology 30

6 bstractions The BIG Picture bstraction helps us deal with complexity Hide lower-level detail Instruction set architecture (IS) The hardware/software interface pplication binary interface The IS plus system software interface Implementation The details underlying and interface Technology Trends Electronics technology continues to evolve Increased capacity and performance Reduced cost DRM capacity Year Technology Relative performance/cost 1951 Vacuum tube Transistor Integrated circuit (IC) Very large scale IC (VLSI) 2,400, Ultra large scale IC 250,000,000, Technologies for Building Processors and Memory Chapter 1 Computer bstractions and Technology 31 Chapter 1 Computer bstractions and Technology 34 Safe Place for Data Volatile main memory Loses instructions and data when power off Non-volatile secondary memory Magnetic disk Flash memory Optical disk (CDROM, DVD) Semiconductor Technology Silicon: semiconductor dd materials to transform properties: Conductors Insulators Switch Chapter 1 Computer bstractions and Technology 32 Chapter 1 Computer bstractions and Technology 35 Networks Manufacturing ICs Communication, resource sharing, nonlocal access Local area network (LN): Ethernet Wide area network (WN): the Internet Wireless network: WiFi, Bluetooth Yield: proportion of working dies per wafer Chapter 1 Computer bstractions and Technology 33 Chapter 1 Computer bstractions and Technology 36

7 Intel Core i7 Wafer Response Time and Throughput 300mm wafer, 280 chips, 32nm technology Each chip is 20.7 x 10.5 mm Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/ per hour How are response time and throughput affected by Replacing the processor with a faster version? dding more processors? We ll focus on response time for now Chapter 1 Computer bstractions and Technology 37 Chapter 1 Computer bstractions and Technology 40 Integrated Circuit Cost Cost per wafer Cost per die Dies per wafer Yield Dies per wafer Wafer area Die area 1 Yield (1 (Defects per areadie area/2)) Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design 2 Relative Performance Define Performance = 1/Execution Time X is n time faster than Y Performance X Execution time Performance Y Y Execution time X n Example: time taken to run a program 10s on, 15s on B Execution Time B / Execution Time = 15s / 10s = 1.5 So is 1.5 times faster than B Chapter 1 Computer bstractions and Technology 38 Chapter 1 Computer bstractions and Technology 41 Defining Performance Which airplane has the best performance? Boeing 777 Boeing 777 Boeing 747 Boeing 747 BC/Sud BC/Sud Concorde Concorde Douglas Douglas DC- DC Passenger Capacity Cruising Range (miles) Boeing 777 Boeing 777 Boeing 747 Boeing 747 BC/Sud BC/Sud Concorde Concorde Douglas Douglas DC- DC Cruising Speed (mph) Passengers x mph 1.6 Performance Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance Chapter 1 Computer bstractions and Technology 39 Chapter 1 Computer bstractions and Technology 42

8 CPU Clocking Instruction Count and CPI Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = Hz Chapter 1 Computer bstractions and Technology 43 Clock Cycles Instruction Count Cycles per Instruction Instruction Count CPI Clock Cycle Time Instruction Count CPI Clock Rate Instruction Count for a program Determined by program, IS and compiler verage cycles per instruction Determined by CPU hardware If different instructions have different CPI verage CPI affected by instruction mix Chapter 1 Computer bstractions and Technology 46 CPU Clock CyclesClock Cycle Time CPU Clock Cycles Clock Rate Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count Chapter 1 Computer bstractions and Technology 44 CPI Example Computer : Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same IS Which is faster, and by how much? B Instruction Count CPI Cycle Time I ps I500ps is faster Instruction Count CPI Cycle Time B B I1.2500ps I 600ps B I 600ps 1.2 I500ps by this much Chapter 1 Computer bstractions and Technology 47 Example Computer : 2GHz clock, 10s CPU time Designing Computer B im for 6s CPU time Can do faster clock, but causes 1.2 clock cycles How fast must Computer B clock be? Clock CyclesB Clock RateB Clock Cycles Clock Rate 10s2GHz Clock RateB 6s B 1.2Clock Cycles 6s s 9 4GHz Chapter 1 Computer bstractions and Technology 45 CPI in More Detail If different instruction classes take different numbers of cycles Clock Cycles n i1 Weighted average CPI Clock Cycles CPI Instruction Count (CPIi Instruction Counti) n i1 Instruction Counti CPIi Instruction Count Relative frequency Chapter 1 Computer bstractions and Technology 48

9 CPI Example lternative compiled code sequences using instructions in classes, B, C Class B C CPI for class IC in sequence IC in sequence Sequence 1: IC = 5 Clock Cycles = = 10 vg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = = 9 vg. CPI = 9/6 = 1.5 Reducing Power Suppose a new CPU has 85% of capacitive load of CPU 15% voltage and 15% frequency reduction 2 Pnew C 0.85(V 0.85) F P C V F The power wall We can t reduce voltage further We can t remove more heat How else can we improve performance? Chapter 1 Computer bstractions and Technology 49 Chapter 1 Computer bstractions and Technology 52 Performance Summary The BIG Picture Instructions Clock cycles Program Instruction Seconds Clock cycle Performance depends on lgorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, T c Uniprocessor Performance Constrained by power, instruction-level parallelism, memory latency 1.8 The Sea Change: The Switch to Multiprocessors Chapter 1 Computer bstractions and Technology 50 Chapter 1 Computer bstractions and Technology 53 Power Trends In CMOS IC technology Power Capacitive load Voltage 2 Frequency 40 5V 1V The Power Wall Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization Chapter 1 Computer bstractions and Technology 51 Chapter 1 Computer bstractions and Technology 54

10 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point) SPECpower_ssj2008 for Xeon X5650 n n Execution time ratio i i1 Chapter 1 Computer bstractions and Technology 55 Chapter 1 Computer bstractions and Technology 58 CINT2006 for Intel Core i7 920 Pitfall: mdahl s Law Improving an aspect of a computer and expecting a proportional improvement in overall performance Taffected Timproved Tunaffected improvement factor Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5 overall? Can t be done! n Corollary: make the common case fast 1.10 Fallacies and Pitfalls Chapter 1 Computer bstractions and Technology 56 Chapter 1 Computer bstractions and Technology 59 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec) Overall ssj_ops per Watt 10 i0 10 ssj_ops i poweri i0 mdahl s Law We know about performance: defining, measuring, and summarizing How to maximize performance gains from the beginning in our design? Principle: Make the Common Case Fast! Chapter 1 Computer bstractions and Technology 57

11 mdahl s Law Predict overall speedup from local speedup by an enhancement, provided the frequency of enhancement use is known. Local speedup is related to design and optimization objectives, like to double CPU frequency, to reduce cache latency by half Fallacy: Low Power at Idle Look back at i7 power benchmark t 100% load: 258W t 50% load: 170W (66%) t 10% load: 121W (47%) Google data center Mostly operates at 10% 50% load t 100% load less than 1% of the time Consider designing processors to make power proportional to load Chapter 1 Computer bstractions and Technology 64 mdahl s Law Execution time new Execution Time Fraction enhanced 1 Fraction enhanced Speedupenhance Speedup overall 1- Fraction Execution time Execution time enhanced new 1 Fraction Speedup enhanced enhanced Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Doesn t account for Differences in ISs between computers Differences in complexity between instructions Instruction count MIPS Execution time10 6 Instruction count Clock rate 6 Instruction count CPI 6 10 CPI10 Clock rate CPI varies between programs on a given CPU Chapter 1 Computer bstractions and Technology 65 speedup mdahl's Law f Series1 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance 1.9 Concluding Remarks Chapter 1 Computer bstractions and Technology 66