Advanced Microcontrollers Grzegorz Budzyń Lecture
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1 Advanced Microcontrollers Grzegorz Budzyń Lecture 8: ARM based MCUs and APs
2 Plan ST ARM-based microcontrollers NXP ARM-based microcontrollers AnalogDevices ARM-based microcontrollers Freescale ARM-based microcontrollers Texas Instruments ARM-based microcontrollers
3 ARM-based ST microcontrollers
4 STM32 Source: [1]
5
6 Main stream microcontrollers
7 STM32 Source: [1]
8 STM32 ST ARM-based microcontrollers NXP ARM-based microcontrollers AnalogDevices ARM-based microcontrollers Freescale ARM-based microcontrollers Texas Instruments ARM-based microcontrollers
9 STM32 ValueLine Main features: Cortex-M based family Pin compatibility with older STM32 devices ClockingspeedofCotrex-M3 coreupto 24 MHz Destined for cost-sensitive applications To be usedas a substitutionof16-bit processors
10 STM32 ValueLine Source: [1]
11 STM32 ValueLine Main features: FLASH memoryupto 128 kb SRAM upto 8 kb Upto 16 ADC converters12-bit (1.2 µs) 2 x 12-bit DAC Upto 7 timers(16-bit)givingcontrolover26 outputs Consumer Electronic Control(CEC) I2C, SPI anduart Built-in oscillator and watchdog
12 STM32 ConnectivityLine
13 STM32 ConnectivityLine Main features: Cortex-M3 based family Pin compatibility with older STM32 devices Clocking speed of Cotrex-M3 core up to 72 MHz Destined for the applications where good performance and excellent connectivity parameters are necessary
14 STM32 ConnectivityLine Source: [1]
15 STM32 ConnectivityLine Main features: FLASH memoryupto 256 kb SRAM upto 64 kb Upto 16 ADC converters12-bit (1.2 µs) 2 x 12-bit DAC Upto 7 timers(16-bit)givingcontrolover26 outputs Multichannel DMA Up to 14 communication interfaces
16 STM32 ConnectivityLine Main features: 10/100 Mb Ethernet MAC withdma Supportfor MII andrmii HostUSB 2.0 withdedicatedbuffer Two CAN 2.0B with dedicated buffers PLL block 10 timers I2C, SPI, UART Bootloaderon UART, USB andcan
17 High perfomance microcontrollers
18 STM32 High PerfomanceLine
19 STM32 High PerfomanceLine Main features: Pin-to-pin and software compatible with the STM32 F2 series DSP capability Floating point unit TFT LCD controller with graphic acceleration SDRAM interface Lessthan 1 μartc 2.4 MSPS ADCs
20 STM32 High PerfomanceLine Main features: 512kB to 2MB offlash Upto 256kB ofram Up to 20 communication interfaces WLCSP (down to 4.0 x 4.2 mm), LQFP64, LQFP100, LQFP144, LQFP176, LQFP208, UFBGA176 and TFBGA216 packages
21 ARM-based NXP microcontrollers
22 NXP portfolio of ARM core processors Source: [2]
23 NXP ARM FamilyOverview Source: [2]
![[2]](/docs-images/79/79532346/images/24-2.jpg)
24 LPC Go Source: [2]
25 LPC1100-throughput Source: [2]
26 LPC Go Source: [2]
27 LPCConnect Source: [2]
28 LPC11U00
29 LPCConnectPlus
30 Source: [2]
31 LPCConnectTurbo
32 Source: [2]
33 LPCCommand
34 LPCCommand
35 ARM-based Analog Devices microcontrollers
36 ARM-based Analog Devices microcontrollers
37 Main features: ADuC7xxx Analog microcontrollers with ARM core Improvements of 8051-based ADuC8xx series Upto 126kB FLASH Upto 8kB RAM Upto 40 MIPS 16 channelsof12 bit ADC (14b and24b versions also available) 4 channelsof12 bit DAC
38 ADuC7026 Source: [3]
39 Main features: ARM7TDMI core Clocking: ADuC7026 On chip osciallator External watch crystal External clock source up to 44 MHz Multichannel(16ch), 12-bit, 1 MSPS ADC Fully differential and single-ended modes 0 V to VREF analog input range On-chip voltage reference
40 Main features: ADuC7026 On-chip temperature sensor (±3 C) 12-bit voltage output DACs Up to 4 DAC outputs available Voltage comparator UART, 2 x I2C and SPI 4x general-purpose timers Power supply monitor 3-phase, 16-bit PWM generator Programmable logic array (PLA)
41 ADuC7026 -ADC Pseudo Differential Single Ended Source: [3]
42 ADuC7026 DrivingADC Pseudo Differential Single Ended Source: [3]
43 ADuC7026 -PLA Source: [3]
44 ADuC phase PWM Source: [3]
45 ADuC phase PWM Source: [3]
46 ADuC7026 H-bridgecontroller Source: [3]
47 ARM-based FreeScale microcontrollers
48 ARM based Freescale microcontrollers FreescaleusesARM coresinthelargestandmost powerful constructions as Multimedia Application Processors SmallerARM coresareusedinnormalmcus For lower performance constructions they are using othercores(hc08, PowerQuicc, ColdFire, PowerPC, CorIQ, ) Freescale uses ARM9, ARM11 and Cortex-A8 cores
49
50 FamilyKinetis
51 Kinetis K/L series
52
53
54 The entrypoint into the KinetisL series Devices start from8 KB of flash in a small-footprint 4x4 mm 24 QFN package
55 Kinetis KL1 family is compatible with the Kinetis K10 (ARM Cortex -M4) family Devices start from 32KB of flash in a small-footprint 5 x 5mm 32 QFN package
56 Kinetis KL2 family adds a Full-Speed USB 2.0 On-The- Go controller with anintegrated low-voltage regulator
57 KinetisKL3familyadds a flexible, low-power segmentlcd controller with support for upto 376 segments
58 Kinetis KL4 family combines USB and LCD controller
59 Devicesstart from32 KBof flash in a small-footprint 5 x 5mm 32 QFN package
60
61
62 High-performance MCUswith advanced performance and feature integration
63 Heterogenous ARM microcontrollers
64
65
66
67 Familyi.MX Freescale offers five subfamilies: i.mx2 with ARM926 cores i.mx3 with ARM1139 cores i.mx5 with Cortex-A8 cores i.mx6 with Cortex-A9 cores i.mxs with ARM9TDMI cores
68 Familyi.MX
69 Rodzina i.mx2 i.mx2 familiy
70 Main features: Familyi.MX2 ARM926EJ-S core Max clock: 454 MHz I-Cache/D-Cache: 16kB/32kB Embedded SRAM: upto 128kB Exetrnal memory interface: DDR/ DDR2 SDRAM NOR NAND andothers
71 Main features: Familyi.MX2 LCD resolution: upto 860x480 Touch screen controller Hardware Video Acceleration Image Pre- and Post- processor Upto6 x UART, 4 x SPI, 2 x I2C, I2S, 2 x CAN USB HS OTG 10/100 Ethernet + L2 Switch 4 x SD/MMC controller 1 x PCMCIA
72 Main features: Familyi.MX2 1 x MemoryStick 1 x SIM card PATA interface support of many security algorithms 6 x timer 8 x ADC channel Packagesfrom128 LQFP to 473 MAPBGA
73 i.mx3 familiy
74 Main features: Familyi.MX3 ARM1136JF-S core Max clock: 532 MHz I-Cache/D-Cache: 16kB/16kB Embedded SRAM: upto 128kB Exetrnal memory interface: DDR/ DDR2 SDRAM NOR NAND andothers
75 Main features: Familyi.MX3 LCD resolution: upto 800x400 VGA Hardware Video Acceleration Image Pre- and Post- processor OpenGL hardware support Upto5 x UART, 3 x SPI, 3 x I2C, I2S, 2 x CAN USB HS OTG 10/100 Ethernet 4 x SD/MMC controller 1 x PCMCIA
76 Main features: Familyi.MX3 1 x MemoryStick 1 x SIM card PATA interface support of many security algorithms 6 x timer Only MAPBGA packages
77 Rodzina i.mx5 i.mx5 familiy
78 Main features: Familyi.MX5 Cortex-A8 core Max clock: 1 GHz L1 I-Cache/D-Cache: 32kB/32kB L2 cache: 256kB Embedded SRAM: 128kB Exetrnal memory interface: DDR/ DDR2/ DDR3 SDRAM NOR NAND andothers
79 Main features: Familyi.MX5 LCD resolution: upto 1600x1200 HD1080p Hardware Video Acceleration Image Pre- and Post- processor OpenGL hardware support Upto5 x UART, 3 x SPI, 3 x I2C, I2S, 2 x CAN 3 x USB HS OTG 10/100 Ethernet 4 x SD/MMC controller 1 x PCMCIA
80 Main features: Familyi.MX5 PATA interface SATA interface support of many security algorithms 6 x timer Only MAPBGA packages
81 i.mx535 blockdiagram 1/2 Source: [5]
82 i.mx535 blockdiagram 2/2 Source: [5]
83 i.mx535 mainbenefits1/2 Very high-performance processing andmultimedia capabilities. Complete hardware and software packageprovided to enable faster time to marketand lower R&D investment. Dedicated video and graphics hardwareacceleration provides best in class performance for power. Adobe Flash 10.1 acceleration. Full 1080pdecode. HD 720p ready video conferencing.
84 i.mx535 mainbenefits2/2 Increased core speed improves webbrowsing experience. Up to 2GB external memory supportprepares your end device for cloudcomputing applications and future OSs and browsers. DDR2 and DDR3 ready for greater flexibilityin system design. Optimized for low power operation to givebest performance for battery life. More integration lowers your system billof materials.
85 Rodzina i.mx6 i.mx6 familiy
86 Main features: Familyi.MX6 Cortex-A9 core single, dual orquad Max clock: 1.2 GHz HD1080p encode and decode 3D video playback in high definition IOs: HDMI GigaBit Ethernet multipleusb 2.0 PCI Express Comprehensive Security
87 Main features: Familyi.MX6 1MB L2 cache Neon VFPv3-d16 3D graphicswith4 shaders DDR3 supports SATA II
88 ARM-based Texas Instruments microcontrollers
89
90 Main features: StellarisFamily Cortex-M3 core Clock upto 100MHz Over160 chips infamily Upto256kB FLASH Upto96kB RAM Ethernet, USB and CAN blocks available
91 Stellarisfamily Source: [4]
92 Sitara family
93 Main features: Sitara Family ARM MHz Cortex-A GHz only16 devicesinthefamily Extensive support for video applications Up to 32KB I/D cache 256 KB L2, LPDDR, DDR2/3 support Gigabit Ethernet, USB, SATA, CAN
94 Stellarisfamily Source: [5]
95 Main features: Sitara AM3894 Cortex-A8 1.5 GHz: Dual-issue, superscalar architecture NEON Jazelle VFPv3 32KB I/D cache 256 KB L2cache 512kB on-chip RAM Dual USB 2.0. HS-host/client
96 Main features: Sitara AM3894 SGX530 3D Graphics Engine: up to 30Mtrangles/s Universal Scalable Shader Engine Direct3D Mobile, OpenGL, OpenVG, OpenMAX API support HD Video Processing Subsystem Dual 32-bit DDR2/3 SDRAM Interfaces: Supports up to DDR2-800 and DDR GB Total Address Space One PCI Express (PCIe ) 2.0 Port One SATA controllerwithinterfaceto twoharddisks
97 Main features: Sitara AM /100/1000 Mbps Ethernet MACs Seven 32-bit General-Purpose Timers 3 x UART/IrDAmodules 2 x i2c 3 x audio ports 40MHz SPI bus
98 Sitara AM3894
99 OMAP family
100 OMAP 5432 (preview) Main features: ProcessNode: 28nm ARM Cortex -A15 ClockSpeed(Dual): 1.7GHz, 2.0GHz 2D & 3D Graphics: Hardware Accelerated Video performance (2D) : Upto 3 displays+ HDMI1.4a, 1080p HD 60fps Video performance (3D) : 12 MP stereo (dual), 1080p stereoscopic3d Imagingperformance (2D): 4 cameraswithupto 24 MP primary Imagingperformance (3D) : 12 MP stereo (dual) Resolution: Upto WUXGA (2560x1600) MemoryInterface(Dual Channel) : PC DDR3/DDR3L 532MHz
101 OMAP application
102 Thank you for your attention
103 References [1] STM32 family documentation; [2] LPC family documentation; [3] ADuC7026 documentation; [4] Stellaris family documentation; [5] Sitara family documentation; [6] EARM.pdf [7]
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