CSE120 Principles of Operating Systems. Architecture Support for OS

Transcription

1 CSE120 Principes of Operating Systems Architecture Support for OS

2 Why are you sti here? You shoud run away from my CSE120! 2 CSE 120 Architectura Support

3 Announcement Have you visited the web page? Project 0 (instaation & Submission) out Due on 10/9 Some students have submitted (Great job! I am proud of youj) Project groups for project 1-3 Size 1-3 Remember to fi the googe doc form 3 TAs & tutors wi work together to provide maxima ab hour coverage Check the Lab Hour Googe Caendar (avaiabe from the cass webpage) Entirey optiona CSE 120 Architectura Support

4 Why Start With Hardware? Operating system functionaity depends upon hardware Key goas of an OS are to enforce protection and resource sharing If done we, appications can be obivious to HW detais 4 CSE 120 Architectura Support

5 So what is inside a computer? An introduction with a rea computer k An abstract overview M&feature=reated -s&feature=reated 5 CSE 120 Architectura Support

6 A Typica Computer from a Hardware Point of View CPU... CPU Memory Chipset I/O??? bus 6 Network CSE 120 Architectura Support

7 Pentium System: can you read it? Structure of a arge PC system 7 CSE 120 Architectura Support

8 Today s Smartphone 8 CSE 120 Architectura Support

9 A Typica Computer System (back box) CPU. CPU Memory Programs and data Operating System Software 9 OS Apps Data Network CSE 120 Architectura Support

10 Memory-Storage Hierarchy 10 CSE 120 Architectura Support

11 A peek into Unix/Linux/MacOS/Windows Appication Libraries Portabe OS Layer Machine-dependent ayer User space/eve Kerne space/eve User/kerne modes are supported by hardware 11 CSE 120 Architectura Support

12 Appication Appication (E.g., games) Libraries Written by programmer Compied by programmer Uses function cas Portabe OS Layer Machine-dependent ayer 12 CSE 120 Architectura Support

13 Libraries Appication Libraries (e.g., stdio.h) Portabe OS Layer Written by eves Provided pre-compied Defined in headers Input to inker (compier) Invoked ike functions May be resoved when program is oaded Machine-dependent ayer 13 CSE 120 Architectura Support

14 Typica OS Structure Appication Libraries Portabe OS Layer Machine-dependent ayer system cas (read, open..) A high-eve code 14 CSE 120 Architectura Support

15 Typica OS Structure Appication Libraries Portabe OS Layer Machine-dependent ayer Bootstrap System initiaization Interrupt and exception I/O device driver Memory management Kerne/user mode switching Processor management 15 CSE 120 Architectura Support

16 Hardware Features for OS Features that directy support the OS incude Protection (kerne/user mode) Protected/priviege instructions Memory protection System cas Interrupts and exceptions Timer (cock) I/O contro and operation Synchronization (wi tak about this ater) 16 CSE 120 Architectura Support

17 Protected/Privieged Instructions A subset of instructions of every CPU is restricted to use ony by the OS Known as protected (privieged) instructions Ony the operating system can Directy access I/O devices (disks, printers, etc.) Security, fairness Manipuate memory management state Page tabe pointers, page protection, TLB management, etc. Manipuate protected contro registers Kerne mode, interrupt eve Hat instruction (why?) 17 CSE 120 Architectura Support

18 Now cose your eyes Imagine a word that any program can Directy access I/O devices Write anywhere in memory Execute machine hat instruction What woud happen? Do you trust such computer systems to manage Your banking account? Your emai account? Your facebook account? J 18 CSE 120 Architectura Support

19 OS Protection How do we know when it can execute a protected/priviege instruction now? An easy answer: when it runs the OS code. But how does it know that it runs the OS code? Hardware must support (at east) two modes of operation: kerne mode and user mode Mode is indicated by a status bit in a protected contro register User programs execute in user mode OS executes in kerne mode (OS == kerne ) Protected instructions ony execute in kerne mode CPU checks mode bit when protected instruction executes Attempts to execute in user mode are detected and prevented 19 Setting the mode bit must be a protected instruction

20 Memory Protection Why? OS must be abe to protect programs from each other OS must protect itsef from user programs Memory management hardware (caed MMU) provides memory protection mechanisms Manipuating MMU uses protected (privieged) operations 20 CSE 120 Architectura Support

21 Hardware Features for OS Features that directy support the OS incude Protection (kerne/user mode) Protected instructions Questions? Memory protection System cas Interrupts and exceptions Timer (cock) I/O contro and operation Synchronization 21 CSE 120 Architectura Support

22 OS Is OS ike a tiger mom? Aways there monitoring kids (user eve programs) Actuay OS is NOT a tiger mom 22 Do your homework, don t text, you are grounded, you are paying too much video games, don t snapchat, OS is more ike a.. Secretary CSE 120 Architectura Support

23 Commonaity 1: Access to Resources OS is powerfu, is a secretary powerfu? Yes, who has the master keys that can open every office? Who knows the code to reserve conference rooms, printing hundreds of pages,? Who schedue casses? Time and ocation 23 CSE 120 Architectura Support

24 Commonaity 2: Event-Driven Most importanty, both OSes and secretaries are event-driven They are not constanty there monitoring the whoe system (buiding) Secretary s job is event driven: Interna requests E.g a professor asks her to book a trip Externa events E.g. a phone ca from outside Exceptions E.g. Fire aarm 24 CSE 120 Architectura Support

25 OS Contro Fow After the OS has booted, a entry to the kerne happens as the resut of an event event immediatey stops current execution changes mode to kerne mode, event hander is caed Kerne defines a hander for each event type specific types are defined by the architecture e.g.: timer event, I/O interrupt, system ca trap When the processor receives an event of a given type, it transfers contro to hander within the OS hander saves program state (PC, regs, etc.) hander functionaity is invoked hander restores program state, returns to program 25 CSE 120 Architectura Support

26 Events An event is an unnatura change in contro fow Events immediatey stop current execution Changes mode, context (machine state), or both The kerne defines a hander for each event type Event handers aways execute in kerne mode Once the system is booted, a entry to the kerne (OS) occurs as the resut of an event 26 CSE 120 Architectura Support

27 Categorizing Events Two kinds of events, interrupts and exceptions Difference? Exceptions are caused by executing instructions CPU requires software intervention to hande a faut or trap Interrupts are caused by an externa event Device finishes I/O, timer expires, etc. 27 CSE 120 Architectura Support

28 Interrupts Interrupts signa asynchronous events I/O hardware interrupts Software and hardware timers 28 CSE 120 Architectura Support

29 Interrupt Hardware Legacy PC Design (for singe-proc systems) IRQs Ethernet SCSI Disk Save PIC (8259) Master PIC (8259) INTR x86 CPU Rea-Time Cock Keyboard Controer Programmabe Interva-Timer I/O devices have (unique or shared) Interrupt Request Lines (IRQs) IRQs are mapped by specia hardware to interrupt vectors, and passed to the CPU This hardware is caed a Programmabe Interrupt Controer (PIC)

30 The `Interrupt Controer Responsibe for teing the CPU when a specific externa device wishes to interrupt Needs to te the CPU which one among severa devices is the one needing service PIC transates IRQ to vector Raises interrupt to CPU Vector avaiabe in register Waits for ack from CPU Interrupts can have varying priorities PIC aso needs to prioritize mutipe requests Possibe to mask (disabe) interrupts at PIC or CPU

31 Hardware to Software IRQs 0 Memory Bus N PIC INTR CPU idtr vector 0 Interrupt Vector Tabe Point to the Hander function (a piece of code in the OS) Mask points 255

32 Interrupt Vector Tabe (x86) 32 CSE120 - Operating Systems, Yuanyuan Zhou

33 Interrupt Iustrated 33 CSE 120 Architectura Support

34 I/O Contro I/O issues Initiating an I/O Competing an I/O Initiating an I/O Specia instructions 34 CSE 120 Architectura Support

35 I/O Competion I/O process OS initiates I/O Device operates independenty of rest of machine Device sends an interrupt signa to CPU when done OS maintains a vector tabe containing a ist of addresses of kerne routines to hande various events CPU ooks up kerne address indexed by interrupt number, context switches to routine 35 CSE 120 Architectura Support

36 I/O Exampe 1. Ethernet receives packet, writes packet into memory 2. Ethernet signas an interrupt 3. CPU(hardware) stops current operation, switches to kerne mode, saves machine state (PC, mode, etc.) on kerne stack 4. CPU(hardware) reads address from vector tabe indexed by interrupt number, branches to address (Ethernet device driver) 5. Ethernet device driver (OS) processes packet (reads device registers to find packet in memory) 6. Upon competion, restores saved state from stack 36 CSE 120 Architectura Support

37 Timer 37 The timer is critica for an operating system It is the faback mechanism by which the OS recaims contro over the machine Timer is set to generate an interrupt after a period of time Setting timer is a privieged instruction When timer expires, generates an interrupt Handed by kerne, which contros resumption context Basis for OS scheduer (more ater ) Prevents infinite oops OS can aways regain contro from erroneous or maicious programs that try to hog CPU Aso used for time-based functions (e.g., seep())

38 Interrupt Questions Interrupts hat the execution of a process and transfer contro (execution) to the operating system Can the OS be interrupted? (Consider why there might be different interrupt eves) Interrupts are used by devices to have the OS do stuff 38 CSE 120 Architectura Support

39 Exception: Fauts 39 CSE 120 Architectura Support

40 Exception: Fauts Hardware detects and reports exceptiona conditions Exampes: Page faut, unaigned access, divide by zero Upon exception, hardware fauts (verb) Must save state (PC, regs, mode, etc.) so that the fauting process can be restarted. Why? 40 CSE 120 Architectura Support

41 Handing Fauts (1) The kerne may hande unrecoverabe fauts by kiing the user process Program faut with no registered hander Hat process, write process state to fie, destroy process In Unix, the defaut action for many signas (e.g., SIGSEGV) What about fauts in the kerne? Dereference NULL, divide by zero, undefined instruction These fauts considered fata, operating system crashes Unix panic, Windows Bue screen of death Kerne is hated, state dumped to a core fie, machine ocked up 41 CSE 120 Architectura Support

42 42 CSE 120 Architectura Support

43 Handing Fauts (advanced) Some fauts are handed by fixing the exceptiona condition and returning to the fauting context Page fauts cause the OS to pace the missing page into memory Some fauts are handed by notifying the process Faut hander changes the saved context to transfer contro to a user-mode hander on return from faut Hander must be registered with OS Unix signas or NT user-mode Async Procedure Cas (APCs) SIGALRM, SIGHUP, SIGTERM, SIGSEGV, etc. 43 CSE 120 Architectura Support

44 Switching Gear now Ony OS has direct access to hardware device, but what if a user eve program want to do I/O? Send a message to network Print a sentence into the dispay OS needs to support user eve programs to do LIMITED types of operations on hardware devices Note: not direct access 44 Anaogy: Bob needs to get my aptop from my office, shoud my secretary give her the key to my office or shoud she get the aptop for him? CSE 120 Architectura Support

45 System Cas For a user program to do something privieged (e.g., I/O) it must ca an OS procedure Known as crossing the protection boundary, or a protected procedure ca Hardware provides a system ca instruction that: Causes an exception Passes a parameter determining the system routine to ca Saves caer state (PC, regs, mode) so it can be restored Why save state? Returning from system ca restores this state Requires architectura support to: Verify input parameters (e.g., vaid addresses for buffers) Restore saved state, reset mode, resume execution 45 CSE 120 Architectura Support

46 System Ca Functions Process contro Create process, aocate memory Fie management Create, read, deete fie Device management Open device, read/write device, mount device Information maintenance Get time, get system data/parameters Communications Create/deete channe, send/receive message 46 Programmers generay do not use system cas directy They use runtime ibraries (e.g. Java, C) Why? CSE 120 Architectura Support

47 Refresh Your Assemby Code Experience Convert to assemby: whie (save[i] == k) i += 1; i and k are in $s3 and $s5 and base of array save[] is in $s6 Shift eft Loop: s $t1, $s3, 2 add $t1, $t1, $s6 w $t0, 0($t1) bne $t0, $s5, Exit addi $s3, $s3, 1 j Loop Exit: Can someone expain the assemby code? 47

48 Function Ca #Listing 3.gob main main: foo: mov $10, %eax ca foo add $5, %eax ret 48 CSE120 - Operating Systems, Yuanyuan Zhou

49 System Ca open: push dword mode push dword fags push dword path mov eax, 5 push eax ; Or any other dword int 80h add esp, byte 16 More information can be found in 49 CSE120 - Operating Systems, Yuanyuan Zhou

50 Steps in Making a System Ca Exampe: read (fd, buffer,nbytes) 50 CSE 120 Architectura Support

51 System Ca Issues What woud happen if kerne didn t save state before a system ca? Why must the kerne verify arguments? Why is a tabe of system cas in the kerne necessary? 51 CSE 120 Architectura Support

52 Once Again--Summary After the OS has booted, a entry to the kerne happens as the resut of an event event immediatey stops current execution changes mode to kerne mode, event hander is caed Kerne defines handers for each event type specific types are defined by the architecture e.g.: timer event, I/O interrupt, system ca trap When the processor receives an event of a given type, it transfers contro to hander within the OS hander saves program state (PC, regs, etc.) hander functionaity is invoked hander restores program state, returns to program 52 CSE 120 Architectura Support

53 Summary Protection User/kerne modes Protected instructions System cas Used by user-eve processes to access OS functions Access what is in the OS Exceptions Unexpected event during execution (e.g., divide by zero) Interrupts Timer, I/O 53 CSE 120 Architectura Support