Engineer To Engineer Note EE-146 Technicl Notes on using Anlog Devices' DSP components nd development tools Contct our technicl support by phone: (800) ANALOG-D or e-mil: dsp.support@nlog.com Or visit our on-line resources http://www.nlog.com/dsp nd http://www.nlog.com/dsp/ezanswers Implementing Boot Mnger for ADSP-218x Fmily DSPs Contributed by Benno Kussttscher September 5, 2002 Introduction Conventionl system design clls for single progrm to boot t power-up. One my implement more sophisticted pproch to build n ppliction comprised of seprte progrms, ech booted into the DSP s needed, under the control of boot mnger. One benefit of such n pproch is tht the totl memory consumption of the ppliction my fr exceed the on-chip memory resources provided by the chosen ADSP-218x fmily DSP. A boot mnger is piece of control code tht determines which progrm is booted fter system reset (e.g. by smpling one of input flg pins). A boot mnger my lso help to boot second progrm fter the first one hs terminted. The underlying technique remins the sme. If booted by host processor through the IDMA interfce, the ADSP-218x behves like slve nd the host device hs full control to reset nd reboot the DSP with different progrms ny time. This ppliction note discusses the scenrio where the ADSP-218x boots from n 8-bit EPROM using its BDMA cpbility. All progrms re stored in the sme EPROM the DSP boots from nd need to be mnged properly. It is obvious tht the W loder/splitter 1 utility elfspl21.exe plys crucil 1 In this context the utility elfspl21.exe functions s loder utility, only. The nme Splitter hs historicl nture for usge on former ADSP-21xx devices tht did not feture BDMA booting yet. role. The following explntions re bsed on VisulDSP++ TM version 3.0 lthough the bsic functionlity ws introduced with version 2.0. Generl Bootstrp Procedure It is not n bsolute must tht one hs n in-depth understnding of the BDMA boot process to get the boot mnger up nd running. Nevertheless it helps to dpt the procedure described below to slightly different requirements. Figure 1: VisulDSP++ project property pge In order to boot ny of the ADSP-218x fmily DSPs from n 8-bit prllel EPROM or Flsh device, the VisulDSP++ Loder/Splitter utility Copyright 2002, Anlog Devices, Inc. All rights reserved. Anlog Devices ssumes no responsibility for customer product design or the use or ppliction of customers products or for ny infringements of ptents or rights of others which my result from Anlog Devices ssistnce. All trdemrks nd logos re property of their respective holders. Informtion furnished by Anlog Devices Applictions nd Development Tools Engineers is believed to be ccurte nd relible, however no responsibility is ssumed by Anlog Devices regrding the technicl ccurcy nd topiclity of the content provided in ll Anlog Devices Engineer-to-Engineer Notes.
Figure 2: VisulDSP++ lod property pge needs to be invoked s shown in Figure 1. The defult settings within the lod property pge (Figure 2) force VisulDSP++ to invoke the splitter utility with the following commnd line switches: In response to this commnd, the elfspl21.exe genertes boot strem from the linker s executble file project1.dxe tht meets the ELF/DWARF-2 stndrd; the output file will be project1.bnm, encoded in the Intel Hex formt. Let us discuss the BDMA boot feture of the ADSP- 218x fmily first in order to understnd the structure of the boot strem. With BDMA booting enbled, fter reset the ADSP-218x DSPs do not immeditely strt to fetch nd execute instructions. First, the core is hlted nd the BDMA engine utomticlly lods the first 96 bytes from the BDMA spce nd copies them into the internl SRAM t PM ddress 0x0000. Once the BDMA trnsfer hs finished the DSP core strts to execute the 32 instructions built by these 96 bytes. Of course, most pplictions re much lrger thn 32 instructions. 32 instructions re not sufficient to boot rel pplictions, either. Therefore, this first piece of progrm is used to implement bootstrp scenrio only. We shll refer to this s the preloder. Listing 1 shows the preloder tht is used by defult. elfspl21 project1.dxe project1-218x -loder -i /* stndrd preloder (32 instructions) ddress opcodes x0 = 0x0060; dm(0x3fe2) = x0; /* BEAD /* 0x0000: 400600 93FE20 x0 = 0x0020; dm(0x3fe1) = x0; /* BIAD /* 0x0002: 400200 93FE10 x0 = 0x0000; dm(0x3fe3) = x0; /* CTRL /* 0x0004: 400000 93FE30 x0 = 0x0087; dm(0x3fe4) = x0; /* BWCOUNT /* 0x0006: 400870 93FE40 ifc = 0x0008; nop; /* BDMA IRQ /* 0x0008: 3C008C 000000 imsk = 0x0008; /* 0x000A: 3C0083 idle; /* 0x000B: 028000 jump 0x0020; nop; nop; nop; /* 0x000C: 18020F 000000... /* 0x0010: 000000 000000... /* 0x0014: 000000 000000... /* 0x0018: 000000 000000... rti; nop; nop; nop; /* 0x001C: 0A001F 000000... Listing 1: Defult preloder used by elfspl21.exe Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 2 of 8
Bsiclly, the preloder just sets up nother BDMA sequence tht lods dditionl loder code from byte ddress 0x0060 to PM ddress 0x0020. An IDLE instruction stops the progrm execution until the BDMA hs finished. The unmsked BDMA Interrupt brings the core out of the idle stte fterwrd. Plese note the RTI instruction t BDMA interrupt vector ddress 0x001C. Once the BDMA trnsfer hs finished, the code execution continues t the ddress subsequent to the IDLE instruction. The progrm jumps to 0x0020, where the recently loded instructions hve been plced. This is the first PM loction fter the BDMA interrupt vector. This second prt of the bootstrp loder is conventionlly clled pge loder. It boots the finl ppliction dt. The elfspl21.exe tool genertes this pge loder content dynmiclly. 0x000000 0x000060 0x0001F5 Preloder 32 Instructions Pge Loder 135 Instructions Appliction Dt Figure 3: EPROM memory mp exmple Bsiclly, the pge loder consists of set of BDMA setup sequences, one for every hrdwre pge tht needs to be booted. Such setup sequence tkes nine instructions; the lst one is the IDLE instruction, required to hlt progrm execution. Plese note tht the RTI instruction t ddress 0x001C is still required. The finl BDMA trnsfer lods the fixed PM pge (PM 0x0000 to 0x1FFF). It overwrites both, preloder nd pge loder. Therefore the finl BDMA setup does not use the IDLE instruction, but sets the BCR (BDMA Context Reset) bit of the BDMA control register. This forces the DSP to hlt the progrm execution until the BDMA trnsfer hs finished nd to jump to PM ddress 0x0000 fterwrd. Then, it immeditely strts to execute the booted ppliction. VisulDSP++ TM 2.0 versus 3.0 Beside minor bug fixes the elfspl21.exe utility of VisulDSP++ 3.0 is the sme s the one of the 2.0 relese with one exception: VisulDSP++ 3.0 supports booting of off-chip DM nd PM overly pges, while VisulDSP++ 2.0 does not. This new feture results in some impcts we need to be wre of. VisulDSP++ 2.0 fixes the number of pge loder instructions to 135, providing spce for up to 15 BDMA setup sequences. This is sufficient to boot ll on-chip overly pges of ADSP-2188 devices. Unused pge loder instructions re simply filled with NOP instructions. The preloder s BWCOUNT vlue is lwys 135 (=87h) s shown in Listing 1 nd Figure 3. VisulDSP++ 3.0 cn boot off-chip SRAM. Since the hrdwre does not support BDMA trnsfers directly to off-chip DM nd PM memories, dditionl instructions re required to copy boot dt from intermedite internl storge to off-chip overly memory. Therefore the pge loder of VisulDSP++ 3.0 my exceed these 135 instructions. The number of instructions my vry nd the defult preloder s BWCOUNT vlue is clculted dynmiclly by elfspl21.exe. If the ulod switch is used to replce defult preloder, the user hs no ccess to the rel length of the pge loder. The BWCOUNT register needs to be filled with constnt vlue tht mirrors the mximl possible pge loder length. This worst-cse length depends on the ppliction. Actully, the mximl length Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 3 of 8
generted by the VisulDSP++ 3.0 splitter is 658 instructions if off-chip pges re lso booted, but this my chnge in future releses. Simulting the boot procedure The entire boot procedure cn be simulted with the VisulDSP++ debugger. Plese follow these steps: Invoke the integrted VisulDSP++ environment nd select n ADSP-218x simultor session Set Settings Simultor Boot Mode to Boot from EPROM Lod the generted BNM file by Settings Simultor Lod ROM File Lod the preloder by clicking on Debug Reset Set brekpoint to ddress 0x0020 nd let the Debugger run (press F5) Set nother brekpoint t ddress 0x0000 nd press F5 gin Grouping more progrms into single EPROM imge Former splitter versions lredy fetured the commnd-line switch bdm file.dxe offset, where offset is ny deciml or hexdeciml number (0x.). It llows dditionl executble files to be included into one EPROM imge, but the splitter does not generte extr boot informtion. Therefore, the VisulDSP++ splitter fetures n dditionl switch clled bdmlod file.dxe offset tht includes the required boot loder. The only restriction is tht the second prmeter offset hs to be BDMA pge boundry. In other words: it must be multiple of 0x4000. The complete syntx my look like elfspl21 project1.dxe project1 bdmlod project2.dxe 0x4000 Then, the splitter plces second preloder t ddress 0x4000 tht looks just like the first one except tht the BMPAGE field within the BDMA control register is set to one this time. The preloder is followed by nother pge loder nd finlly the ppliction dt. 0x000000 0x000060 0x0002F2 0x004000 0x004060 0x0040E7 Preloder 1 32 Instructions Pge Loder 1 658 Instructions Project 1 Dt Preloder 2 32 Instructions Pge Loder 2 45 Instructions Project 2 Dt Figure 4: EPROM memory mp (exmple) The bdmlod switch cn be specified multiple times. For exmple, to group three projects use elfspl21 project1.dxe project1 bdmlod project2.dxe 0x4000 bdmlod project3.dxe 0x8000 Within the lod property dilog specify the A lod frme field to obtin such commnd line. If you wnt to specify third or even more lod frmes you need to type them into the dditionl options box, like illustrted in Figure 5. Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 4 of 8
Figure 5: Lod frme exmple settings Complex Boot Mnger s seprte ppliction The user cn esily implement boot mnger s seprte ppliction by tking dvntge of the bdmlod switch. A newly creted project my contin ll the code required to hndle the selective booting. First of ll, this boot mnger determines the index number of the ppliction to be booted. Regrdless whether this informtion is received on the SPORT or is determined by flg pins, finlly the index number will be vilble nd might be stored in the AR register s required by the exmple below. A simple reltionship between this index number nd the corresponding byte ddress needs to be estblished. The BEAD register holds the lower 14 bits of the byte ddress. Since the bdmlod switch enbles offsets multiple to 0x4000 only, the BEAD register is lwys set to zero. The BMPAGE bit field in the BDMA control register holds the upper 8 bits. Figure 6 shows the BDMA control register. The 8 LSBs re lwys zero for our purpose. Figure 6: BDMA Control Register In the simplified cse tht every single ppliction tkes less thn 0x4000 bytes nd therefore ppliction number 1 strts t byte ddress 0x4000 nd ppliction number 2 t 0x8000 etc. the following procedure cn be used. Mke sure tht The BDMA interrupt vector ddress 0x001C contins RTI instruction All the hrdwre stcks re empty No interrupts re pending The function lodppliction is locted t ny PM ddress higher thn 0x20 Then, jump to the lbel lodppliction which lods the preloder of the wnted progrm nd executes it fterwrd in order to boot the corresponding progrm. /* AR holds index of the progrm tht needs * to be booted. This exmple ssumes tht * every progrm occupies less thn 16384 * byte memory to keep the reltionship * between AR nd the strt byte ddress s * simple s possible. * * EPROM mp * 0x0000: boot mnger * 0x4000: progrm 1 * 0x8000: progrm 2 *... * lodppliction: /* cler nd unmsk BDMA interrupt ifc = 0x0008; nop; imsk = 0x0008; /* BEAD (lower 14-bit) is 0x0000 Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 5 of 8
x0 = 0x0000; dm(0x3fe2) = x0; /* BIAD is PM 0x0000 x0 = 0x0000; dm(0x3fe1) = x0; /* BDMA Control (BM Pge = AR+1) r = r + 1; sr = lshift r by 8 (lo); dm(0x3fe3) = sr0; /* BWCOUNT is 32 x 24 bit x0 = 0x0020; dm(0x3fe4) = x0; idle; jump 0x0000; Listing 2: Lod nother (next) progrm Finlly, use the ELF splitter to group the boot mnger nd the vrious pplictions together in single BNM file. elfspl21 bootmn.dxe bootmn bdmlod project1.dxe 0x4000 bdmlod project2.dxe 0x8000 Of course, the code of Listing 2 my or my not be prt of n explicit boot mnger. It my lso be prt of regulr ppliction project nd cn be clled once the progrm hs finished in order to boot the next one. Then the instruction r=r+1; should be removed from Listing 2. If individul boot imges don t fit into single BM pge The previous exmple ssumed the individul boot imges fit into 0x4000 bytes. In rel pplictions, this is usully not the cse. In cse of n ADSP-2185 device with 16k PM words nd 16k DM words on-chip relistic boot imge my tke six BM pges (0x18000 bytes). Then the elfspl21.exe utility could be invoked by elfspl21 bootmn.dxe bootmn bdmlod project1.dxe 0x04000 bdmlod project2.dxe 0x1C000... And the reltionship between the progrm number (stored in AR) nd the corresponding BMPAGE vlue could be clculted by /* AR holds index of the progrm tht needs * to be booted. * * EPROM mp * 0x000000: boot mnger * 0x004000: progrm 1 (BMPAGE = 1) * 0x01C000: progrm 2 (BMPAGE = 7) * 0x034000: progrm 3 (BMPAGE = 13) *... * dis m_mode; my0 = 0x0300; mr0 = 0x0100; mr = mr + r * my0 (SS); dm(0x3fe3) = mr0; Listing 3: Alterntive AR to Byte Address Reltionship Simple Boot Mnger replces preloder The procedure described bove is very flexible, but there exists n lterntive nd even simpler scenrio. If the boot mnger requires few instructions only (e.g. determining the ppliction to boot by testing n input flg pin) the preloder cn be exchnged. The ELF splitter elfspl21.exe fetures n dditionl commnd line switch ulod objectfile.doj. This forces the splitter to use user-defined preloder insted of the stndrd one. This is typiclly used to speed up the booting by reducing wit-sttes. elfspl21 project1.dxe project1 bdmlod project2.dxe 0x4000 ulod myloder.doj Within the lod property pge you cn specify your own preloder file by ctivting the user loder file check box. Plese note: since the ulod switch expects DOJ file s input, the user defined preloder must not contin symbols nd lbels. Lbels re resolved by the linker, but DOJs re just ssembler output files. The following exmple illustrtes how the FI pin might be checked in order to select either progrm 0 or progrm 1. Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 6 of 8
/* exmple of n user-defined preloder * (32 instructions, no lbels) * Input pin FI selects progrm to be * booted /* strt t ddress 0x0000.section / pm interrupts; /* BEAD x0 = 0x0060; dm(0x3fe2) = x0; /* BIAD x0 = 0x0020; dm(0x3fe1) = x0; /* set BM pge to 0 x0 = 0x0000; /* test FI pin if flg_in jump 0x0007; /* set BM pge to 1 x0 = 0x0100; /* t ddress 0x0007: BDMA Control dm(0x3fe3) = x0; /* BWCOUNT (worst cse is 658 words) x0 = 0x0292; dm(0x3fe4) = x0; /* cler nd unmsk BDMA interrupt ifc = 0x0008; nop; imsk = 0x0008; /* hlt core until IRQ idle; /* jump to pge loder jump 0x0020; nop; /* rti still t 0x001C!!! rti; nop; nop; nop; /* next ddress is 0x0020 Listing 4: Exmple of user-defined preloder tht evlutes the FI input pin The preloder in Listing 4 lwys lods 658 pge loder instructions. This is the mximl number of pge loder instructions generted by VisulDSP++ 3.0, but this number my differ in future releses. If n ppliction does not require booting overly pges BWCOUNT vlue of 135 instructions my be sufficient. The EZ-KIT Lite of the ADSP-2189M connects push button to the memory-mpped flg input PF4. An lterntive preloder tht evlutes the stte of PF4 could look like the following code exmple. /* exmple of n user-defined preloder * (32 instructions) * Input pin PF4 selects progrm * to be booted /* strt t ddress 0x0000.section / pm interrupts; /* BEAD x0 = 0x0060; dm(0x3fe2) = x0; /* BIAD x0 = 0x0020; dm(0x3fe1) = x0; /* red PFDATA nd test PF4 r = dm(0x3fe5); r = tstbit 4 of r; /* result is either 0 or 0x0010 /* if 0x0010 chnge to 0x0100 if ne r = pss 0x0100; /* BDMA Control dm(0x3fe3) = r; /* BWCOUNT x0 = 0x0292; dm(0x3fe4) = x0; /* cler nd unmsk BDMA interrupt ifc = 0x0008; nop; imsk = 0x0008; /* hlt core until IRQ idle; /* jump to pge loder jump 0x0020; nop; /* rti still t 0x001C!!! rti; nop; nop; nop; /* next ddress is 0x0020 Listing 5: Exmple of user-defined preloder tht evlutes the PF4 input pin Agin, these exmples ssume tht the single pplictions do not tke more thn 0x4000 bytes Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 7 of 8
nd tht the pge loder consists of 658 instructions. More choices required? Smpling single input flg pin like the previous exmples does limit the number of progrm options to two. Of course, this number cn be incresed by evluting multiple PFx pins. Appliction note EE-125 used n lterntive technique tht might be of generl interest: Mny pplictions use the externl memory bus only for booting; some connect 16-bit devices only. In cse the eight lower dt pins D0..D7 re unused, they cn be connected by jumpers to little network consisting of pull-up nd pulldown resistors. Depending on the jumper settings individul pins red 0 or 1. Just mke sure tht these pins re never shorted to power supply or buffer output. i4 = 0x2000; m4 = 0; pmovly = 1; r = pm(i4,m4); pmovly = 0; r = px; jump lodppliction; /* sr = lshift r by 8 (lo); * dm(0x3fe3) = sr0; Listing 6: Red D0..D7 into AR The little piece of code in Listing 6 reds the 8 LSBs nd stores the result into AR like required by Listing 2. It my lso replce the PF4 hndling in Listing 5. Then n dditionl left shift is required in order to copy AR into the BMPAGE bit field properly. References ADSP-218x DSP Hrdwre Reference ADSP-218x DSP Instruction Set Reference VisulDSP++ 3.0 Online Help VisulDSP++ 2.0 Linker nd Utilities Mnul for ADSP-21xx DSPs VisulDSP 6.1 Relese Notes ADSP-218x Embedded system softwre mngement nd In-System Progrmming (EE-125) ADSP-2106x: Storing multiple pplictions in single boot EPROM (EE-108) Document History Version Sep. 5, 02 Description Discussion of VisulDSP++ 3.0 nd generl rewording. Chpters More choices required? nd If individul boot imges don t fit into single BM pge dded. Sep. 20, 01 Initil version bsed on VisulDSP++ 2.0 Implementing Boot Mnger for ADSP-218x Fmily DSPs (EE-146) Pge 8 of 8