Introduction to ICs and Transistor Fundamentals

A Brief History 1958: First integrated circuit Flip-flop using two transistors Built by Jack Kilby at Texas Instruments 2003 Intel Pentium 4 mprocessor (55 million transistors) 512 Mbit DRAM (> 0.5 billion transistors) 2006 Intel Duo Core mprocessor (151 million transistors) 55% compound annual growth rate over 48 years No other technology has grown so fast so long Driven by miniaturization of transistors Smaller is cheaper, faster, lower in power! Revolutionary effects on society

A Brief History Annual Sales 10 18 transistors manufactured in 2003 100 million for every human on the planet Global Semiconductor Billings (Billions of US$) 200 150 100 50 0 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 Year Size of worldwide semiconductor market

VLSI Applications VLSI is an implementation technology for electronic circuitry - analogue or digital It is concerned with forming a pattern of interconnected switches and gates on the surface of a crystal of semiconductor Microprocessors personal computers Microcontrollers Memory - DRAM / SRAM Special Purpose Processors - ASICS (CD players, DSP applications) Optical Switches Has made highly sophisticated control systems mass-producable and therefore cheap

Invention of the Transistor Vacuum tubes ruled in first half of 20 th century. Large, expensive, power-hungry, unreliable 1947: first point contact transistor John Bardeen and Walter Brattain at Bell Labs Read Crystal Fire by Riordan, Hoddeson First transistor (Courtesy of Texas Instrument

MOS Integrated Circuits 1970 s processes usually had only nmos transistors Inexpensive, but consume power while idle 1980s-present: CMOS processes for low idle power Intel 1101 256-bit SRAM Intel 4004 4-bit µproc

MOS Integrated Circuits The integrated circuit from an Intel 8742, an 8-bit microcontroller that includes a CPU running at 12 MHz, 128 bytes of RAM, 2048 bytes of EPROM, and I/O in the same chip. Intel Duo Core processor, CPU speed max 3 GHz with almost 2 billion transistors

Moore s Law 1965: Gordon Moore plotted transistor on each chip Transistor counts have doubled every 18-24 months As of 2006, chip areas range from a few square mm to around 350 mm 2, with up to 1 million transistors per mm 2. Integration Levels SSI: 10 gates MSI: 1000 gates LSI: 10,000 gates VLSI: > 10k gates

Moore s Law Integration Levels Small Scale Integration: Medium Scale Integration: Large Scale Integration: Very Large Scale Integration: 10 gates 1000 gates 10,000 gates > 10k gates

Moore s Law Fit straight line on semilog scale

Moore s Law Many other factors grow exponentially Transistor becomes faster Consume less power Cheaper to manufacture 10,000 1,000 4004 8008 Clock Speed (MHz) 100 10 1 8080 8086 80286 Intel386 Intel486 Pentium Pentium Pro/II/III Pentium 4 1970 1975 1980 1985 1990 1995 2000 2005 Year

IC Design flow Various design flow based on the specific design under development Marketing department that defines the product to be developed Circuit design engineer decide the architecture of the chip to perform the market System simulation is done by a group of engineers who define and verify the definition of the individual blocks to be integrated into the final chip.

IC Design flow Circuit design group perform all the digital and analog simulations to verify the circuit solutions and gate connectivity, as well as sizes of the gates. Layout design is done by engineers and layout designers. Their work consist of laying out polygons. After first wafer are manufactured, test engineer will try to test the chips. Check if the process parameter within the acceptable tolerance levels. If and when all the errors are fixed, the chip will move to mass production and to market.

IC Design flow Market IDEA Architecture Definition System Simulation/Design Circuit Simulation/Design Layout Design Prototype & Testing Mass Production Market

Schematic Simulation Digital VLSI designer are primarily interested in DC and transient analysis that predicts the node voltages given inputs that are fixed or arbitrarily changing with time.

Schematic Simulation - transistor DC Analysis

Schematic Simulation - transient analysis

Layout Verification Many failure mechanisms in IC Design, and fixing errors is very important Design approach: only one chance to get the design right, because a revision to design is a very lengthy and costly process.

Layout Verification - DRC The design rule verification step checks that all polygons and layers from the layout database meet all of the manufacturing process rules. Design rules define the limits of a manufacturability design.

Layout Verification - LVS Checking the design is connected correctly The schematic is the reference circuit and the layout is checked against it. Electrical connectivity of all signals, including input, output and power signals for their corresponding devices Device sizes: transistor width and length Identification of extra components and signals that have not been included in the schematic.

Layout Verification - ERC Electric Rules Check Redundant because most of issues are caught by LVS Usually limited to errors in connectivity or device connection Unconnected, partly connected or extra devices Disable transistor Floating nodes Short circuits Generally ERC executes more quickly and therefore is useful to accelerate debugging problems such as VDD to VSS short circuit

Review on Transistor Bipolar junction transistors (BJT) npn or pnp silicon structure Small current into very thin base layer controls large currents between emitter and collector Base currents limit integration density

Review on Transistor Field Effect Transistors (FET) n-channel FET and p-channel FET Also known as unipolar transistor Operates on the principle that semiconductor conductivity can be increased or decreased by the presence of electric field

Review on Transistor MOS transistor Metal Oxide Semiconductor Field Effect Transistors (MOSFET) Complementary Metal Oxide Semiconductor (CMOS)

Review on Transistor MOSFET nmos and pmos MOSFETS Voltage applied to insulated gate controls current between source and drain Low power allows very high integration

Review on Transistor CMOS Uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions Extremely useful for digital circuitry design (act as a simple switches w/o having pull-up resistors) Main advantage : much smaller power dissipation

Review on Transistor CMOS operation (NMOS)

Review on Transistor CMOS operation (PMOS)

Review on Transistor Complementary MOS (CMOS) D G S NMOS G S D PMOS G = Gate D = Drain S = Source B = Bulk D S G B G B NMOS with bulk contact S D PMOS with bulk contact

Review on Transistor V DD PMOS In Out NMOS CMOS inverter circuit