CSE 591: Advanced Hardware Design Professor: Kyle Gilsdorf

Transcription

1 CSE 591: Advanced Hardware Design Professor: Kyle Gilsdorf What: System Verilog Verification Environment for Lab #2 Table of Contents 1. Overview 2 1. Verification 3 2. Feature Extraction 3 3. Stimulus Generation Plan 3 4. Coverage Plan 3 5. Verification Environment 3 Phase-0: Randomizer Class 4 Phase-1: TestBench 7 1. Interfaces 7 2. Testcase 8 3. Top Module Top Module Source Code Log file after simulation: Phase-2: Environment Environment Class: Environment Class Source Code: Log file after simulation Phase-3 Reset Define the reset() method Log file after simulation Phase-4 Packet Complete Packet Class Source Code Program Block Source Code Log file after simulation: Phase-5 Driver Developing the Driver Class Driver Class Source Code: Developing the Environment Class Environment Class Source Code: Log file from Simulation Phase-6 RECEIVER Steps to create the receiver Receiver Class Source Code: Develop the Environment Class: Environment Class Source Code: Phase-7 SCOREBOARD Scoreboard Class Source Code: Source Code of The Environment Class: 49

2 1. Overview In this tutorial, we will develop the Switch RTL core and verify it. Following are the steps we follow to verify the Switch RTL core. 1. Understand the specification and Develop Design 2. Developing Verification Plan 3. Building the Verification Environment. We will build the Environment in Multiple phases, so it will be easy for you to lean step by step. Phase 1) Develop the Testcase and interfaces, and integrate them in these with the DUT in top module. Phase 2) Develop the Environment class. Phase 3) Develop reset and configuration methods in Environment class. Then using these methods, we will reset the DUT and configure the port address. Phase 4) Develop a packet class based on the stimulus plan. We will also write a small code to test the packet class implementation. Phase 5) Develop a driver class. Packets are generated and sent to dut using driver. Phase 6) Develop receiver class. Receiver collects the packets coming from the output port of the DUT. Phase 7) We will develop scoreboard class which does the comparison of the expected packet with the actual packet received from the DUT. Phase 8) In this phase, we will write test cases and analyze the coverage report.

3 1. Verification This Document describes the Verification Plan for Switch. The Verification Plan is based on System Verilog Hardware Verification Language. The methodology used for Verification is Constraint random coverage driven verification. 2. Feature Extraction This section contains list of all the features to be verified. TC # Test Name Description 1 Configuration Configure all the 4 port address with unique values. 2 Packet DA DA field of packet should be any of the port address. All the 4 port address should be used. 3 Packet payload Length can be from 0 to 255. S packets with all the lengths. 4 Length Length field contains length of the payload. S Packet with correct length field and incorrect length fields. 5 FCS Good FCS: S packet with good FCS. Bad FCS: S packet with corrupted FCS. 3. Stimulus Generation Plan 1. Packet DA: Generate packet DA with the configured address. 2. Payload length: generate payload length ranging from 2 to Correct or Incorrect Length field. 4. Generate good and bad FCS. 4. Coverage Plan 1. Cover all the port address configurations. 2. Cover all the packet lengths. 3. Cover all correct and incorrect length fields. 4. Cover good and bad FCS. 5. Cover all the above combinations. 5. Verification Environment Mailbox Scoreboard Mailbox Generator & Driver D evice U nder T est receiver(s) receiver(s) receiver(s) receiver(s) reset() cfg_dut()

4 Phase-0: Randomizer Class We are going to use a package, classpackages.sv, in SystemVerilog which contains the following: classpackages typedef enum {FALSE, TRUE} bool_t; typedef enum {DISABLE, ENABLE} mode_t; randi mode : mode_t = ENABLE value : integer = 0 cons : int_constraint = {ENABLE, 0, 1} function void rand_modei (mode_t) function bool_t ranomizei (void) mode : mode_t = ENABLE max : integer min : integer int_constraint function void constraint_modei (mode_t) function void set_max_constraint (integer) function void set_mix_constraint (integer) randi: Class Properties: o mode: This value is an enumerated data-type whose value indicates whether or not generation of random values is enabled. o value: This is the current state of the random value contained in this class. It is updated upon every call to randomizei provided the mode is set to ENABLE. o cons: Of type int_constraint. Is used to capture the individual constraints on the integer being generated. Class Methods: o rand_modei: This function is used to ENABLE or DISABLE the generation of random values. o randomize_i: This function is used to generate random values for its property value. If the current mode is set to ENABLE. Otherwise, the value is left as is. If the mode of the object of type int_constraint is set to ENABLE, the function will try to generate a random value that fits within the constraints specified by that object. It will attempt to do so (how it does so is up to you) for some number of times (you decide what is a good limit). If the mode is disabled for the object of type int_constraint, any random value generated will be accepted. If the function successfully generates a random value, TRUE is returned. If it fails, FALSE will be returned.

5 int_constraint: Class Properties: o mode: This property is an enumerated data-type whose value indicates whether or not generation of constrained random values is enabled. o max: This property indicates the maximum value that can be randomly generated, i.e. value <= max, when the mode is set to ENABLE. o min: This property indicates the minimum value that can be randomly generated, i.e. value >= min, when the mode is set to ENABLE. Class Methods: o constraint_modei: This function is used to ENABLE or DISABLE the constraints on randomly generated values. o set_max_constraint: This is a method that changes the value of the property max. o set_min_constraint: This is a method that changes the value of the property min. `define ENABLE `define DISABLE `define TRUE `define FALSE 8'd1 8'd0 8'd1 8'd0 // Randomization Modes `define ENABLE_SET `define ENABLE_SEQ `define DISABLE 8'd2 8'd1 8'd0 class int_constraint; // variables (properties) byte unsigned mode; byte unsigned max; byte unsigned min; // functions (methods) function new( ); constraint_mode_i(`enable); set_max_constraint(8'd255); set_min_constraint(8'd0); function function void constraint_mode_i(input byte unsigned _mode); this.mode = _mode; function function void set_max_constraint(input byte unsigned _max); this.max = _max; function function void set_min_constraint(input byte unsigned _min); this.min = _min; function class : int_constraint class randi; // properties byte unsigned mode; byte unsigned value; int_constraint cons; static byte unsigned empty_set []; byte unsigned set []; // methods function new (byte unsigned _mode = `ENABLE,

6 byte unsigned _value = 8'h00, byte unsigned _set [] = empty_set); this.mode = _mode; this.set = _set; this.value = _value; cons = new ( ); function function void rand_mode_i(input byte unsigned _mode); this.mode = _mode; function function byte unsigned randomize_i( ); if (this.mode == `ENABLE) if (this.cons.mode == `DISABLE) // set random value this.value = {$random}; return `TRUE; else // set random value for(int i = 0; i < 20; i++) this.value = this.cons.min + {$random} % (this.cons.max - this.cons.min + 1); if((this.value >= this.cons.min) && (this.value <= cons.max)) return `TRUE; break; else $display("%m: could not generate constrained random value: \ %d >= %d <= %d", this.cons.min, this.value, \ this.cons.max); return `FALSE; else if (this.mode == `ENABLE_SET) this.value = set [{$random} % set.size]; return `TRUE; else $display("randi mode is disabled. enable to use randomize_i"); return `FALSE; function : randomize_i class : randi Endpackage

7 Phase-1: TestBench This section is broken down into four individual parts: 1. write SystemVerilog Interfaces for input port, output port and memory port. 2. write Top module where test case and DUT instances are done. 3. Instance and connect DUT and TestBench using interfaces 4. The Clock is generated from the top module. 1. Interfaces In the interface.sv file, declare the 3 interfaces in the following way. All the interfaces have a clock as input. All the signals in the interface are of type logic type. All the signals are synchronized to clock except reset in clocking block. Signal directional with respect to TestBench is specified with modport. Interface.sv /////////////////////////////////////////////////////////////////////////////// // Interface declaration for the memory // /////////////////////////////////////////////////////////////////////////////// interface mem_interface (input bit clock); logic [07:00] mem_data; logic [01:00] mem_add; logic mem_en; logic mem_rd_wr; clocking cb@(posedge clock); default input #1 output #1; output mem_data; output mem_add; output mem_en; output mem_rd_wr; clocking property clk) if(mem_en) mem_rd_wr => mem_add[0]== d0 ##1 mem_rd_wr== b0 ##1 mem_rd_wr == b1 && mem_add[1] == d1 ##1 mem_rd_wr == b0 ##1 mem_rd_wr == b1 && mem_add[1] == d2 ##1 mem_rd_wr == b0 ##1 mem_rd_wr == b1 && mem_add[1] == d3 ##1 mem_rd_wr == b0 property assert_mem_int: assert property (mem_int) else $error( memory read error ); modport MEM (clocking cb, input clock); interface /////////////////////////////////////////////////////////////////////////////// // Interface for the input side of switch. Reset signal is also passed hear. // /////////////////////////////////////////////////////////////////////////////// interface input_interface (input bit clock); logic data_status; logic [07:00] data_in; logic reset; clocking cb@(posedge clock); default input #1 output #1; output data_status; output data_in; clocking property clk) disable iff(rst) if (data_status)

8 ready_0 => read_0; ready_1 => read_1; ready_2 => read_2; ready_3 => read_3; property assert_input_int: assert property(input_int) else $error( input read error ); modport IP(clocking cb, output reset, input clock); interface /////////////////////////////////////////////////////////////////////////////// // Interface for the output side of the switch output_interface is for only // // one output port // /////////////////////////////////////////////////////////////////////////////// interface output_interface (input bit clock); logic [7:0] data_out; logic ready; logic read; clocking clock); default input #1 output #1; input data_out; input ready; output read; clocking property clk) disable iff (rst) ready_0 => read_0; ready_1 => read_1; ready_2 => read_2; ready_3 => read_3; property assert_input_int: assert property(output_int) else $error( output read error ); modport OP(clocking cb, input clock); interface 2. Testcase Testcase is a program block which provides an entry point for the test and creates a scope that encapsulates program-wide data. Currently this is an empty Testcase which just s the simulation after 100 time units. Program block contains all the above declared interfaces as arguments. This Testcase has initial and final blocks. program Testcase ( ); Testcase.sv initial $display(" ******************* Start of testcase ****************"); #1000; $finish; final $display(" ******************** End of testcase *****************");

9 program

10 3. Top Module The modules that are included in the source text but are not instantiated are called top modules. This module is the highest scope of modules. Generally this module is named as "top" and referenced as "top module". Module name can be anything. Do the following in the top module: 1. Generate the clock signal. bit Clock; top.sv initial forever #10 Clock = ~Clock; 2. Define the instances of memory interface. top.sv (continued) mem_interface mem_intf (Clock); 3. Define the instances of input interface. top.sv (continued) input_interface input_intf (Clock); 4. There are 4 output ports. Create 4 instances of output_interface. top.sv (continued) output_interface output_intf [4] (Clock); 5. Define the instance of test case top.sv (continued) testcase TC ( ); 6. Define the instance of DUT top.sv (continued) switch DUT (. 7. Connect all the interfaces and DUT. The design we will be using is from LAB_B. The Verilog DUT instance is connected signal by signal. top.sv (continued) switch DUT (.clk (Clock),.reset (input_intf.reset),.data_status (input_intf.data_status),.data (input_intf.data_in),.port0 (output_intf[0].data_out),.port1 (output_intf[1].data_out),.port2 (output_intf[2].data_out),.port3 (output_intf[3].data_out),.ready_0 (output_intf[0].ready),.ready_1 (output_intf[1].ready),.ready_2 (output_intf[2].ready),.ready_3 (output_intf[3].ready),.read_0 (output_intf[0].read),.read_1 (output_intf[1].read),.read_2 (output_intf[2].read),.read_3 (output_intf[3].read),.mem_en (mem_intf.mem_en),.mem_rd_wr (mem_intf.mem_rd_wr),.mem_add (mem_intf.mem_add),.mem_data (mem_intf.mem_data));

11 Memory_interface Memory Ports Output Port - 0 Output_interface Input_interface Input port Switch DUT Output Port - 1 Output Port - 2 Output_interface Output_interface Output Port - 3 Output_interface Clock Generator 4. Top Module Source Code top.sv module top ( ); ///////////////////////////////////////////////////// // Clock Declaration and Generation // ///////////////////////////////////////////////////// bit Clock; initial forever #10 Clock = ~Clock; ///////////////////////////////////////////////////// // Memory interface instance // ///////////////////////////////////////////////////// mem_interface mem_intf(clock); ///////////////////////////////////////////////////// // Input interface instance // ///////////////////////////////////////////////////// input_interface input_intf (Clock); ///////////////////////////////////////////////////// // output interface instance // ///////////////////////////////////////////////////// output_interface output_intf[4](clock); ///////////////////////////////////////////////////// // Program block Testcase instance // ///////////////////////////////////////////////////// Testcase TC ( ); ///////////////////////////////////////////////////// // DUT instance and signal connection // ///////////////////////////////////////////////////// switch DUT (.clk (Clock),.reset (input_intf.reset),.data_status (input_intf.data_status),.data (input_intf.data_in),.port0 (output_intf[0].data_out),.port1 (output_intf[1].data_out),.port2 (output_intf[2].data_out),.port3 (output_intf[3].data_out),.ready_0 (output_intf[0].ready),.ready_1 (output_intf[1].ready),.ready_2 (output_intf[2].ready),

12 module.ready_3 (output_intf[3].ready),.read_0 (output_intf[0].read),.read_1 (output_intf[1].read),.read_2 (output_intf[2].read),.read_3 (output_intf[3].read),.mem_en (mem_intf.mem_en),.mem_rd_wr (mem_intf.mem_rd_wr),.mem_add (mem_intf.mem_add),.mem_data (mem_intf.mem_data)); 5. Log file after simulation: ******************* Start of testcase **************** ******************** End of testcase *****************

13 6. Phase-2: Environment In this phase, we will write Environment class. Defining Environment class constructor. Defining required methods for execution. Currently these methods will not be implemented in this phase. Note: All the above are done in class.sv file. We will write a test case using the above define environment class in testcase.sv file. 1. Environment Class: The class is a base class used to implement verification environments. Testcase contains the instance of the environment class and has access to all the public declaration of environment class. In environment class, we will formalize the simulation steps using virtual methods. The methods are used to control the execution of the simulation. Following are the methods which are going to be defined in environment class. 1. new( ): The constructor method. It will be empty for the moment. 2. build(): In this method, all the objects like driver, monitor etc are constructed. Currently this method is empty as we did not develop any other component. 3. reset(): in this method we will reset the DUT. 4. cfg_dut(): In this method, we will configure the DUT output port address. 5. start(): in this method, we will call the methods which are declared in the other components like driver and monitor. 6. wait_for_(): this method is used to wait for the of the simulation. Waits until all the required operations in other components are done. 7. report(): This method is used to print the TestPass and TestFail status of the simulation, based on the error count.. 8. run(): This method calls all the above declared methods in a sequence order. The testcase calls this method, to start the simulation. We are not implementing build(), reset(), cfg_dut(), start() and report() methods in this phase.

14 1. New( ) Any initialization that needs to occur at the ning of the simulation will occur here. At this point, there is no initialization to speak of. So, we will just leave this blank with a print to the console to indicate that this task has been activated. class.sv (Environment) function new ( ); $display(" %0d : Environment : created env object", $time); function : new 2. Run ( ) The run ( ) method is called from the testcase to start the simulation. run ( ) method calls all the methods which are defined in the Environment class. class.sv (Environment) task run( ); $display(" %0d : Environment : start of run() method", $time); build ( ); reset ( ); cfg_dut ( ); start ( ); wait_for_ ( ); report ( ); $display(" %0d : Environment : of run() method", $time); task : run Testcase.sv class.sv (Environment) build ( ) program testcase (.... Environment env; initial.... env = new ( ); env.run ( );.... reset ( ) cfg_dut ( ) start ( ) wait_for_ ( ) report ( )

15 2. Environment Class Source Code: class.sv (Environment) class Environment; function new ( ); $display(" %0d : Environment : created env object",$time); function : new function void build ( ); $display(" %0d : Environment : start of build() method", $time); $display(" %0d : Environment : of build() method", $time); function : build task reset ( ); $display(" %0d : Environment : start of reset() method", $time); $display(" %0d : Environment : of reset() method", $time); task : reset task cfg_dut ( ); $display(" %0d : Environment : start of cfg_dut() method",$time); $display(" %0d : Environment : of cfg_dut() method",$time); task : cfg_dut task start ( ); $display(" %0d : Environment : start of start() method", $time); $display(" %0d : Environment : of start() method", $time); task : start task wait_for_ ( ); $display(" %0d : Environment : start of wait_for_() method", $time); $display(" %0d : Environment : of wait_for_() method", $time); task : wait_for_ task run ( ); $display(" %0d : Environment : start of run() method", $time); build ( ); reset ( ); cfg_dut ( ); start ( ); wait_for_ ( ); report ( ); $display(" %0d : Environment : of run() method", $time); task : run task report ( ); task : report class We will define global variables and definitions to constrain our design and track our validation results. We define all the port address as macros and a variable error as integer to keep track the number of errors occurred during the simulation. class.sv

16 `define P0 8'h00 `define P1 8'h11 `define P2 8'h22 `define P3 8'h33 `define TRUE 1 b1 `define FALSE 1 b0 int error = 0; int num_of_pkts = 10; Now we will update the test case. Take an instance of the Environment class and call the run method of the Environment class. program Testcase ( ); Testcase.sv Environment env; initial $display(" ******************* Start of testcase ****************"); env = new ( ); env.run ( ); #1000; final $display(" ******************** End of testcase *****************"); program 3. Log file after simulation ******************* Start of testcase **************** 0 : Environment : created env object 0 : Environment : start of run() method 0 : Environment : start of build() method 0 : Environment : of build() method 0 : Environment : start of reset() method 0 : Environment : of reset() method 0 : Environment : start of cfg_dut() method 0 : Environment : of cfg_dut() method 0 : Environment : start of start() method 0 : Environment : of start() method 0 : Environment : start of wait_for_() method 0 : Environment : of wait_for_() method 0 : Environment : of run() method ******************** End of testcase ***************** 7. Phase-3 Reset In this phase we will reset and configure the DUT. The Environment class has reset() method which contains the logic to reset the DUT and cfg_dut() method which contains the logic to configure the DUT port address.

17 D evice U nder T est reset() cfg_dut() NOTE: Clocking block signals can be driven only using a non-blocking assignment. 1. Define the reset() method. 1. Set all the DUT input signals to a known state. class.sv (Environment) $root.mem_intf.cb.mem_data <= 0; $root.mem_intf.cb.mem_add <= 0; $root.mem_intf.cb.mem_en <= 0; $root.mem_intf.cb.mem_rd_wr <= 0; $root.input_intf.cb.data_in <= 0; $root.input_intf.cb.data_status <= 0; $root.output_intf[0].cb.read <= 0; $root.output_intf[1].cb.read <= 0; $root.output_intf[2].cb.read <= 0; $root.output_intf[3].cb.read <= 0; 2. Reset the DUT. class.sv (Environment) // Reset the DUT $root.input_intf.reset <= 1; repeat $root.input_intf.clock; $root.input_intf.reset <= 0; 3. Updated the cfg_dut method. class.sv (Environment) task cfg_dut ( ); $display(" %0d : Environment : start of cfg_dut() method", $time); $root.mem_intf.cb.mem_en <= $root.mem_intf.clock); $root.mem_intf.cb.mem_rd_wr <= $root.mem_intf.clock); $root.mem_intf.cb.mem_add <= 8'h0; $root.mem_intf.cb.mem_data <= `P0; $display(" %0d : Environment : Port 0 Address %h ", $root.mem_intf.clock); $root.mem_intf.cb.mem_add <= 8'h1; $root.mem_intf.cb.mem_data <= `P1; $display(" %0d : Environment : Port 1 Address %h ", $time, $root.mem_intf.clock); $root.mem_intf.cb.mem_add <= 8'h2; $root.mem_intf.cb.mem_data <= `P2; $display(" %0d : Environment : Port 2 Address %h ", $root.mem_intf.clock);

18 $root.mem_intf.cb.mem_add <= 8'h3; $root.mem_intf.cb.mem_data <= `P3; $display(" %0d : Environment : Port 3 Address %h ", $root.mem_intf.clock); $root.mem_intf.cb.mem_en <= 0; $root.mem_intf.cb.mem_rd_wr <= 0; $root.mem_intf.cb.mem_add <= 0; $root.mem_intf.cb.mem_data <= 0; $display(" %0d : Environment : of cfg_dut() method", $time); task : cfg_dut 4. In wait_for_ method, wait for some clock cycles. class.sv (Environment) task wait_for_ ( ); $display(" %0d : Environment : start of wait_for_() method", $time); $display(" %0d : Environment : of wait_for_() method", $time); task : wait_for_ 2. Log file after simulation ******************* Start of testcase **************** 0 : Environment : created env object 0 : Environment : start of run() method 0 : Environment : start of build() method 0 : Environment : of build() method 0 : Environment : start of reset() method 40 : Environment : of reset() method 40 : Environment : start of cfg_dut() method 70 : Environment : Port 0 Address : Environment : Port 1 Address : Environment : Port 2 Address : Environment : Port 3 Address : Environment : of cfg_dut() method 150 : Environment : start of start() method 150 : Environment : of start() method 150 : Environment : start of wait_for_() method : Environment : of wait_for_() method : Environment : of run() method ******************** End of testcase *****************

19 8. Phase-4 Packet In this Phase, We will define a packet and then test it whether it is generating as expected. Packet is modeled using class. Packet class should be able to generate all possible packet types randomly. Packet class should also implement required methods like packing ( ), unpacking ( ), compare ( ) and display ( ) methods. We will write the packet class in class.sv file. Packet class variables and constraints have been derived from stimulus generation plan. Revisit Stimulus Generation Plan 1) Packet DA: Generate packet DA with the configured address. 2) Payload length: generate payload length ranging from 1 to ) Correct or Incorrect Length field. 4) Generate good and bad FCS. Before we get into defining the Packet class, we will need to make some minor modifications to our randomization class generated in a previous assignment. class int_constraint; // variables (properties) byte unsigned mode; byte unsigned max; byte unsigned min; class.sv (int_constraint, randi) // functions (methods) function new( ); constraint_mode_i(`enable); set_max_constraint(8'd255); set_min_constraint(8'd0); function function void constraint_mode_i(input byte unsigned _mode); this.mode = _mode; function function void set_max_constraint(input byte unsigned _max); this.max = _max; function function void set_min_constraint(input byte unsigned _min); this.min = _min; function class : int_constraint class randi; // properties byte unsigned mode; byte unsigned value; int_constraint cons; // methods function new ( ); rand_mode_i(`enable); cons = new ( ); function

20 function void rand_mode_i(input byte unsigned _mode); this.mode = _mode; function function byte unsigned randomize_i( ); if (this.mode == `ENABLE) if (this.cons.mode == `DISABLE) // set random value this.value = {$random}; return `TRUE; else // set random value for(int i = 0; i < 20; i++) this.value = this.cons.min + {$random} % (this.cons.max - this.cons.min + 1); if((this.value >= this.cons.min) & (this.value <= cons.max)) return `TRUE; break; else $display("%m: could not generate constrained random value: %d >= %d <= %d", this.cons.min, this.value, this.cons.max); return `FALSE; else $display("randi mode is disabled. enable to use randomize_i"); return `FALSE; function : randomize_i class : randi 1) Declare FCS constants as global definitions. Name the definitions as GOOD_FCS and BAD_FCS. `define BAD_FCS 8'd0 `define GOOD_FCS 8'd1 class.sv (Packet) 2) Declare the length type definitions data type. Name the definitions as GOOD_LENGTH and BAD_LENGTH. `define BAD_LENGTH 8'd0 `define GOOD_LENGTH 8'd1 class.sv (Packet) 3) Declare the length type and fcs type variables as randi. class.sv (Packet) randi fcs_kind; // Randomize the validity of the F rame S equence C heck field randi length_kind; // Randomize the length of the data field 4) Declare the packet field as rand. All fields are bit data types. All fields are 8 bit packet array. Declare the payload as dynamic array. class.sv (Packet) randi fcs_kind; // Used as part of constraining packet type randi length_kind; randi length; randi da; randi sa; randi data[]; //Payload using Maximum array,size is generated on the fly randi fcs;

21 5) Constrain the DA field to be any one of the configured address. class.sv (Packet) set = new[4]; set[0] = 8'h00; set[1] = 8'h11; set[2] = 8'h22; set[3] = 8'h33; this.da = new(`enable_set, 8'h00, set); this.da.cons.set_min_constraint(8'd0); this.da.cons.set_max_constraint(8'd255); this.da.cons.constraint_mode_i(`disable); status = status & this.da.randomize_i( ); 6) Constrain the payload dynamic array size to a value that is between 1 and to 255. class.sv (Packet) this.length = new( ); this.length.cons.set_min_constraint(8'd1); this.length.cons.set_max_constraint(8'd255); this.length.cons.constraint_mode_i(`enable); status = status & this.length.randomize_i( ); this.data = new[this.length.value]; for(i = 0; i < this.length.value ; i++) this.data[i] = new( ); this.data[i].cons.set_min_constraint(8'd0); this.data[i].cons.set_max_constraint(8'd255); this.data[i].cons.constraint_mode_i(`enable); status = status & this.data[i].randomize_i( ); 7) Constrain the payload length to the length field based on the length type. class.sv (Packet) this.length_kind = new( ); this.length_kind.cons.set_min_constraint(`bad_length); this.length_kind.cons.set_max_constraint(`good_length); this.length_kind.cons.constraint_mode_i(`enable); status = status & this.length_kind.randomize_i( ); 8) Constrain the FCS field initial value based on the fcs kind field. class.sv (Packet) this.fcs_kind = new( ); this.fcs_kind.cons.set_min_constraint(`bad_fcs); this.fcs_kind.cons.set_max_constraint(`good_fcs); this.fcs_kind.cons.constraint_mode_i(`enable); status = status & fcs_kind.randomize_i( ); 9) Define the FCS method. class.sv (Packet) /* Method to calculate the Frame Sequence Check */ function byte cal_fcs; byte result; result = 0; result = result ^ this.da.value; result = result ^ this.sa.value; result = result ^ this.length.value; for (int i = 0; i < this.length.value; i++) result = result ^ this.data[i].value; // If we are generating a bas Frame Sequence Check Field, we will // XOR a value of 1 into this field to create an invalid result. // Otherwise, we will XOR a value of 0 into this field which will

22 // result in a valid Frame Sequence Check. result = result ^ this.fcs.value; return result; function : cal_fcs 10) Define display methods: Display method displays the current value of the packet fields to standard output. class.sv (Packet) /* method to print the packet fields */ function void display ( ); $display(" PACKET KIND "); $display(" fcs_kind : %h ", fcs_kind.value); $display(" length_kind : %h ", length_kind.value); $display(" PACKET "); $display(" 0 : %h ", this.da.value); $display(" 1 : %h ", this.sa.value); $display(" 2 : %h ", this.length.value); foreach (data[i]) $write("%3d : %0h ",i + 3, this.data[i].value); $display("\n %2d : %h ",this.length.value + 3, cal_fcs); $display(" "); function : display

23 11) Define pack method: << Packet >> randi da; randi sa; randi len; randi data[ ]; randi fcs; DA SA Length Data 0 Data 1... FCS Packing is commonly used to convert the high level data to low level data that can be applied to DUT. In packet class various fields are generated. Required fields are concatenated to form a stream of bytes which can be driven conveniently to DUT interface by the driver. class.sv (Packet) /* method to pack the packet into bytes */ function int unsigned byte_pack (ref logic unsigned [7:0] bytes [ ]); bytes = new[this.data.size + 4]; bytes[0] = this.da.value; bytes[1] = this.sa.value; bytes[2] = this.length.value; foreach (data[i]) bytes[3 + i] = this.data[i].value; bytes[this.data.size + 3] = cal_fcs; byte_pack = bytes.size; function : byte_pack 12) Define unpack method: << Packet >> randi da; randi sa; randi len; randi data[255]; randi fcs; DA SA Length Data 0 Data 1... FCS

24 The unpack() method does exactly the opposite of pack method. Unpacking is commonly used to convert a data stream coming from DUT to high level data packet object. class.sv (Packet) /* method to unpack the bytes in to packet */ function void byte_unpack (ref logic [7:0] bytes []); this.da.value = bytes[0]; this.sa.value = bytes[1]; this.length.value = bytes[2]; this.fcs.value = bytes[bytes.size - 1]; this.data = new[bytes.size - 4]; foreach(this.data[i]) this.data[i] = new ( ); this.data[i].value = bytes[i + 3]; this.fcs.value = 0; if(bytes[bytes.size - 1]!= cal_fcs) this.fcs.value = 1; function : byte_unpack 14) Define a compare method. The compare ( ) method compares the current value of the object instance with the current value of the specified object instance. If the value is different, FALSE is returned. class.sv (Packet) /* method to compare the packets */ function bit compare (Packet pkt); compare = 1; if(pkt == null) $display(" ** ERROR ** : pkt : received a null object "); compare = 0; else if(pkt.da.value!== this.da.value) $display(" ** ERROR **: pkt : Da field did not match"); compare = 0; if(pkt.sa.value!== this.sa.value) $display(" ** ERROR **: pkt : Sa field did not match"); compare = 0; if(pkt.length.value!== this.length.value) $display(" ** ERROR **: pkt : Length field did not match"); compare = 0; foreach(this.data[i]) if(pkt.data[i].value!== this.data[i].value) $display(" ** ERROR **: pkt : Data[%0d] field did not match",i); compare = 0; if(pkt.fcs.value!== this.fcs.value) $display(" ** ERROR **: pkt : fcs field did not match %h %h", pkt.fcs.value,this.fcs.value); compare = 0; function : compare 3. Complete Packet Class Source Code

25 class.sv (Packet) class Packet; randi fcs_kind; // Used as part of constraining packet type randi length_kind; randi length; randi da; randi sa; randi data [ ]; // Payload using Maximum array, size is generated on the fly randi fcs; function new ( ); bit status = `TRUE; integer i; this.fcs_kind = new ( ); this.fcs_kind.cons.set_min_constraint (`BAD_FCS); this.fcs_kind.cons.set_max_constraint (`GOOD_FCS); this.fcs_kind.cons.constraint_mode_i (`ENABLE); status = status & this.fcs_kind.randomize_i ( ); this.length_kind = new ( ); this.length_kind.cons.set_min_constraint(`bad_length); this.length_kind.cons.set_max_constraint(`good_length); this.length_kind.cons.constraint_mode_i(`enable); status = status & this.length_kind.randomize_i ( ); this.length = new ( ); this.length.cons.set_min_constraint (8'd1); this.length.cons.set_max_constraint (8'd255); this.length.cons.constraint_mode_i (`ENABLE); status = status & this.length.randomize_i( ); this.da = new ( ); this.da.cons.set_min_constraint (8'd0); this.da.cons.set_max_constraint (8'd255); this.da.cons.constraint_mode_i (`ENABLE); status = status & this.da.randomize_i ( ); this.sa = new ( ); this.sa.cons.set_min_constraint(8'd0); this.sa.cons.set_max_constraint(8'd255); this.sa.cons.constraint_mode_i(`enable); status = status & this.sa.randomize_i ( ); this.data = new[this.length.value]; for(i = 0; i < this.length.value; i++) this.data[i] = new( ); this.data[i].cons.set_min_constraint(8'd0); this.data[i].cons.set_max_constraint (8'd255); this.data[i].cons.constraint_mode_i (`ENABLE); status = status & this.data[i].randomize_i ( ); fcs = new( ); fcs.cons.set_min_constraint(8'd0); fcs.cons.set_max_constraint(8'd255); fcs.cons.constraint_mode_i(`enable); function : new function bit randomize_o ( ); bit status = `TRUE; integer i = 0; status = status & this.fcs_kind.randomize_i ( ) ; status = status & this.length_kind.randomize_i ( ); status = status & this.length.randomize_i ( ); status = status & this.da.randomize_i ( ); status = status & this.sa.randomize_i ( );

26 this.data = new[this.length.value - 4]; foreach (this.data[i]) this.data[i] = new ( ); status = status & this.data[i].randomize_i( ); function : randomize_o /* method to calculate the fcs */ function byte cal_fcs ( ); byte unsigned result; result = 0; result = result ^ this.da.value; result = result ^ this.sa.value; result = result ^ this.length.value; for (int i = 0; i < data.size; i++) result = result ^ this.data[i].value; // If we are generating a bas Frame Sequence Check Field, we will // XOR a value of 1 into this field to create an invalid result. // Otherwise, we will XOR a value of 0 into this field which will // result in a valid Frame Sequence Check. result = result ^ this.fcs.value; return result; function : cal_fcs /* method to print the packet fields */ function void display ( ); $display(" PACKET KIND "); $display(" fcs_kind : %h ", fcs_kind.value); $display(" length_kind : %h ", length_kind.value); $display(" PACKET "); $display(" 0 : %h ", this.da.value); $display(" 1 : %h ", this.sa.value); $display(" 2 : %h ", this.length.value); foreach(data[i]) $write("%3d : %0h ",i + 3, this.data[i].value); $display("\n %2d : %h ",this.length.value + 3, cal_fcs); $display(" "); function : display /* method to pack the packet into bytes */ function int unsigned byte_pack(ref logic unsigned [7:0] bytes [ ]); bytes = new [this.data.size + 4]; bytes[0] = this.da.value; bytes[1] = this.sa.value; bytes[2] = this.length.value; foreach (data[i]) bytes[3 + i] = this.data[i].value; bytes[this.data.size + 3] = cal_fcs; byte_pack = bytes.size; function : byte_pack /* method to unpack the bytes in to packet */ function void byte_unpack (ref logic [7:0] bytes[]); this.da.value = bytes[0]; this.sa.value = bytes[1]; this.length.value = bytes[2]; this.fcs.value = bytes[bytes.size - 1]; this.data = new[bytes.size - 4]; foreach(this.data[i]) this.data[i] = new ( ); this.data[i].value = bytes[i + 3]; this.fcs.value = 0;

27 if (bytes[bytes.size - 1]!= cal_fcs) this.fcs.value = 1; function : byte_unpack /* method to compare the packets */ function bit compare (Packet pkt); compare = 1; if(pkt == null) $display(" ** ERROR ** : pkt : received a null object "); compare = 0; else if(pkt.da.value!== this.da.value) $display(" ** ERROR **: pkt : Da field did not match"); compare = 0; if(pkt.sa.value!== this.sa.value) $display(" ** ERROR **: pkt : Sa field did not match"); compare = 0; if(pkt.length.value!== this.length.value) $display(" ** ERROR **: pkt : Length field did not match"); compare = 0; foreach(this.data[i]) if(pkt.data[i].value!== this.data[i].value) $display(" ** ERROR **: pkt : Data[%0d] field did not match", i); compare = 0; if(pkt.fcs.value!== this.fcs.value) $display(" ** ERROR **: pkt : fcs field did not match %h %h", pkt.fcs.value,this.fcs.value); compare = 0; function : compare class : Packet Now we will write a small program to test our packet implementation. This program block is not used to verify the DUT. It is used to instantiate our test components. Write a simple program block and create two instances of the packet class. Randomize the packet and call the display method to analyze the generation. Then pack the packet in to bytes and then unpack bytes and then call compare method to check all the methods. 4. Program Block Source Code program Testcase ( ); Testcase.sv Environment env; Packet pkt1; Packet pkt2; logic [7:0] bytes [ ]; initial $display(" ******************* Start of testcase ****************"); env = new ( ); env.run ( );

28 #1000; $finish; initial pkt1 = new ( ); pkt2 = new ( ); repeat(1) if(pkt1.randomize_o) $display (" Randomization Successful."); pkt1.display ( ); void'(pkt1.byte_pack(bytes)); pkt2 = new ( ); pkt2.byte_unpack(bytes); // Copy the bytes over from the Packet 1 if(pkt2.compare(pkt1)) $display(" Packing, Unpacking and compare worked"); else $display(" *** Something went wrong in Packing or Unpacking or compare ***"); else $display(" *** Randomization Failed ***"); final $display(" ******************** End of testcase *****************"); program

29 Randomization Successful. 5. Log file after simulation: PACKET KIND fcs_kind : BAD_FCS length_kind : GOOD_LENGTH PACKET : 00 1 : f7 2 : be 3 : a6 4 : 1b 5 : b5 6 : fa 7 : 4e 8 : 15 9 : 7d 10 : : : : c4 14 : aa 15 : c4 16 : cf 17 : 4f 18 : f4 19 : : : f1 22 : 2c 23 : ce 24 : 5 25 : cb 26 : 8c 27 : 1a 28 : : : 5f 31 : 7a 32 : a2 33 : f0 34 : c9 35 : dc 36 : : 3f 38 : : f4 40 : df 41 : c5 42 : d7 43 : : : 1 46 : : : d6 49 : f4 50 : d9 51 : 4f 52 : 0 53 : dd 54 : d2 55 : a6 56 : : : : f2 60 : a2 61 : a1 62 : fd 63 : ea 64 : c1 65 : : c7 67 : : e1 69 : : c6 71 : cf 72 : cd 73 : : : : b8 77 : 1c 78 : df 79 : e6 80 : 1a 81 : ce 82 : 8c 83 : ec 84 : b6 85 : bb 86 : a5 87 : : cb 89 : : e1 91 : : : e 94 : ee 95 : : : cd 98 : : : 7b 101 : e6 102 : : ad 104 : : ee 106 : 9c 107 : : a7 109 : b8 110 : : f 112 : ca 113 : ec 114 : b5 115 : 8d 116 : d8 117 : 2f 118 : 6f 119 : ea 120 : 4c 121 : : : f2 124 : 4e 125 : : d8 127 : : f1 129 : d 130 : d6 131 : d5 132 : : c 134 : de 135 : a9 136 : 1d 137 : a0 138 : ae 139 : : f5 141 : : d8 143 : 7a 144 : 4c 145 : d4 146 : b8 147 : : b7 149 : c3 150 : c9 151 : 7b 152 : a3 153 : : 2b 155 : b4 156 : : : : : df 161 : : c9 163 : : : 2b 166 : f0 167 : ba 168 : 4a 169 : a9 170 : 7f 171 : : 1e 173 : : a8 175 : : : 3d 178 : : e6 180 : : : c6 183 : : d6 185 : 1b 186 : 5f 187 : : a0 189 : a3 190 : : : : Packing, Unpacking and compare worked Randomization Successful

30 9. Phase-5 Driver In phase 5 we will write a driver and then instantiate the driver in environment and s packet in to D evice U nder T est. Driver class is defined in class.sv file. Driver is class which generates the packets and then drives it to the D evice U nder T est input interface and pushes the packet in to mailbox. Mailbox Drive the packet Generate the Packet Pack the Packet 1. Developing the Driver Class 1. Declare a packet. Packet gpkt; class.sv (Driver) 2. Define a mailbox "drvr2sb" Define a parameterized mailbox "drvr2sb" which is used to s the packets to the score board. We must use a Parameterized mailbox due to our license limitations. mailbox #(Packet) drvr2sb; class.sv (Driver) 3. Define new constructor with arguments Define new constructor with a mail box for arguments, which is used to s packets from the driver to scoreboard. class.sv (Driver) // constructor method // function new (mailbox #(Packet) _drvr2sb); if(_drvr2sb == null) $display(" **ERROR**: drvr2sb is null"); $finish; else this.drvr2sb = _drvr2sb; // Point our mailbox handle to the global mailbox handle

31 4. Construct the packet in the driver constructor. class.sv (Driver) gpkt = new ( ); // Initialize the local Packet Object 5. Define the start method. In start method, do the following: Repeat the following steps for num_of_pkts times. repeat ($root.num_of_pkts) class.sv (Driver) Randomize the packet and check if the randomization is successful. class.sv (Driver) if (pkt.randomize_o( )) $display (" %0d : Driver : Randomization Successes full.", $time); else $display (" %0d Driver : ** Randomization failed. **", $time); Display the packet content. pkt.display( ); class.sv (Driver) Then pack the packet in to bytes. length = pkt.byte_pack(bytes); class.sv (Driver) Then s the packet byte in to the switch by asserting data_status of the input interface signal and driving the data bytes on to the data_in signal. class.sv (Driver) // assert the data_status signal and s the packed bytes // foreach $root.input_intf.clock); $root.input_intf.cb.data_status <= 1; $root.input_intf.cb.data_in <= bytes[i]; After driving all the data bytes, de-assert data_status signal of the input interface. // deassert the data_status $root.input_intf.clock); $root.input_intf.cb.data_status <= 0; $root.input_intf.cb.data_in <= 0; class.sv (Driver) S the packet in to mail "drvr2sb" box for scoreboard. class.sv (Driver) // Push the packet in to mailbox for scoreboard

32 drvr2sb.put(pkt); If randomization fails, increment the error counter which is defined in Globals.sv file $root.error++; class.sv (Driver) 2. Driver Class Source Code: class Driver; mailbox #(Packet) drvr2sb; Packet gpkt; class.sv (Driver) // constructor method function new(mailbox #(Packet) _drvr2sb); if(_drvr2sb == null) $display(" **ERROR**: drvr2sb is null"); $finish; else this.drvr2sb = _drvr2sb; // Point our mailbox handle to the global mailbox handle gpkt = new(); // Initialize the local Packet Object function : new // method to s the packet to DUT task start(); Packet pkt; int length; logic [7:0] bytes [ ]; repeat($root.num_of_pkts) $root.input_intf.clock); pkt = new gpkt; // Randomize the packet if (pkt.randomize_o ( )) $display (" %0d : Driver : Randomization Successes full. ", $time); // display the packet content pkt.display ( ); // Pack the packet in tp stream of bytes length = pkt.byte_pack(bytes); // assert the data_status signal and s the packed bytes foreach $root.input_intf.clock); $root.input_intf.cb.data_status <= 1; $root.input_intf.cb.data_in <= bytes[i]; // deassert the data_status $root.input_intf.clock); $root.input_intf.cb.data_status <= 0; $root.input_intf.cb.data_in <= 0; // Push the packet in to mailbox for scoreboard drvr2sb.put(pkt); $display(" %0d : Driver : Finished Driving the packet with length %0d", $time, length); else $display (" %0d Driver : ** Randomization failed. **", $time); // Increment the error count in randomization fails $root.error++; task : start

33 class : Driver 3. Developing the Environment Class Now we will take the instance of the driver in the environment class. Mailbox Drive the packet D evice U nder T est Generate the Packet Pack the Packet reset() cfg_dut() 1) Declare a mailbox "drvr2sb" which will be used to connect the scoreboard and driver. mailbox #(Packet) drvr2sb; class.sv (Environment) 2) Declare a driver object "drvr". Driver drvr; class.sv (Environment) 3) In build method, construct the mail box. drvr2sb = new (); class.sv (Environment) 4) In build method, construct the driver object. Pass the "drvr2sb" mail box. Drvr = new(drvr2sb); class.sv (Environment) 5) To start sing the packets to the DUT, call the start method of "drvr" in the start method of Environment class. drvr.start ( ); class.sv (Environment) 3. Environment Class Source Code: class.sv (Environment)

34 class Environment; `define P0 8'h00 `define P1 8'h11 `define P2 8'h22 `define P3 8'h33 Driver drvr; mailbox #(Packet) drvr2sb; function new ( ); $display(" %0d : Environment : created env object", $time); function : new function void build ( ); $display(" %0d : Environment : start of build() method", $time); drvr2sb = new; drvr = new (drvr2sb); $display(" %0d : Environment : of build() method", $time); function : build task reset ( ); $display(" %0d : Environment : start of reset() method", $time); // Drive all DUT inputs to a known state $root.mem_intf.cb.mem_data <= 0; $root.mem_intf.cb.mem_add <= 0; $root.mem_intf.cb.mem_en <= 0; $root.mem_intf.cb.mem_rd_wr <= 0; $root.input_intf.cb.data_in <= 0; $root.input_intf.cb.data_status <= 0; $root.output_intf[0].cb.read <= 0; $root.output_intf[1].cb.read <= 0; $root.output_intf[2].cb.read <= 0; $root.output_intf[3].cb.read <= 0; // Reset the DUT $root.input_intf.reset <= 1; repeat $root.input_intf.clock; $root.input_intf.reset <= 0; $display(" %0d : Environment : of reset() method", $time); task : reset task cfg_dut ( ); $display(" %0d : Environment : start of cfg_dut() method", $time); $root.mem_intf.cb.mem_en <= $root.mem_intf.clock); $root.mem_intf.cb.mem_rd_wr <= $root.mem_intf.clock); $root.mem_intf.cb.mem_add <= 8'h0; $root.mem_intf.cb.mem_data <= `P0; $display(" %0d : Environment : Port 0 Address %h ", $time, $root.mem_intf.clock); $root.mem_intf.cb.mem_add <= 8'h1; $root.mem_intf.cb.mem_data <= `P1; $display(" %0d : Environment : Port 1 Address %h ", $time, $root.mem_intf.clock); $root.mem_intf.cb.mem_add <= 8'h2; $root.mem_intf.cb.mem_data <= `P2; $display(" %0d : Environment : Port 2 Address %h ", $root.mem_intf.clock);

35 $root.mem_intf.cb.mem_add <= 8'h3; $root.mem_intf.cb.mem_data <= `P3; $display(" %0d : Environment : Port 3 Address %h ", $root.mem_intf.clock); $root.mem_intf.cb.mem_en <= 0; $root.mem_intf.cb.mem_rd_wr <= 0; $root.mem_intf.cb.mem_add <= 0; $root.mem_intf.cb.mem_data <= 0; $display(" %0d : Environment : of cfg_dut() method", $time); task : cfg_dut task start ( ); $display(" %0d : Environment : start of start() method", $time); drvr.start ( ); $display(" %0d : Environment : of start() method", $time); task : start task wait_for_ (); $display(" %0d : Environment : start of wait_for_() method", $time); $display(" %0d : Environment : of wait_for_() method", $time); task : wait_for_ task run ( ); $display(" %0d : Environment : start of run() method", $time); build ( ); reset ( ); cfg_dut ( ); start ( ); wait_for_ ( ); report ( ); $display(" %0d : Environment : of run() method", $time); task : run task report ( ); task : report class : Environment

36 4. Log file from Simulation. ******************* Start of testcase **************** 0 : Environment : created env object 0 : Environment : start of run() method 0 : Environment : start of build() method 0 : Environment : of build() method 0 : Environment : start of reset() method 40 : Environment : of reset() method 40 : Environment : start of cfg_dut() method 70 : Environment : Port 0 Address : Environment : Port 1 Address : Environment : Port 2 Address : Environment : Port 3 Address : Environment : of cfg_dut() method 150 : Environment : start of start() method 210 : Driver : Randomization Successes full PACKET KIND fcs_kind : BAD_FCS length_kind : GOOD_LENGTH PACKET : 22 1 : 11 2 : 2d 3 : 63 4 : 2a 5 : 2e 6 : c 7 : a 8 : 14 9 : c1 10 : : 8f 12 : : 5d 14 : da 15 : : 2c 17 : ac 18 : 1c 19 : : 3c 21 : 7e 22 : f3 23 : ed 24 : : d1 26 : 3e 27 : : aa 29 : : : : aa 33 : cf 34 : : : 9a 37 : 1d 38 : : 8 40 : : : : b 44 : : : fc 47 : 8f 48 : cd : Driver : Finished Driving the packet with length : Driver : Randomization Successes full

37 10. Phase-6 RECEIVER In this phase, we will write a receiver and use the receiver in environment class to collect the packets coming from the switch output_interface. Receiver collects the data bytes from the interface signal. And then packs the bytes in to packet and pushes it into mailbox. Receiver class is written in reveicer.sv file. Put the packet in the mailbox Collect the bytes Unpack the bytes 1. Steps to create the receiver 1. Declare a mailbox. Declare a mailbox. "rcvr2sb" which is used to s the packets to the score board mailbox #(Packet) rcvr2sb; class.sv (Receiver) 2. Define new constructor. Define a new constructor with arguments, virtual input interface and a mail box which is used to s packets from the receiver to scoreboard. class.sv (Receiver) function new (mailbox rcvr2sb); this.output_intf = output_intf_new; if (rcvr2sb == null) $display(" **ERROR**: rcvr2sb is null"); $finish; else this.rcvr2sb = rcvr2sb; function : new