CORELIS. BusPro-S High Speed Multi-IO SPI Host, Debugger, and Programmer. User s Manual. Corelis, Inc.

Transcription

1 CORELIS 1 BusPro-S High Speed Multi-IO SPI Host, Debugger, and Programmer User s Manual Corelis, Inc Alondra Blvd. Cerritos, CA Telephone: (562) Fax: (562)

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3 Preface Copyright , Corelis, Inc. PRINTING HISTORY Edition 1, June 2012 Edition 2, March 2017 GENERAL NOTICE Information contained in this document is subject to change without notice. CORELIS shall not be liable for errors contained herein for incidental or consequential damages in connection with the furnishing, performance, or use of material contained in this manual. This document contains proprietary information that is protected by copyright. All rights reserved. No part of this document may be reproduced or translated to other languages without the prior written consent of CORELIS. This manual is a CORELIS proprietary document and may not be transferred to another party without the prior written permission of CORELIS. CORELIS assumes no responsibility for the use of or reliability of its software on equipment that is not furnished by CORELIS. ENVIRONMENTAL NOTICE This product must be disposed of in accordance with the WEEE directive. TRADEMARK NOTICE Windows is a registered trademark of Microsoft Corporation. Other products and services named in this book are trademarks or registered trademarks of their respective companies. All trademarks and registered trademarks in this book are the property of their respective holders. Preface i

4 PRODUCT WARRANTY AND SOFTWARE MAINTENANCE For product warranty and software maintenance information, see the PRODUCT WARRANTY AND SOFTWARE MAINTENANCE POLICY statement included with your product shipment. EXCLUSIVE REMEDIES THE REMEDIES CONTAINED HEREIN ARE THE CUSTOMER'S SOLE AND EXCLUSIVE REMEDIES. CORELIS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHETHER BASED ON CONTRACT, TORT, OR ANY OTHER LEGAL THEORY. Product maintenance agreements and other customer assistance agreements are available for Corelis products. For assistance, contact your nearest Corelis Sales and Service Office. RETURN POLICY No items returned to CORELIS for warranty, service, or any other reason shall be accepted unless first authorized by CORELIS, either direct or through its authorized sales representatives. All returned items must be shipped pre-paid and clearly display a Return Merchandise Authorization (RMA) number on the shipping carton. Freight collect items will NOT be accepted. Customers or authorized sales representatives must first contact CORELIS with notice of request for return of merchandise. RMAs can only originate from CORELIS. If authorization is granted, an RMA number will be forwarded to the customer either directly or through its authorized sales representative. CONTACT INFORMATION The latest news, tips and updates on the Corelis bus analyzer hardware and software products can be found in the Corelis user forums. The forums are provided as a free service to our existing customers but an individual user name and password is required. To request an account, please visit forums.corelis.com/register.php For sales inquiries, please contact sales@corelis.com. For any support related questions, please enter a support request at or support@corelis.com. For more information about other products and services that Corelis offers, please visit ii Preface

5 Table of Contents Chapter 1 Product Overview... 1 Introduction to the SPI Bus... 1 Introduction to the BusPro-S... 4 SPI Exerciser Software Toolset... 7 Third Party Application Interface (BusPro_S.DLL)... 7 BusPro-S Hardware Controller... 7 BusPro-S Hardware Self-Test... 8 Chapter 2 Installation... 9 Installing the SPI Exerciser Application Software...10 Installing the BusPro-S Hardware...18 Chapter 3 Getting Started Overview...21 Using Debugger...22 Using Programmer...33 Chapter 4 Connecting to a Target Connecting the SPI Signals...40 Chapter 5 Interactive Debugger Overview...41 Command Script Interfaces...43 Debugger Transaction Log...46 Other Features...48 Debugger Command Script Keywords...49 Chapter 6 EEPROM and Flash Memory Programmer Overview...69 Programmer Features...70 Chapter 7 Third Party Application Interface Overview...77 Dynamic Link Library (DLL)...78 General Calling Sequence...79 iii

6 Function Reference...82 Appendix A BusPro-S Hardware Reference Hardware Specifications Hardware DC and Switching Characteristics SPI Timing Diagrams iv

7 List of Figures Figure 1. 4-wire SPI Bus Configuration with Multiple Slaves... 1 Figure 2. SPI Bus Timing... 2 Figure 3. 3-wire SPI Configuration with One Slave... 2 Figure 4. Quad IO SPI Configuration with One Slave... 3 Figure 5. Illustration of the BusPro-S... 5 Figure 6. BusPro-S Product Components... 6 Figure 7. SPI Exerciser Installation Wizard...10 Figure 8. License Agreement Screen...11 Figure 9. Customer Registration Screen...12 Figure 10. Destination Folder Screen...13 Figure 11. Select Program Folder Screen...14 Figure 12. Completing the Installation Wizard Screen...15 Figure 13. Windows 7 Security Warning Pop-up Window...16 Figure 14. Windows XP Logo Test Warning Pop-up Window...16 Figure 15. Installation Completed Screen...17 Figure 16. Found New Hardware Wizard - Welcome Screen (Windows XP)...18 Figure 17. Found New Hardware Wizard - Install Options (Windows XP)...19 Figure 18. Found New Hardware Wizard Installation Complete (Windows XP)...20 Figure 19. Editing and Running Command Script...22 Figure 20. Observing Transaction Log Entry...23 Figure 21. Editing and Running Command Script...23 Figure 22. Observing Transaction Log Entry...24 Figure 23. Editing and Running Command Script...24 Figure 24. Observing Transaction Log Entry...25 Figure 25. Editing and Running Command Script...25 Figure 26. Observing Transaction Log Entry...26 Figure 27. Editing and Running Command Script...26 Figure 28. Observing Transaction Log Entry...27 Figure 29. Editing and Running Command Script...28 Figure 30. Observing Transaction Log Entry...28 Figure 31. Stepping Command Script...29 Figure 32. Stepping Command Script...30 Figure 33. Observing Transaction Log Entry...30 Figure 34. Selecting Run To Cursor Menu Item...31 Figure 35. Running to Cursor...32 Figure 36. Observing Transaction Log Entry...32 Figure 37. Erasing and Blank-checking Memory...33 Figure 38. Observing Memory Read Window...34 Figure 39. Editing Memory Content...34 Figure 40. Updating Memory Content...35 Figure 41. Observing Memory Read Window...35 Figure 42. Programming and Verifying...36 Figure 43. Observing Memory Read Window...36 Figure 44. Editing Memory Content...37 Figure 45. Updating Memory Content...37 Figure 46. Observing Memory Read Window...38 Figure 47. Verifying Memory...38 Figure 48. Observing Programmer Diagnostics...39 v

8 Figure 49. BusPro-S Connector Pin Numbers...40 Figure 50. Debugger Window...42 Figure 51. Debugger Command Script Window...43 Figure 52. Debugger Transaction Log Window...46 Figure 53. Debugger Transaction Log Pop-up Menu...47 Figure 54. Pin Status Indicator...48 Figure 55. Program-Verify-Erase Tab in Ready State...70 Figure 56. Program-Verify-Erase Tab in Running State...71 Figure 57. Read Tab...73 Figure 58. Read Tab with Mismatched Memory Content...73 Figure 59. Programmer Diagnostics Window...74 Figure 60. Programmer Diagnostics Window Displaying Information on Error...75 Figure 61. Pin Status Indicator...75 Figure 62. Timing Diagrams of SPI Modes Figure 63. Data Out Timing Figure 64. Data In Timing Figure 65. SPI Mode 0 Timing Figure 66. SPI Mode 1 Timing Figure 67. SPI Mode 2 Timing Figure 68. SPI Mode 3 Timing Figure Wire and Microwire Timing vi

9 List of Tables Table 1. SPI Mode Definitions... 2 Table 2. BusPro-S Pin Descriptions...40 Table 3. Command Script Interface Component Descriptions...45 Table 4. Transaction Log Window Column Descriptions...46 Table 5. Debugger Command Script Keywords...50 Table 6. Signal Mappings in Data Line Modes...51 Table 7. Signal Mappings in Data Line Modes...52 Table 8. Signal Mappings in Data Line Modes...53 Table 9. Signal Mappings in Data Line Modes...59 Table 10. Program-Verify-Erase Tab Component Descriptions...72 Table 11. Read Tab Component Descriptions...74 Table 12. DLL Components...78 Table 13. BusPro-S DLL Functions...83 Table 14. Bit to Signal Mapping...98 Table 15. Signal Mappings in Data Line Modes Table 16. Valid Frequency Values in SPI Interface Types Table 17. CPOL and CPHA of SPI Modes Table 18. Comparison of SPI Type Interfaces vii

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11 Introduction What this User s Manual Covers This User s Manual was designed to make using your BusPro-S SPI host adapter and its software easier and more efficient. The manual contains easy to navigate tutorials and reference information that are presented in a logical progression. The following briefly summarizes each chapter: Chapter 1: Product Overview This chapter provides you with an overview of the BusPro-S host adapter and software application features as well as an introduction to the SPI bus. Chapter 2: Installation In this chapter you will learn how to install the SPI Exerciser software and the BusPro-S hardware. Chapter 3: Getting Started This chapter introduces you to the basic usage of the BusPro-S for writing and executing debugger scripts and programming with serial EEPROM and Flash memory devices. Although it is possible to explore the capabilities of the BusPro-S on your own, working through this chapter will provide you with an immediate feel for its ease of use and core functionality. Chapter 4: Connecting to a Target This chapter provides you with the pin assignment information of the BusPro-S controller. Chapter 5: Interactive Debugger This chapter describes the features of the Debugger which are used to manually generate traffic and interact with the target SPI bus. Chapter 6: EEPROM and Flash Memory Programmer This chapter describes the features of the Programmer, which are used to read and write the content of EEPROM and Flash memory devices on the target SPI bus. Chapter 7: Third Party Application Interface This chapter provides a reference on all of the function calls available for use in third party software applications that control the BusPro-S host adapter through the provided dynamic link library (DLL). Appendix A: BusPro-S Hardware Reference This appendix presents the physical and electrical specifications for the BusPro-S hardware. Introduction ix

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13 BusPro-S and SPI Exerciser product overview Chapter 1 Product Overview Introduction to the SPI Bus The Serial Peripheral Interface (SPI) bus was developed by Motorola to provide full-duplex synchronous serial communication between master and slave devices. The SPI bus is commonly used for communication with Flash memory, sensors, real-time clocks (RTCs), analog-to-digital converters, and more. As shown in Figure 1, standard SPI masters communicate with slaves using the serial clock (SCK), Master Out Slave In (MOSI), Master In Slave Out (MISO), and Slave Select (SS) lines. The SCK, MOSI, and MISO signals can be shared by slaves while each slave has a unique SS line. Figure 1. 4-wire SPI Bus Configuration with Multiple Slaves The SPI bus defines no protocol for data exchange, limiting overhead and allowing for high speed data streaming. Clock polarity (CPOL) and clock phase (CPHA) can be specified as 0 or 1 to form four unique modes to provide flexibility in communication between master and slave as shown in Figure 2. Product Overview 1

14 Figure 2. SPI Bus Timing If CPOL and CPHA are both 0 (defined as Mode 0) data is sampled at the leading rising edge of the clock. Mode 0 is by far the most common mode for SPI bus slave communication. If CPOL is 1 and CPHA is 0 (Mode 2), data is sampled at the leading falling edge of the clock. Likewise, CPOL = 0 and CPHA = 1 (Mode 1) results in data sampled at on the trailing falling edge and CPOL = 1 with CPHA = 1 (Mode 3) results in data sampled on the trailing rising edge. Table 1 below summarizes the available modes. Mode CPOL CPHA Table 1. SPI Mode Definitions In addition to the standard 4-wire configuration, the SPI bus has been extended to include a variety of IO standards including 3-wire for reduced pin count and dual or quad I/O for higher throughput. In 3-wire mode, MOSI and MISO lines are combined to a single bidirectional data line. Transactions are half-duplex to allow for bidirectional communication. Reducing the number of data lines and operating in half-duplex mode also decreases maximum possible throughput; many 3-wire devices have low performance requirements and are instead designed with low pin count in mind. Figure 3. 3-wire SPI Configuration with One Slave 2 Product Overview

15 Multi I/O variants such as dual I/O and quad I/O add additional data lines to the standard for increased throughput. Components that utilize multi I/O modes can rival the read speed of parallel devices. Quad I/O devices can, for example, offer up to 4 times the performance of standard 4-wire SPI when communicating with a high speed device. Read operations from high density Flash memory can benefit greatly from the increased throughput offered by multi I/O communication. Figure 4. Quad IO SPI Configuration with One Slave Product Overview 3

16 Introduction to the BusPro-S The Corelis BusPro-S is a SPI (Serial Peripheral Interface) host adapter product, which provides the capabilities to test, debug, and program SPI slave devices. It consists of the hardware controller and the software application along with a third-party application programming interface (API). The BusPro-S hardware controller and the SPI Exerciser software application provide the following features: High-performance SPI controller with multi-io interface. Four IO modes including standard (4-wire), 3-wire, dual, and quad. User-programmable SCK rate up to 30 MHz in standard mode and up to 60 MHz in enhanced mode. Up to 200 Mb/s throughput in enhanced mode for fast programming speed. Selectable interface voltage of 1.8V, 2.5V, and 3.3V. Configurable bit order, slave select polarity, and SPI mode. Eight independent slave select signals for designs with multiple slave devices. Powerful debugger with command script editor. In-System Programming (ISP) of SPI serial Flash and EEPROMs. Detailed transaction log with time stamp and data recording. High-speed USB 2.0 interface. Robust and portable bus-powered USB device, no external power supply required. Royalty-free software application programming interface (API). SPI Exerciser software supports Windows XP, Windows Vista, and Windows 7 operating systems (32-bit and 64-bit). Because of its rich feature set and ease-of-use, the BusPro-S can be used in a variety of applications, such as product development, troubleshooting, validation, system integration, production, and field testing. The BusPro-S hardware controller, shown in Figure 5, connects to the PC via a high-speed USB 2.0 port and can operate either with the provided SPI Exerciser software application, or using the included API of C/C++ library function calls from third party software applications such as National Instruments LabVIEW or custom user-developed software. 4 Product Overview

17 Figure 5. Illustration of the BusPro-S Product Overview 5

18 The overview of the BusPro-S product components are illustrated in Figure 6. SPI Exerciser Application BusPro_S.DLL (API) USB 2.0 BusPro-S Controller SPI SPI Target Bus Figure 6. BusPro-S Product Components 6 Product Overview

19 SPI Exerciser Software Toolset The SPI Exerciser provides GUI based easy-to-use Debugger and Programmer modules. For user convenience, all available options can be easily accessed from the main screens, which are all tab-based GUI. In addition, the Transaction Log and Programmer Diagnostics windows are provided as dock-able windows so that they can be easily moved around and rearranged according to the user s needs. Debugger The Debugger module provides a direct read/write interactive interface with the target SPI bus through the use of command scripts. It can be used to perform simple data transfers both to and from slave devices acting as the master device on the bus. Looping and other execution methods for the command scripts are provided along with the multiple tabs for maintaining multiple command sessions. It provides the access to both Standard and Enhanced SPI interfaces of the BusPro-S controller through using two different command script interface tabs. Transaction Log The Transaction Log records and displays all activities performed by the BusPro-S through the Debugger commands. Using the information provided in the log, users can efficiently track, test, debug, and validate their SPI target devices. The log can be continuously gathered and backed up during each session and also can be exported. Programmer Using the Programmer tool, the BusPro-S can be utilized to perform high speed programming of SPIcompatible serial EEPROM and Flash memory devices. Devices can be programmed in-system and at maximum programming speed, which is typically within several seconds depending on the memory size. The Programmer provides options to Erase, Program, Verify, and Read target memory. The content of the memory device can be also saved to a file in a supported data file format including Motorola S-Record, Intel Hex, and a hex-text file format. Programmer Diagnostics The Programmer Diagnostics window displays a summary of the actions performed by the Programmer. It displays the result of the actions such as erase, blank-check, program, and verify, and displays the total time it took. When an action fails, it displays more detailed information on why the action failed along with the comparison of expected and actual results. Third Party Application Interface (BusPro_S.DLL) The BusPro-S includes an application programming interface (API) in the form of a 32-bit Windows DLL. All major host functions are available through the API for convenient integration into third party applications and for use with popular lab and test executive software suites. BusPro-S Hardware Controller The BusPro-S is a high-speed, multi-io SPI host adapter designed with speed, versatility, and value in mind. It features two different SPI interface types; one with the support for all four SPI modes, and the other with the enhanced data line modes such as 3-wire, dual, and quad. The Enhanced SPI interface features a 60 MHz clock rate with up to 200 Mb/s throughput. Product Overview 7

20 BusPro-S Hardware Self-Test The Self-Test program included with the product performs basic hardware diagnostics of the BusPro-S controller. It performs a USB communications test, a board-level boundary-scan test, and a voltage test. The program is located in the SelfTest folder in the SPI Exerciser program folder (e.g. C:\Program Files\Corelis\SPI Exerciser\SelfTest ). 8 Product Overview

21 Chapter 2 Installation Installing the SPI Exerciser software and the BusPro-S hardware Prior to installation, please verify that the following SPI Exerciser software and BusPro-S hardware materials are present and free from visible damage or defects. If anything appears to be missing or damaged, please contact Corelis immediately. The BusPro-S product consists of the following components: - BusPro-S Hardware - 6 USB 2.0 Cable - SPI Target Interface Cable consisting of flying leads - CD-ROM containing the SPI Exerciser application, user s manual, and example files Installation 9

22 Installing the SPI Exerciser Application Software You must first install the SPI Exerciser application software, and then connect the BusPro-S controller. The application software contains the driver for the BusPro-S. The BusPro-S controller is a hot-pluggable USB device. However, it is not recommended to plug in or unplug the BusPro-S while the SPI Exerciser application is running. The BusPro-S CD-ROM contains the installation program. Windows will automatically recognize and configure the BusPro-S the first time it is detected in your system. Administrator rights are required to install the software on a Windows OS. Installation Steps 1. Insert the Corelis SPI Exerciser CD-ROM into your CD drive. The installation program should start automatically and display the Welcome to the Installation Wizard screen as shown in Figure 7. (If the installation program does not automatically start, go to the Windows Explorer, find the setup.exe file on the CD-ROM drive, and double-click on it to launch the installer.) Figure 7. SPI Exerciser Installation Wizard 2. Click on the Next button. 10 Installation

23 3. The License Agreement screen shown in Figure 8 will be displayed. Figure 8. License Agreement Screen 4. Review the entire agreement, and if you agree, select I accept the terms of the license agreement, and then click on the Next button. Installation 11

24 5. The Customer Registration screen shown in Figure 9 will then be displayed. Figure 9. Customer Registration Screen 6. Type in or change the User Name and Organization as needed, then click on the Next button. 12 Installation

25 7. The Destination Folder screen shown in Figure 10 will be displayed. 8. Accept the default installation folder, or customize your installation by selecting the browse button. It is strongly recommended that the application be installed in the default folder. Figure 10. Destination Folder Screen 9. Click on the Next button. Installation 13

26 10. The Select Program Folder screen shown in Figure 11 will be displayed. 11. Select Anyone who uses this computer or Only for me. 12. By default, the installer will place a shortcut icon for the SPI Exerciser on your desktop. If you do not wish this shortcut to be created, uncheck the checkbox on this screen. Figure 11. Select Program Folder Screen 13. Click on the Next button. 14 Installation

27 14. The Completing the Installation Wizard screen shown in Figure 12 will be displayed. 15. To change any installation parameters, click on the Back button. Otherwise, click on the Next button and the installation process will begin. Figure 12. Completing the Installation Wizard Screen 16. The installer copies the program files to the specified folder and support files to the Windows system folders. In addition, the installer creates a Windows Start Menu group named SPI Exerciser. Installation 15

28 17. If you are running Windows 7 or Vista, the software installation may be interrupted by the operating system by displaying warning pop-up windows as shown in Figure 13. If this occurs, click on the Install this driver software anyway button to safely ignore the warnings and proceed with the installation. Figure 13. Windows 7 Security Warning Pop-up Window 18. If you are running Windows XP, the software installation may be interrupted by the operating system by displaying warning pop-up windows as shown in Figure 14. If this occurs, click on the Continue Anyway button to safely ignore the warnings and proceed with the installation. Figure 14. Windows XP Logo Test Warning Pop-up Window 16 Installation

29 19. The Installation Completed screen shown in Figure 15 will appear to indicate that the installation is complete. Click on the Finish button to exit from the installation program. Figure 15. Installation Completed Screen Installation 17

30 Installing the BusPro-S Hardware The BusPro-S controller is a hot-plug USB device. You must first install the SPI Exerciser software before installing the BusPro-S controller. Drivers for the BusPro-S controller are installed with the SPI Exerciser software and not installing the software and drivers first may result in improper unit configuration and operation. Installation Steps 1. You should have already installed the SPI Exerciser at this point. If not, please do so before continuing with hardware installation. 2. Connect a USB 2.0 compatible cable from the BusPro-S USB 2.0 connector to any available USB 2.0 connector on your PC. 3. If you are running Windows XP, the Found New Hardware Wizard dialog box should automatically appear as shown in Figure 16. Figure 16. Found New Hardware Wizard - Welcome Screen (Windows XP) 4. Click on No, not this time and click on the Next button. 18 Installation

31 5. The dialog shown in Figure 17 will pop up. Figure 17. Found New Hardware Wizard - Install Options (Windows XP) 6. Click on Install the software automatically (Recommended) and click on the Next button. 7. The Hardware Wizard will attempt to locate the driver that was installed with the SPI Exerciser software. Under Windows XP, a warning dialog box may pop up. You can safely ignore the warning and continue the installation process by pressing the Continue Anyway button. Installation 19

32 8. After the necessary files are copied to the system, the dialog box shown in Figure 18 will appear indicating that the driver has been successfully installed. Figure 18. Found New Hardware Wizard Installation Complete (Windows XP) 9. Click on the Finish button to close the Hardware Wizard dialog box. 10. Another Found New Hardware Wizard should appear again. Repeat steps 3 to The installation of the driver is now complete and Windows will proceed to detect and configure the BusPro-S. Congratulations! You have now successfully installed the BusPro-S and drivers on your computer and it is ready to be used. 20 Installation

33 SPI Exerciser operation overview and tutorial Chapter 3 Getting Started Overview This chapter will quickly introduce you to the basic usage of the Corelis SPI Exerciser tool for accessing a target SPI bus via the BusPro-S. Although it is possible to explore the capabilities of this system on your own, working through this chapter is intended to give an immediate feel and appreciation for its ease of use and core functionality. The material in this chapter is organized as a series of example scenarios with step-by-step instructions. Getting Started 21

34 Using Debugger The example scenarios in this section will guide you through the basic features of the Debugger module step by step. Scenario 1: Writing and reading bytes and bits 1. Connect the BusPro-S to the host computer through a USB 2.0 port. 2. Connect the target system or device if any. (You can still go through with the example without any real target, but you will not be able to see any real data.) 3. Start the SPI Exerciser application. 4. Go to the Standard SPI Debugger Tab. 5. At the Tab 1-1 of the command script window, type in the text write AB and execute it by clicking on the [Run] button. Figure 19. Editing and Running Command Script 6. Then you will see the Transaction Log showing the very first transaction you generated, which writes a byte 0xAB to the device whose chip-select line is tied to slave select line Getting Started

35 Figure 20. Observing Transaction Log Entry 7. Now go to the Tab 1-2 of the command script window, type in the text read 2, and execute it by clicking on the [Run] button. Figure 21. Editing and Running Command Script 8. Then you will see the Transaction Log showing 2 bytes read from the slave device. (If no target is attached, FF FF will be returned.) Getting Started 23

36 Figure 22. Observing Transaction Log Entry 9. Now go to the Tab 1-3 of the command script window, type in the text writeread CD EF 34 56, and execute it by clicking on the [Run] button. Figure 23. Editing and Running Command Script 10. Then you will see the Transaction Log showing that the 4 bytes of data (0xCD, 0xEF, 0x34, and 0x56) are written to the slave device, and 4 bytes are read from it at the same time. (If no target is attached, all FF s will be returned.) 24 Getting Started

37 Figure 24. Observing Transaction Log Entry 11. Now go to the Tab 1-4 of the command script window, type in all three commands used in the three previous tabs, and execute it by clicking on the [Run] button. Figure 25. Editing and Running Command Script 12. Then you will see the Transaction Log showing all three commands executed in a sequence. Getting Started 25

38 Figure 26. Observing Transaction Log Entry 13. Now go to the Tab 1-5 of the command script window, type in the following text, and execute it by clicking on the [Run] button. writebit 7 3F readbit F writereadbit 9 AB CD // write 7 bits (= 0x3F & 0xFE) // read 15 bits // write 9 bits (first 9 MSB) // and read 9 bits back from slave Figure 27. Editing and Running Command Script 26 Getting Started

39 14. Then you will see the Transaction Log showing all three commands executed in a sequence. Notice that the number of bytes now includes a fraction part, which indicates the number of bits in addition to the bytes. (e.g. 1.7 = 1 byte + 7 bits = 15 bits) Figure 28. Observing Transaction Log Entry Scenario 2: Generating dual and quad mode transactions 1. Connect the BusPro-S to the host computer through a USB 2.0 port. 2. Connect the target system or device if any. (You can still go through with the example without any real target, but you will not be able to see any real data.) 3. Start the SPI Exerciser application. 4. Go to the 3-wire/Dual/Quad SPI Debugger Tab. 5. At the Tab 2-1 of the command script window, type in the following text, and execute it by clicking on the [Run] button. // write 2 bytes in 3-wire mode 3wiremode write AB CD // read 2 bytes in dual mode dualmode read 2 // write 4 bytes and read 2 bytes in 4-wire mode 4wiremode write 1A 2B 3C 4D read 2 // read 4 bytes in quad mode quadmode read 4 Getting Started 27

40 Figure 29. Editing and Running Command Script 6. Then you will see the Transaction Log showing all five transactions with various data line modes. Figure 30. Observing Transaction Log Entry Scenario 3: Loading and running command scripts 1. Connect the BusPro-S to the host computer through a USB 2.0 port. 28 Getting Started

41 2. Connect the target system or device if any. (You can still go through with the example without any real target, but you will not be able to see any real data.) 3. Start the SPI Exerciser application. 4. Select the [File Open ] menu item, and then open the C:\Corelis Examples\SPI Exerciser\Examples\Winbond_W25Q80BV.sep project file. 5. Go to the Debugger module by clicking on the Debugger icon on the shortcut bar. 6. Go to the Tab 2-1 of the 3-wire/Dual/Quad SPI tab. 7. Click on the [Step] button once, and then you will see an arrow on the line 1, indicating the current execution line. Figure 31. Stepping Command Script 8. Click on the [Step] button three more times, and then you will see the arrow moving down to the line 13. Getting Started 29

42 Figure 32. Stepping Command Script 9. Go to the Transaction Log, and then you will see the record of write 50 transaction displayed. Figure 33. Observing Transaction Log Entry 10. Now right-click on the line 17, and then select the [Run To Cursor] menu item. 30 Getting Started

43 Figure 34. Selecting Run To Cursor Menu Item 11. Then you will see the arrow moving down to the line 17. Getting Started 31

44 Figure 35. Running to Cursor 12. Go to the Transaction Log, and then you will see the records of the lines 13 and 15 executed. Figure 36. Observing Transaction Log Entry 32 Getting Started

45 Using Programmer The example scenario in this section will guide you through the basic features of the Programmer module step by step. Scenario 1: Programming, verifying, and updating SPI EEPROM 1. Prepare a SPI target board with an Atmel AT25640 EEPROM memory. 2. Connect the SCK, MOSI, and MISO signals from BusPro-S to the target board. Connect the CS (chipselect) signal of the device to the Slave Select line 6 (pin number 19) on the BusPro-S. 3. Launch the SPI Exerciser. 4. Go to the Program-Verify-Erase tab of the Programmer module by clicking on Programmer icon on the shortcut bar. 5. Set the [Data File] to C:\Corelis Examples\SPI Exerciser\Examples\Data Files\sequential1k.exo. 6. Set the [Manufacturer] to Atmel EEPROM. 7. Set the [Type] to AT25640 (8 Kbyte SPI EEPROM). 8. Set the [Slave Select] to Set the [Clock Rate] to 1 MHz. 10. Set the [Voltage] to 3.3 V. 11. Enable [Erase] and [Blank check] actions only 12. Click on the [Run] button to run the tasks. 13. Observe that both actions are passed. Figure 37. Erasing and Blank-checking Memory 14. Go to the Read tab and click on the [Refresh] button. 15. Observe that all values are shown as FF. Getting Started 33

46 Figure 38. Observing Memory Read Window 16. Click on a memory location (e.g. 0x42), then an edit box will appear. Figure 39. Editing Memory Content 17. Prepare a SPI target board with an Atmel AT25640 EEPROM memory. 34 Getting Started

47 Figure 40. Updating Memory Content 18. Observe that the memory location (e.g. 0x42) displays the entered value (AB). Figure 41. Observing Memory Read Window 19. Click on the [Refresh] button. 20. Observe that the memory location (e.g. 0x42) still displays the entered value (AB). 21. Go back to the Program-Verify-Erase tab. 22. Enable [Program] and [Verify] actions only 23. Click on the [Run] button to run the tasks. 24. Observe that both actions are passed. Getting Started 35

48 Figure 42. Programming and Verifying 25. Go to the Read tab and click on the [Refresh] button. 26. Observe that the sequential values (in two-byte unit) are shown as below. Figure 43. Observing Memory Read Window 27. Click on a memory location (e.g. 0x55), then an edit box will appear. 36 Getting Started

49 Figure 44. Editing Memory Content 28. Type in a hex value (e.g. CD) and press the [Enter] key. Figure 45. Updating Memory Content 29. Observe that the memory location (e.g. 0x55) displays the entered value (CD). Getting Started 37

50 Figure 46. Observing Memory Read Window 30. Click on the [Refresh] button. 31. Observe that the memory location (e.g. 0x55) still displays the entered value (CD). 32. Go back to the Program-Verify-Erase tab. 33. Enable the [Verify] action only 34. Click on the [Run] button to run the tasks. Figure 47. Verifying Memory 35. Observe that the verification fails, and the Programmer Diagnostics window displays a detailed diagnostics message as shown below. 38 Getting Started

51 Figure 48. Observing Programmer Diagnostics Getting Started 39

52 BusPro-S controller pin assignments and descriptions Connecting the SPI Signals Chapter 4 Connecting to a Target Figure 49 and Table 2 describe the pin assignments and descriptions of the BusPro-S controller Figure 49. BusPro-S Connector Pin Numbers Pin Number 4-Wire Signal 3-Wire Signal Dual Signal Quad Signal Direction 1 SCK SCK SCK SCK Controller Output 2 GND GND GND GND GND 3 MOSI IO0 IO0 IO0 Bidirectional 4 GND GND GND GND GND 5 MISO NC IO1 IO1 Bidirectional 6 GND GND GND GND GND 7 NC NC NC IO2 Bidirectional 8 GND GND GND GND GND 9 NC NC NC IO3 Bidirectional 10 GND GND GND GND GND 11 Enable* Enable Enable Enable Controller Output 12 GND GND GND GND GND 13 SS0 SS0 SS0 SS0 Controller Output 14 SS1 SS1 SS1 SS1 Controller Output 15 SS2 SS2 SS2 SS2 Controller Output 16 SS3 SS3 SS3 SS3 Controller Output 17 SS4 SS4 SS4 SS4 Controller Output 18 SS5 SS5 SS5 SS5 Controller Output 19 SS6 SS6 SS6 SS6 Controller Output 20 SS7 SS7 SS7 SS7 Controller Output Table 2. BusPro-S Pin Descriptions * Enable (active high) indicates when the controller is actively driving the bus signals. 40 Connecting to a Target

53 Debugger module overview and component descriptions Overview Chapter 5 Interactive Debugger The Debugger module provides a direct read/write interactive interface with the target SPI bus through the use of command scripts. It can be used to perform simple data transfers both to and from slave devices acting as the master device on the bus. Typical applications include: Generating SPI bus traffic and confirming basic bus operation and integrity Establishing the presence and behavior of a master device Poking data to (or initializing) slave devices Peeking the contents of slave devices Interactively checking SPI devices under various SPI modes and clock rates and assessing bus conformance while observing signals with external instrumentation The Debugger module can be accessed by clicking on the Debugger icon in the shortcut bar. It consists of the Command Script interface tabs and the Transaction Log window. The Debugger main screen is shown in Figure 50. Interactive Debugger 41

54 Figure 50. Debugger Window 42 Interactive Debugger

55 Command Script Interfaces The Debugger module features two separate tabs for providing access to the Standard and Enhanced SPI type interfaces of the BusPro-S controller. Each interface has its own command script interface, which includes multiple tabs for maintaining multiple command sessions. The command script interface takes command keywords and data values from users and executes them in a sequential manner. The GUI components such as the menu items and the toolbar buttons provide various execution methods including running, pausing, stepping, breaking, aborting, looping, and running to cursor. Standard SPI Tab The Standard SPI tab offers the options to operate in various SPI modes (0, 1, 2, and 3). In this interface, however, only the standard (4-wire) data line mode is supported. The maximum clock rate supported in this interface is 30 MHz. Enhanced (3-wire/Dual/Quad) SPI Tab The Enhanced SPI tab offers the options to operate in various data line modes such as 3-wire, dual, and quad modes as well as the standard (4-wire) mode. However, it supports only the SPI mode 0. The maximum clock rate supported in this interface is 60 MHz. GUI Components The GUI components of the Debugger s Command Script interfaces are shown in Figure 51, and Table 3 describes their functions. Figure 51. Debugger Command Script Window Interactive Debugger 43

56 Component Command Script edit window Bit Order drop-down list SS Polarity drop-down list Clock Rate drop-down list Description Specifies the command keywords and data bytes to be executed. The texts following double slashes // are considered as comments and are ignored during the execution. The keywords are shown in blue, and the comments are shown in green. The multiple sub-tabs are provided for convenience so that users can to go back and forth between multiple scripts while peeking and poking slave devices. Specifies the order of the bits shifted out and in. With MSB First option, the MSB bit of the first byte specified in the command script is shifted out. With LSB First option, the LSB of the last byte specified in the command script is shifted out. Specifies a polarity of the slave select lines. If Active Low (OC) is selected, the slave select lines are pulled high during idle times, and driven low when active. If Active Low is selected, the slave select lines are driven high during idle times, and driven low when active. If Active High is selected, the slave select lines are driven low during idle times, and driven high when active. Specifies the operating clock rate. Voltage drop-down list Specifies the operating voltage. SPI Mode drop-down list Slave Select drop-down list Specifies the SPI mode, which is a combination of clock polarity and phase. There are four different modes, and only mode 0 is supported for Enhanced SPI interface. Specifies the slave select line to be asserted during read and write transactions. Loops combo box Specifies the number times to repeat the execution of the script. Step button Executes a single line of command, and then pauses. Run To button Run button Pause button Executes the script until the line with the cursor is reached, and then pauses. Executes the script until it completes. The execution can be interrupted by a breakpoint, pause, or abort actions. Pauses the current execution of the script. Stop button Aborts the current execution of the script. 44 Interactive Debugger

57 Component Breakpoint marker Description Indicates a breakpoint. When the line with a breakpoint is reached during an execution of a script, it pauses the execution. (A breakpoint can be set on a line either by pressing the [F9] key or by selecting the Toggle Breakpoint menu item on the right-click pop-up menu.) Table 3. Command Script Interface Component Descriptions Interactive Debugger 45

58 Debugger Transaction Log The Transaction Log records and displays all activities performed by the BusPro-S through the Debugger commands. Using the information provided in the log, users can efficiently track, test, debug, and validate their targets under development. The log can be continuously gathered and backed up during each session and can be exported to files. An example of the Transaction Log window is shown in Figure 52, and the description of each column is in Table 4. Figure 52. Debugger Transaction Log Window Column Tx# R/W Bytes Data Out Data In Timestamp Data Line Mode SS Mode Tab Line Shows the transaction number. Description Indicates whether the transaction is write, read, or writeread. Indicates the number of bytes and bits being transferred. The number of bits is shown as a fraction. (e.g. 1.3 bytes = 1 byte + 3 bites = 11 bits) Displays the data bytes being written to a slave device. Displays the data bytes being read from a slave device. Displays the time when the transaction is performed. Indicates the data line mode being used for the transaction. Indicates the ID of the slave select line being asserted. Shows the SPI mode of the transaction. Indicates which tab the transaction is being executed from. Indicates which line on the command script performed the transaction. Table 4. Transaction Log Window Column Descriptions The maximum number of transactions the log can display is one million. Once that number is reached, the old transactions are saved to a temporary file until they are exported to a CSV (Comma Separated Value) file using the Export feature. 46 Interactive Debugger

59 The Export feature can be accessed through the right-click pop-up menu as shown in Figure 53. The menu also allows users to select and copy a transaction to the clipboard as a comma-separated text and clear the log s content. Figure 53. Debugger Transaction Log Pop-up Menu Interactive Debugger 47

60 Other Features Saving and Loading Debugger Options and Scripts All options and command scripts used in a Debugger session can be preserved by saving them to a SPI Exerciser Project file (*.sep). The project file can be opened at a later time to continue with the previous debugging session seamlessly. To save the current session to a project file, select the [File Save] or [File Save As ] menu item, or click on the Save ( ) toolbar button. To load a previously saved session from a project file, select the [File Open ] menu item, or click on the Open ( ) toolbar button. To start a new project with blank scripts and default options, select the [File New] menu item, or click on the New ( ) toolbar button. Print A Debugger script can be printed by selecting the [File Print ] menu item or by clicking on the Print ( ) toolbar button. Pin Status Indicator The status bar of the SPI Exerciser s main window displays the current states of the data and slave select pins. The value 0 indicates that the pin is in low state, and the value 1 indicates it is in high state. While a script is running, the states are unknown and indicated as a bar, -. Figure 54 shows the Status Indicator. Figure 54. Pin Status Indicator 48 Interactive Debugger

61 Debugger Command Script Keywords The Debugger script keywords are listed in Table 5. Debugger commands are not case-sensitive and are always immediately followed by their parameters. While multiple data bytes can be listed together on a single or multiple lines, each command (along with its associated parameters) must be placed on its own separate line although a trailing comment is allowed on the same line. The detailed descriptions of the keywords are followed by the summary table. Keyword 3wiremode 3m 4wiremode 4m dualmode dm gpio io nop pause qexec qe qstart qs quadmode qm read rd readbit rdb ss ssoff sson write wt writebit wtb writeread wtrd Description Changes the current data line mode to 3-wire mode. (This command is supported for Enhanced SPI interface only) Changes the current data line mode to 4-wire mode. Changes the current data line mode to dual mode. (This command is supported for Enhanced SPI interface only) Sets the output enables and levels of individual slave select lines. (This command cannot be queued when operating with Standard SPI interface) Inserts no-op commands into the command queue, which will add a 3-clock delay each. (This command is supported for Enhanced SPI interface only) Pauses the execution of command script for a specified duration. Executes queued commands. Marks a start of queued command group. Changes the current data line mode to quad mode. (This command is supported for Enhanced SPI interface only) Reads a specified number of bytes from a slave device. Reads a specified number of bits of data from a slave device. (This command is not supported for dual and quad data line modes) Sets the ID of the slave select line to be used on subsequent read/write transactions. Releases the slave select line asserted by a prior sson command. Asserts a slave select line according to the current slave select ID and the polarity. Writes a specified sequence of bytes to a slave device. Writes a specified number of bits of data to a slave device. (This command is not supported for dual and quad data line modes) Writes a specified sequence of bytes to a slave device while reading back the same number of bytes from it. Interactive Debugger 49

62 Keyword writereadbit wtrdb Description Writes a specified number of bits of data to a slave device while reading back the same number of bits. (This command is not supported for 3-wire, dual, and quad data line modes) Table 5. Debugger Command Script Keywords 50 Interactive Debugger

63 3wiremode / 3m Description: Changes the current data line mode to 3-wire mode. In 3-wire mode, only one data line is used in halfduplex mode. Table 6 shows the various data line modes and their signal configurations. (NOTE: This command is supported for Enhanced SPI Type only.) Pin number 4-wire mode 3-wire mode Dual mode Quad mode 3 MOSI (unidirectional) IO0 (bidirectional) IO0 (bidirectional) IO0 (bidirectional) 5 MISO (unidirectional) not used IO1 (bidirectional) IO1 (bidirectional) 7 not used not used not used IO2 (bidirectional) 9 not used not used not used IO3 (bidirectional) Table 6. Signal Mappings in Data Line Modes (NOTE: Only 4-wire mode is supported when operating with Standard SPI Type interface.) Format: 3wiremode 3m Parameters: Example: // change to 3-wire mode and read 2 bytes 3wiremode read 2 // change to 4-wire mode and read 2 bytes 4wiremode read 2 // change to dual mode and read 2 bytes dualmode read 2 // change back to 3-wire mode and read 2 bytes 3m read 2 Interactive Debugger 51

64 4wiremode / 4m Description: Changes the current data line mode to 4-wire mode, which is the most commonly used mode. In 4-wire mode, two data lines are used in full-duplex mode. Table 7 shows the various data line modes and their signal configurations. Pin number 4-wire mode 3-wire mode Dual mode Quad mode 3 MOSI (unidirectional) IO0 (bidirectional) IO0 (bidirectional) IO0 (bidirectional) 5 MISO (unidirectional) not used IO1 (bidirectional) IO1 (bidirectional) 7 not used not used not used IO2 (bidirectional) 9 not used not used not used IO3 (bidirectional) Table 7. Signal Mappings in Data Line Modes (NOTE: Only 4-wire mode is supported when operating with Standard SPI Type interface.) Format: 4wiremode 4m Parameters: Example: // change to 4-wire mode and read 2 bytes 4wiremode read 2 // change to 3-wire mode and read 2 bytes 3wiremode read 2 // change to dual mode and read 2 bytes dualmode read 2 // change back to 4-wire mode and read 2 bytes 4m read 2 52 Interactive Debugger

65 dualmode / dm Description: Changes the current data line mode to dual mode. In dual mode, two data lines are used in half-duplex mode. Table 8 shows the various data line modes and their signal configurations. (NOTE: This command is supported for Enhanced SPI Type only.) Pin number 4-wire mode 3-wire mode Dual mode Quad mode 3 MOSI (unidirectional) IO0 (bidirectional) IO0 (bidirectional) IO0 (bidirectional) 5 MISO (unidirectional) not used IO1 (bidirectional) IO1 (bidirectional) 7 not used not used not used IO2 (bidirectional) 9 not used not used not used IO3 (bidirectional) Table 8. Signal Mappings in Data Line Modes (NOTE: Only 4-wire mode is supported when operating with Standard SPI Type interface.) Format: dualmode dm Parameters: Example: // change to dual mode and read 2 bytes dualmode read 2 // change to 3-wire mode and read 2 bytes 3wiremode read 2 // change to 4-wire mode and read 2 bytes 4wiremode read 2 // change back to dual mode and read 2 bytes dm read 2 Interactive Debugger 53

66 gpio / io Description: Sets the output enables and levels of individual slave select lines. This command provides a method for utilizing the slave select line as GPIO lines. (NOTE: This command cannot be queued when operating in Standard SPI Type interface.) Format: gpio value output_enable io value output_enable Parameters: value The 8-bit value representing the output levels of Slave Select (SS) lines. The MSB represents the level for SS7, and the LSB for SS0. The value 1 represents high, and the 0 represents low. The lines are driven to their specified levels only when the corresponding bits in the output_enable value are also set. output_enable The 8-bit value representing the output-enable settings of Slave Select (SS) lines. The MSB represents the setting for SS7, and the LSB for SS0. The value 1 makes the output to be enabled, and the 0 to be disabled. The lines are driven to the levels specified by the value parameter only when the corresponding bits in this parameter are also set. Example: // drive Slave Select lines 6, 4, 2, and 0 high // and 7, 5, 3, and 1 low gpio 55 FF // drive Slave Select lines 6, 4, 2, and 0 high // and 7, 5, 3, and 1 low io 30 F0 54 Interactive Debugger

67 nop Description: Inserts no-op commands into the command queue, which will add a 3-clock delay each. (NOTE: This command is supported for Enhanced SPI Type only.) Format: nop [count] Parameters: value [optional] The number of no-op commands to be inserted into the transaction queue. If not specified, only one noop command will be inserted. Example: // // read 8 bytes of data in dual mode from W25Q Flash memory address 0x100 // qstart // start of queue sson // assert CS 4wiremode // write command in 4wiremode write bb // Fast Read Dual I/O Instruction nop // insert extra 3-clock cycle delay between two writes dualmode // switch to dual mode write // write address A23-16, A15-8, A7-0, M7-0 nop 5 // insert extra 15-clock cycle delay between write and read read 8 // 8 read bytes ssoff // release CS qexec // end of queue: execute the commands Interactive Debugger 55

68 pause Description: Pauses the execution of command script for a specified duration. (NOTE: This command is ineffective if added to a command queue to insert a delay between commands. Use nop command instead.) Format: pause milliseconds Parameters: milliseconds The number of milliseconds to pause the execution of commands. Example: read 2 pause 1000 write AB 12 pause 500 read 2 // read 2 bytes // pause 1 second // write 2 bytes // pause a half second // read 2 bytes 56 Interactive Debugger

69 qexec / qe Description: Executes queued commands. The Debugger Command Script supports queued command mode, which allows multiple commands to be added to a queue and executed at once without any delay between them. This commands executes all queued commands following the prior qstart command. (In a normal non-queued mode, the host computer s USB communications and computational delays will create undefined time gaps between command executions.) Format: qexec qe Parameters: Example: // // read 8 bytes of data in dual mode from W25Q Flash memory address 0x100 // qstart // start of queue sson // assert CS 4wiremode // write command in 4wiremode write bb // Fast Read Dual I/O Instruction dualmode // switch to dual mode write // write address A23-16, A15-8, A7-0, M7-0 read 8 // 8 read bytes ssoff // release CS qexec // end of queue: execute the commands Interactive Debugger 57

70 qstart / qs Description: Marks a start of queued command group. The Debugger Command Script supports queued command mode, which allows multiple commands to be added to a queue and executed at once without any delay between them. The subsequent qexec command executes all queued commands following this command. (In a normal non-queued mode, the host computer s USB communications and computational delays will create undefined time gaps between command executions.) Format: qstart qs Parameters: Example: // // read 8 bytes of data in dual mode from W25Q Flash memory address 0x100 // qstart // start of queue sson // assert CS 4wiremode // write command in 4wiremode write bb // Fast Read Dual I/O Instruction dualmode // switch to dual mode write // write address A23-16, A15-8, A7-0, M7-0 read 8 // 8 read bytes ssoff // release CS qexec // end of queue: execute the commands 58 Interactive Debugger

71 quadmode / qm Description: Changes the current data line mode to quad mode. In quad mode, four data lines are used in half-duplex mode. Table 9 shows the various data line modes and their signal configurations. (NOTE: This command is supported for Enhanced SPI Type only.) Pin number 4-wire mode 3-wire mode Dual mode Quad mode 3 MOSI (unidirectional) IO0 (bidirectional) IO0 (bidirectional) IO0 (bidirectional) 5 MISO (unidirectional) not used IO1 (bidirectional) IO1 (bidirectional) 7 not used not used not used IO2 (bidirectional) 9 not used not used not used IO3 (bidirectional) Table 9. Signal Mappings in Data Line Modes (NOTE: Only 4-wire mode is supported when operating with Standard SPI Type interface.) Format: quadmode qm Parameters: Example: // change to quad mode and read 2 bytes quadmode read 2 // change to 3-wire mode and read 2 bytes 3wiremode read 2 // change to 4-wire mode and read 2 bytes 4wiremode read 2 // change back to quad mode and read 2 bytes qm read 2 Interactive Debugger 59

72 read / rd Description: Reads a specified number of bytes from a slave device. The data read can be retrieved from the Transaction Log window. Format: read byte_count rd byte_count Parameters: byte_count The number of bytes to be read in hex string format. Example: // read 256 bytes (hex: 0x100) read 100 // read 31 bytes (hex: 0x1F) rd 1F 60 Interactive Debugger

73 readbit / rdb Description: Reads a specified number of bits of data from a slave device. The data read can be retrieved from the Transaction Log window. (NOTE: This command is not supported for dual and quad data line modes.) Format: readbit bit_count rdb bit_count Parameters: bit_count The number of bits to be read in hex string format. Example: // read 256 bits (hex: 0x100) of data read 100 // read 255 bits (hex: 0xFF) of data rd FF Interactive Debugger 61

74 ss Description: Sets the ID of the slave select line to be used on subsequent read/write transactions. This command overrides the slave select ID chosen on the Debugger GUI. If this command is not given, the value chosen on the GUI is used. Format: ss slave_select_id Parameters: slave_select_id The ID of slave select line to be asserted. The valid ID s are 0 through 7. Example: // read 2 bytes from slave 0 ss 0 read 2 // read 2 bytes from slave 1 ss 1 read 2 // read 2 bytes from slave 4 ss 4 read 2 // read 2 bytes from slave 7 ss 7 read 2 62 Interactive Debugger

75 ssoff Description: Releases the slave select line asserted by a prior sson command. Format: ssoff Parameters: Example: // // read 8 bytes of data in dual mode from W25Q Flash memory address 0x100 // qstart // start of queue sson // assert CS 4wiremode // write command in 4wiremode write bb // Fast Read Dual I/O Instruction dualmode // switch to dual mode write // write address A23-16, A15-8, A7-0, M7-0 read 8 // 8 read bytes ssoff // release CS qexec // end of queue: execute the commands Interactive Debugger 63

76 sson Description: Asserts a slave select line according to the current slave select ID and the polarity. This command overrides the assertions and de-assertions performed at the beginning and end of read/write transactions. In other words, when this command is given, the slave select line stays asserted until the ssoff command is given or the script is ended. Format: sson Parameters: Example: // // read 8 bytes of data in dual mode from W25Q Flash memory address 0x100 // qstart // start of queue sson // assert CS 4wiremode // write command in 4wiremode write bb // Fast Read Dual I/O Instruction dualmode // switch to dual mode write // write address A23-16, A15-8, A7-0, M7-0 read 8 // 8 read bytes ssoff // release CS qexec // end of queue: execute the commands 64 Interactive Debugger

77 write / wt Description: Writes a specified sequence of bytes to a slave device. Format: write byte wt byte Parameters: byte One or more bytes to be written in hex string format. Example: // writes four byte 0xAB, 0xCD, 0x12, and 0x34 write AB CD // writes a byte 0xFE wt 0xFE Interactive Debugger 65

78 writebit / wtb Description: Writes a specified number of bits of data to a slave device. (NOTE: This command is not supported for dual and quad data line modes.) Format: writebit bit_count byte wtb bit_count byte Parameters: bit_count The number of bits to be written in hex string format. byte The bits to be written, grouped in bytes in hex string format. Depending on the current Bit Order setting, MSB or LSB of bits within the specified byte sequence will be written. Example: // in MSB First bit order (shift out MSB first) // writes 15 bits of data, <= (binary) to a slave writebit F AC 36 writebit F AC 37 // this has the same outcome since the LSB is ignored // in LSB First bit order (shift out LSB first) // writes 15 bits of data, => (binary) to a slave wtb F 56 1B wtb F D6 1B // this has the same outcome since the MSB is ignored 66 Interactive Debugger

79 writeread / wtrd Description: Writes a specified sequence of bytes to a slave device while reading back the same number of bytes from it. The data read can be retrieved from the Transaction Log window. (NOTE: This command is not supported for 3-wire, dual, and quad data line modes.) Format: writeread byte wtrd byte Parameters: byte One or more bytes to be written in hex string format. Example: // writes four byte 0xAB, 0xCD, 0x12, and 0x34, // and reads back four bytes at the same time writeread AB CD // writes a byte 0xFE, and reads back a byte wtrd 0xFE Interactive Debugger 67

80 writereadbit / wtrdb Description: Writes a specified number of bits of data to a slave device while reading back the same number of bits from it. The data read can be retrieved from the Transaction Log window. (NOTE: This command is not supported for 3-wire, dual, and quad data line modes.) Format: writereadbit bit_count byte wtrdb bit_count byte Parameters: bit_count The number of bits to be written in hex string format. byte The bits to be written, grouped in bytes in hex string format. Depending on the current Bit Order setting, MSB or LSB of bits within the specified byte sequence will be written. Example: // in MSB First bit order (shift out MSB first) // writes 15 bits of data, <= (binary) to a slave and // reads back 15 bits from it. writereadbit F AC 36 writereadbit F AC 37 // this has the same outcome since the LSB is ignored // in LSB First bit order (shift out LSB first) // writes 15 bits of data, => (binary) to a slave and // reads back 15 bits from it. wtrdb F 56 1B wtrdb F D6 1B // this has the same outcome since the MSB is ignored 68 Interactive Debugger

81 Chapter 6 EEPROM and Flash Memory Programmer Programmer module overview and component descriptions Overview The Programmer module provides an interface specifically tailored for convenient interaction with standard SPI EEPROM and Flash memory devices on the target SPI bus. It enables users to erase and program most common SPI EEPROM or Flash memory devices. It further supports comparing current contents against the source data file. The device content read can also be viewed and saved to a file. Standard data file formats supported include: EXO / S HEX / MCS BIN In addition, a simple user-friendly text file format can specify the memory content. EEPROM and Flash Memory Programmer 69

82 Programmer Features The Programmer module can be accessed by clicking on the Programmer icon in the shortcut bar. It consists of two tabs, Program-Verify-Erase and Read, and the Programmer Diagnostics window. Program-Verify-Erase Tab The Program-Verify-Erase tab allows users to erase, blank-check, program, and verify the specified EEPROM or Flash memory device with the contents of the user specified data file. The user selects the target device type from a pull-down list of known manufacturers and types. Then the available data line modes are preloaded for a selection. In addition to selecting a source data file, the user can enter an additive/subtractive adjustment to the internal device offset declared in the file. The following actions can be performed in this tab: Program load the EEPROM or Flash memory with the contents of the referenced data file. Verify compare the EEPROM or Flash memory with the referenced file and indicate a pass/fail outcome. Erase clear the content of the EEPROM or Flash memory Blank Check checks whether the Flash memory is properly erased The Program-Verify-Erase tab windows in different states are shown in Figure 55 and Figure 56. Table 10 describes the components in the tab window. Figure 55. Program-Verify-Erase Tab in Ready State 70 EEPROM and Flash Memory Programmer

83 Figure 56. Program-Verify-Erase Tab in Running State EEPROM and Flash Memory Programmer 71

84 Component Data File edit box and Browse button Description Specifies the file containing the data to be programmed. Use the browse button to locate the data file. Manufacturer drop-down list Type drop-down list Data Line Mode dropdown list Slave Select drop-down list Address Offset dropdown list and edit box Clock Rate drop-down list Voltage drop-down list Action list Status indicator and Progress bar Run button Specifies the manufacturer of the SPI EEPROM or Flash memory device to be programmed. Specifies the type of the SPI EEPROM or Flash device to program. Various selections are available for supported devices from each of the manufactures in the Manufacturer drop-down list. Specifies the data line mode to be used for accessing the device. This drop-down list is populated with all supported data line modes for the selected device type. Specifies a slave select line to be asserted for accessing the device. Specifies an offset for the programming. The drop-down list allows for selection of whether to Add or Subtract the offset value which is entered into the edit box on the right. The offset value must be entered in hexadecimal format. Specifies the clock rate to be used for accessing the device. Specifies the voltage to be used for accessing the device. Specifies which actions to perform. Checking on the check box enables the specified action. Indicates the current status of actions. The progress bar shows the percent complete information while performing an action. Starts and stops the selected actions. The button turns into an Abort button when any action is being performed. Table 10. Program-Verify-Erase Tab Component Descriptions Read Tab The Read tab allows users to view the content of the EEPROM or Flash memory device. It also provides a capability to save the memory content to a file. When the actual content is different from the specified data file, the memory location with mismatched values are highlighted, and the expected value is displayed when hover the cursor over it. For EEPROM devices, the memory contents can be updated directly by clicking on a cell in the memory display, typing a new value, and pressing the [Enter] key. The memory display list also supports scrolling and page-hopping through the data. Examples of Read tab windows are shown in Figure 57 and Figure 58, and Table 11 describes the components of the tab window. 72 EEPROM and Flash Memory Programmer

85 Figure 57. Read Tab Figure 58. Read Tab with Mismatched Memory Content EEPROM and Flash Memory Programmer 73

86 Component Memory Content display list Address edit box Jump to Beginning button Page Up button Page Down button Jump to End button Refresh button Dump button Description Displays the memory content of the device being accessed. Changes the starting address of the memory display to a specified address. Entering a new address in hexadecimal and pressing the [Enter] key changes the starting address of the memory display. Moves the memory display window to the beginning. Moves up the memory display window by one page. Moves down the memory display window by one page. Moves the memory display window to the end. Refreshes the memory display window by reading the current memory content. Dumps the current content of the memory device to a file. Table 11. Read Tab Component Descriptions Programmer Diagnostics Window The Programmer Diagnostics window displays a summary of the actions performed by the Programmer. It displays the result of the actions including erase, blank-check, program, and verify, and displays the total time it took. When an action fails, it displays more detailed information on why the action failed along with the comparison of expected and actual results as shown in Figure 60. Figure 59. Programmer Diagnostics Window 74 EEPROM and Flash Memory Programmer

87 Figure 60. Programmer Diagnostics Window Displaying Information on Error Saving and Loading Programmer Session All options used in a Programmer session can be preserved by saving them to a SPI Exerciser Project file (*.sep). The project file can be opened at a later time to continue with the previous session seamlessly. To save the current session to a project file, select the [File Save] or [File Save As ] menu item, or click on the Save ( ) toolbar button. To load a previously saved session from a project file, select the [File Open ] menu item, or click on the Open ( ) toolbar button. To start a new project with blank scripts and default options, select the [File New] menu item, or click on the New ( ) toolbar button. Pin Status Indicator The status bar of the SPI Exerciser s main window displays the current states of the data and slave select pins. The value 0 indicates that the pin is in low state, and the value 1 indicates it is in high state. While a script is running, the states are unknown and indicated as a bar, -. Figure 54 shows the Status Indicator. Figure 61. Pin Status Indicator EEPROM and Flash Memory Programmer 75

88

89 Chapter 7 Third Party Application Interface Description of using the BusPro-S with third party software Overview The BusPro-S provides the ability to operate most of its features by using function calls from third party software. In this manner, such applications can access the connected SPI bus of the target, including interacting with it and performing EEPROM or Flash memory programming. This effectively provides such software with a portal to the connected SPI bus. More generally, any application which can call DLL routines can invoke the library routines described in this chapter and gain control and visibility of the BusPro-S resources and the connected SPI bus. Third Party Application Interface 77

90 Dynamic Link Library (DLL) The Dynamic Link Library is comprised of a set of routines which can be invoked in a standard fashion by a user s program. Table 12 lists the primary files necessary for using the DLL. Component BusPro_S.DLL BusPro_S.LIB BusPro_S.H Description The encapsulated library of SPI routines The import library C include file containing the required DLL function prototypes Table 12. DLL Components These files are provided in the SPI Exerciser installation folder. Additionally, all of the *.BIN and *.DLL files from the SPI Exerciser installation folder are required in order to support the BusPro_S.DLL functions. As a design reference example of the usage of these DLL functions, sample programs with source code are also provided in the C:\Corelis Examples\SPI Exerciser\BusPro_S API folder. Table 13 lists and describes the functions provided by the BusPro-S DLL. The following pages give more detailed information about each function. 78 Third Party Application Interface

91 General Calling Sequence The BusPro-S initialization function, bps_init_adapter() must be called prior to any other API functions are called. It is also recommended to call the hardware configuration functions following the initialization function, even though the default settings may work as is. Below is an example code in C/C++ programming language. ////////////////////////////////////////////////////// // init controller // printf("\ninitializing BusPro-S controller..."); // initialize adapter nret = bps_init_adapter(); // set SPI type to Enhanced (3-wire/Dual/Quad) type nret = bps_set_spi_type(spi_type_enhanced); // set voltage to 3.3 V nret = bps_set_voltage(3300); // set frequency to 10 MHz. nret = bps_set_frequency( ); // set Slave Select Polarity to Active Low (Open-Collector) nret = bps_set_ss_polarity(ss_polarity_active_low_oc); Third Party Application Interface 79

92 // set SPI mode to 0 (only supported mode in Enhanced SPI type) nret = bps_set_spi_mode(0); // set Slave Select to 6 nret = bps_set_ss(6); Sleep(500); ////////////////////////////////////////////////////// // peek-and-poke registers // printf("\nreading values SR1 and SR2 registers..."); // set the data line mode to normal (4-wire) mode. nret = bps_set_data_line_mode(data_line_mode_4wire); // send "Write Enable Status Register" command, 50h pucdataout[0] = 0x50; nret = bps_spi_write(pucdataout, 1*8); // send command to set the "Quad-Enable(QE)" bit on SR2 pucdataout[0] = 0x01; pucdataout[1] = 0x00; pucdataout[2] = 0x02; nret = bps_spi_write(pucdataout, 3*8); 80 Third Party Application Interface

93 // read Status Register SR1 pucdataout[0] = 0x05; pucdataout[1] = 0xff; nret = bps_spi_write_read(pucdataout, pucdatain, 2*8); printf("\ndata read from SR1: %02X ", pucdatain[1]); // read Status Register SR2 pucdataout[0] = 0x35; pucdataout[1] = 0xff; nret = bps_spi_write_read(pucdataout, pucdatain, 2*8); printf("\ndata read from SR2: %02X ", pucdatain[1]); Third Party Application Interface 81

94 Function Reference Function bps_assert_ss bps_assert_ss_q Description Asserts a slave select line specified by a prior bps_set_ss() function call. Queues an assertion action of a slave select line specified by a prior bps_set_ss() function call. bps_deassert_ss De-asserts the slave select line asserted by a prior bps_assert_ss() function call. bps_deassert_ss_q bps_execute_queue bps_get_adapter_serial_number bps_get_adapter_engine_version bps_get_data_line_mode bps_get_signal_levels bps_init_adapter bps_nop_q bps_ping bps_set_bit_order bps_set_data_line_mode bps_set_frequency bps_set_gpio bps_set_gpio_q bps_set_spi_mode bps_set_spi_type bps_set_ss bps_set_ss_polarity Queues a de-assertion action of a slave select line asserted by a prior bps_assert_ss_q() function call. Executes all previously queued transactions at once and returns all read data in a single data buffer. Returns an alphanumeric serial number of the BusPro-S controller being connected. Returns the version number of the hardware engine loaded on the BusPro-S controller being connected. Returns the current data line mode being used. Returns the current levels of the data and slave select signals. Initializes the BusPro-S controller. Inserts no-op commands into the transaction queue, which will add a 3-clock delay each. (for Enhanced SPI Type only) Checks whether the BusPro-S is connected and functional. Sets the order of bits to be written and read from and to the slave devices. Sets the mode of operation for data lines. (Only 4-wire mode is supported for Standard SPI Type) Sets the operating clock rate to a specified value. Sets the output enables and levels of individual Slave Select lines. Adds a command for setting the output enables and levels of GPIO to the transaction queue. Sets the SPI mode, which is a combination of clock polarity and phase. (Only mode 0 is supported for Enhanced SPI Type) Sets the current SPI interface type to a new type. Specifies a slave select line to be asserted during subsequent write and read transactions. Specifies a polarity of the slave select lines. 82 Third Party Application Interface

95 Function bps_set_voltage bps_spi_read bps_spi_read_q bps_spi_write bps_spi_write_q bps_spi_write_read bps_spi_write_read_q Description Sets the operating voltage to a specified value. Reads specified number of data bits from a slave device. Queues a read transaction with a specified number of data bits to be read from a slave device. Writes out specified number of data bits to a slave device. Queues a write transaction with a specified number of data bits to be written to a slave device. Writes out specified number of data bits to a slave device while reading back the same number of bits from it. Queues a write-and-read transaction with a specified number of data bits to be transferred to and from a slave device. Table 13. BusPro-S DLL Functions Third Party Application Interface 83

96 bps_assert_ss() Description: Asserts a slave select line specified by a prior bps_set_ss() function call. The line will be kept asserted until a subsequent bps_deassert_ss() function call is made. The effect of the assertion made by this function overrides assertion/de-assertion pairs that are built into individual write and read transactions. Therefore, the bps_assert_ss() and bps_deassert_ss() function calls in pair can be used to group a sequence of multiple write and read transactions together within a single slave select event. Prototype: int bps_assert_ss(); Parameters: Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // set Slave Select to 2 nret = bps_set_ss(2); // assert Slave Select line nret = bps_assert_ss(); // asserts slave select line 2, and keep it // asserted until bsp_deassert_ss() is called // send command for "memory read" at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write(pucdataout, 4*8); 84 Third Party Application Interface

97 // read 8 bytes nret = bps_spi_read(pucdatain, 8*8); // de-assert Slave Select line nret = bps_deassert_ss (); // de-asserts slave select line 2 Third Party Application Interface 85

98 bps_assert_ss_q() Description: Queues an assertion action of a slave select line specified by a prior bps_set_ss() function call. This function provides the same effect as the bps_assert_ss() function but is to be used in queued transaction mode. Prototype: int bps_assert_ss_q(); Parameters: Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // set Slave Select to 2 nret = bps_set_ss(2); // queue asserting Slave Select line nret = bps_assert_ss_q(); // will assert slave select 2 during // execution of queued transactions // queue writing of "memory read" command at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); 86 Third Party Application Interface

99 // queue reading of 8 bytes nret = bps_spi_read_q(8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // will de-assert slave select 2 during // execution of queued transactions // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); Third Party Application Interface 87

100 bps_deassert_ss() Description: De-asserts the slave select line asserted by a prior bps_assert_ss() function call. The bps_assert_ss() and bps_deassert_ss() function calls in pair can be used to group a sequence of multiple write and read transactions together within a single slave select event. Prototype: int bps_deassert_ss(); Parameters: Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // set Slave Select to 2 nret = bps_set_ss(2); // assert Slave Select line nret = bps_assert_ss(); // asserts slave select line 2, and keep it // asserted until bsp_deassert_ss() is called // send command for "memory read" at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write(pucdataout, 4*8); // read 8 bytes nret = bps_spi_read(pucdatain, 8*8); 88 Third Party Application Interface

101 // de-assert Slave Select line nret = bps_deassert_ss (); // de-asserts slave select line 2 Third Party Application Interface 89

102 bps_deassert_ss_q() Description: Queues a de-assertion action of a slave select line asserted by a prior bps_assert_ss_q() function call. This function provides the same effect as the bps_deassert_ss() function but is to be used in queued transaction mode. Prototype: int bps_deassert_ss_q(); Parameters: Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // set Slave Select to 2 nret = bps_set_ss(2); // queue asserting Slave Select line nret = bps_assert_ss_q(); // will assert slave select 2 during // execution of queued transactions // queue writing of "memory read" command at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); 90 Third Party Application Interface

103 // queue reading of 8 bytes nret = bps_spi_read_q(8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // will de-assert slave select 2 during // execution of queued transactions // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); Third Party Application Interface 91

104 bps_execute_queue() Description: Executes all previously queued transactions at once and returns all read data in a single data buffer. By queuing and executing write and read transactions together in a back-to-back sequence, the gaps between them can be reduced down to several clocks. This will help testing and validating slave devices under development by simulating a fast-acting master device on the bus. Prototype: int bps_execute_queue( unsigned char* ucbufferin ); Parameters: pucbufferin The pointer to a buffer to store the data bytes read. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // repeat 7 times with different slave select lines for (int i=0; i<7; i++) { // set Slave Select to i nret = bps_set_ss(i); // queue asserting Slave Select line nret = bps_assert_ss_q(); // will assert slave select 2 during // execution of queued transactions // queue writing of "memory read" command at address 0x Third Party Application Interface

105 pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); // queue reading of 2 bytes nret = bps_spi_read_q(2*8); } // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // will de-assert slave select 2 during // execution of queued transactions // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 16 bytes in this // case with 2 bytes from each slave device)) nret = bps_execute_queue(pucdatain); for (int i=0; i<8; i++) { printf("\ndata read from slave#%d: %02X %02X", i, pucdatain[2*i], pucdatain[2*i+1]); } Third Party Application Interface 93

106 bps_get_adapter_serial_number() Description: Returns an alphanumeric serial number of the BusPro-S controller being connected. Prototype: int bps_get_adapter_serial_number( char* szserialnumber, int nmaxlen ); Parameters: szserialnumber The pointer to a string buffer where the serial number will be stored in. nmaxlen The size of the szserialnumber buffer in number of character bytes including a terminating NULL. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: char szserialnumber[32]; // get the serial number of the BusPro-S controller. // the function will return up to 31 characters. nret = bps_get_adapter_serial_number(szserialnumber, 32); // display the serial number printf("\nsn = %s", szserialnumber); 94 Third Party Application Interface

107 bps_get_adapter_engine_version() Description: Returns the version number of the hardware engine loaded on the BusPro-S controller being connected. Prototype: int bps_get_adapter_engine_version( int* pnengineversion ); Parameters: szserialnumber The pointer to an integer where the version number will be stored in. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: int nversionnumber; // get the engine s version number nret = bps_get_adapter_engine_version(&nversionnumber); // display the version number printf("\nengine Version = %d", nversionnumber); Third Party Application Interface 95

108 bps_get_data_line_mode() Description: Returns the current data line mode being used. See the description of bps_set_data_line_mode function for more details on configuring and using data line modes. Prototype: int bps_get_data_line_mode( int* pndatalinemode ); Parameters: pndatalinemode The pointer to an integer representing the current data line mode. Possible values are DATA_LINE_MODE_4WIRE (=0), DATA_LINE_MODE_3WIRE (=1), DATA_LINE_MODE_DUAL (=2), and DATA_LINE_MODE_QUAD (=3), for Enhanced SPI Type interface, and DATA_LINE_MODE_4WIRE (=0) for Standard SPI Type interface. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: int ndatalinemode; // get the current data line mode nret = bps_get_data_line_mode(&ndatalinemode); // display the data line mode printf("\ndata line mode = "); if (ndatalinemode == DATA_LINE_MODE_4WIRE) printf("4-wire"); else if(ndatalinemode == DATA_LINE_MODE_3WIRE) printf("3-wire"); else if(ndatalinemode == DATA_LINE_MODE_DUAL) printf("dual"); else if(ndatalinemode == DATA_LINE_MODE_QUAD) 96 Third Party Application Interface

109 printf("quad"); else printf("unknown"); Third Party Application Interface 97

110 bps_get_signal_levels() Description: Returns the current levels of the data and slave select signals. Prototype: int bps_get_signal_levels( unsigned short* pussignallevels ); Parameters: pussignallevels The pointer to a 16-bit word representing the current levels of data and slave select signals. Table 14 shows the mapping of each bit to a signal. Bit Signal n/a n/a n/a n/a IO3 IO2 IO1 IO0 SS7 SS6 SS5 SS4 SS3 SS2 SS1 SS0 Pin# n/a n/a n/a n/a Table 14. Bit to Signal Mapping Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned short ussignallevels; // get the current signal levels nret = bps_get_signal_levels(&ussignallevels); // display the signal levels printf("\nss0 = %d", (ussignallevels & 0x1)); printf("\nss1 = %d", ((ussignallevels >> 1) & 0x1)); printf("\nss2 = %d", ((ussignallevels >> 2) & 0x1)); printf("\nss3 = %d", ((ussignallevels >> 3) & 0x1)); printf("\nss4 = %d", ((ussignallevels >> 4) & 0x1)); printf("\nss5 = %d", ((ussignallevels >> 5) & 0x1)); printf("\nss6 = %d", ((ussignallevels >> 6) & 0x1)); printf("\nss7 = %d", ((ussignallevels >> 7) & 0x1)); 98 Third Party Application Interface

111 printf("\nio0 = %d", ((ussignallevels >> 8) & 0x1)); printf("\nio1 = %d", ((ussignallevels >> 9) & 0x1)); printf("\nio2 = %d", ((ussignallevels >> 10) & 0x1)); printf("\nio3 = %d", ((ussignallevels >> 11) & 0x1)); Third Party Application Interface 99

112 bps_init_adapter() Description: Initializes the BusPro-S controller. This function must be called prior to any other API functions are called. Prototype: int bps_init_adapter(); Parameters: Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // initialize adapter nret = bps_init_adapter(); // set SPI type to Enhanced (3-wire/Dual/Quad) type nret = bps_set_spi_type(spi_type_enhanced); // set voltage to 3.3 V nret = bps_set_voltage(3300); // set frequency to 10 MHz. nret = bps_set_frequency( ); 100 Third Party Application Interface

113 bps_nop_q() Description: Inserts no-op commands into the transaction queue, which will add a 3-clock delay each. (NOTE: This function is operational only when using Enhanced SPI Type interface.) Prototype: int bps_nop_q( int ncount ); Parameters: ncount The number of no-op commands to be inserted into the transaction queue. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // queue asserting Slave Select line nret = bps_assert_ss_q(); // queue writing of "memory read" command at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); // insert an additional 15-clock delay between Third Party Application Interface 101

114 // the "memory read" command and the read transaction nret = bps_nop_q(5); // queue reading of 8 bytes nret = bps_spi_read_q(8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); // display read values printf("\ndata read: "); for (i=0; i<8; i++) printf("%02x ", pucdatain[i]); 102 Third Party Application Interface

115 bps_ping() Description: Checks whether the BusPro-S is connected and functional. Prototype: int bps_ping(); Parameters: Return Value: BPS_FT_OK (=0) if the function completes successfully and the BusPro-S is connected and functional. Otherwise BPS_ERROR_PING_FAILED (=0x1005). Example: // ping the adapter nret = bps_ping(); if (nret == BPS_FT_OK) printf("\nbuspro-s connected and functional."); else printf("\nbuspro-s not connected or not functional."); Third Party Application Interface 103

116 bps_set_bit_order() Description: Sets the order of bits to be written and read from and to the slave devices. One option is to shift out and in the MSB (Most Significant Bit) of the data stream stored in the buffer first. The other option is to shift out and in the LSB (Least Significant Bit) first. Prototype: int bps_set_bit_order( int nbitorder ); Parameters: nbitorder The new bit order to be used. The valid options are BIT_ORDER_MSB_FIRST (=0), and BIT_ORDER_LSB_FIRST (=1). Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // change the bit order to MSB first nret = bps_set_bit_order(bit_order_msb_first); // change the bit order to LSB first nret = bps_set_bit_order(bit_order_lsb_first); 104 Third Party Application Interface

117 bps_set_data_line_mode() Description: Sets the mode of operation for data lines. The most common data line mode is 4-wire mode, which uses two data lines operating in full-duplex mode. The 3-wire mode uses a single data line in half-duplex mode. The dual mode uses two data lines in half-duplex mode, and the quad mode uses four data lines in halfduplex mode. Table 15 summarizes the mapping of signals in various data line modes. Pin number 4-wire mode 3-wire mode Dual mode Quad mode 3 MOSI (unidirectional) IO0 (bidirectional) IO0 (bidirectional) IO0 (bidirectional) 5 MISO (unidirectional) not used IO1 (bidirectional) IO1 (bidirectional) 7 not used not used not used IO2 (bidirectional) 9 not used not used not used IO3 (bidirectional) Table 15. Signal Mappings in Data Line Modes (NOTE: Only 4-wire mode is supported when operating with Standard SPI Type interface.) Prototype: int bps_set_data_line_mode( int ndatalinemode ); Parameters: ndatalinemode The new data line mode to be used. The valid modes are the DATA_LINE_MODE_4WIRE (=0), DATA_LINE_MODE_3WIRE (=1), DATA_LINE_MODE_DUAL (=2), and DATA_LINE_MODE_QUAD (=3), for Enhanced SPI Type interface, and only the DATA_LINE_MODE_4WIRE (=0) for Standard SPI Type interface. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: ////////////////////////////////////////////////////// // read W25Q80BV device in quad mode (IO1,IO1,IO2,IO3 / half-duplex) // (group the transaction sequence into a queue and execute them at once.) // set the interface to Enhanced SPI (4-wire/3-wire/Dual/Quad) type nret = bps_set_spi_type(spi_type_enhanced); Third Party Application Interface 105

118 // queue asserting Slave Select line nret = bps_assert_ss_q(); // change to 4-wire mode nret = bps_set_data_line_mode(data_line_mode_4wire); // queue writing Fast Read Quad I/O instruction pucdataout[0] = 0xEB; nret = bps_spi_write_q(pucdataout, 1*8); // change to dual mode nret = bps_set_data_line_mode(data_line_mode_quad); // queue writing address value pucdataout[0] = 0x00; pucdataout[1] = 0x00; pucdataout[2] = 0x00; pucdataout[3] = 0x00; pucdataout[4] = 0x00; pucdataout[5] = 0x00; nret = bps_spi_write_q(pucdataout, 6*8); // queue reading 8 bytes nret = bps_spi_read_q(8*8); 106 Third Party Application Interface

119 // queue releasing Slave Select line nret = bps_deassert_ss_q(); // execute queued transactions nret = bps_execute_queue(pucdatain); // pucdatain returns all data bytes (8) // from queued the transactions // display read values printf("\ndata read: "); for (i=0; i<8; i++) { printf("%02x ", pucdatain[i]); pucdatain[i] = 0xCD; } // reset buffer Third Party Application Interface 107

120 bps_set_frequency() Description: Sets the operating clock rate to a specified value. Prototype: int bps_set_frequency( int nfrequency ); Parameters: nfrequency The frequency value to be used in Hz unit. The valid selections vary depending on the current SPI interface type. Table 16 lists the valid frequency values. Standard SPI Type , (0.5 MHz) , (1 MHz) , (2 MHz) , (3 MHz) , (4 MHz) , (5 MHz) , (6 MHz) , (7.5 MHz) , (10 MHz) , (15 MHz) , (30 MHz) Enhanced SPI Type , (0.25 MHz) , (0.5 MHz) , (0.75 MHz) , (1 MHz) , (2 MHz) , (3 MHz) , (4 MHz) , (5 MHz) , (6 MHz) , (7.5 MHz) , (10 MHz) , (12 MHz) , (15 MHz) , (20 MHz) , (30 MHz) , (60 MHz) Table 16. Valid Frequency Values in SPI Interface Types Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. 108 Third Party Application Interface

121 Example: // initialize adapter nret = bps_init_adapter(); // set SPI type to Enhanced (3-wire/Dual/Quad) type nret = bps_set_spi_type(spi_type_enhanced); // set voltage to 3.3 V nret = bps_set_voltage(3300); // set frequency to 10 MHz. nret = bps_set_frequency( ); Third Party Application Interface 109

122 bps_set_gpio() Description: Sets the output enables and levels of individual Slave Select lines. This function provides a method for utilizing the Slave Select line as GPIO lines. Prototype: int bps_set_gpio( unsigned char ucvalue, unsigned char ucoutputenable ); Parameters: ucvalue The 8-bit value representing the output levels of Slave Select (SS) lines. The MSB represents the level for SS7, and the LSB for SS0. The value 1 represents high, and the 0 represents low. The lines are driven to their specified levels only when the corresponding bits in the ucoutputenable value are also set. ucoutputenable The 8-bit value representing the output-enable settings of Slave Select (SS) lines. The MSB represents the setting for SS7, and the LSB for SS0. The value 1 makes the output to be enabled, and the 0 to be disabled. The lines are driven to the levels specified by the ucvalue parameter only when the corresponding bits in this parameter are also set. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // drive Slave Select lines 6, 4, 2, and 0 high // and 7, 5, 3, and 1 low nret = bps_set_gpio(0x55, 0xFF); // drive Slave Select lines 5 and 4 high // and 7 and 6 low nret = bps_set_gpio(0x30, 0xF0); 110 Third Party Application Interface

123 bps_set_gpio_q() Description: Adds a command for setting the output enables and levels of GPIO to the transaction queue. This function provides a method for utilizing the Slave Select line as GPIO lines. All queued transactions are executed when the bps_execute_queue function is called. (NOTE: This function is operational only when using Enhanced SPI Type interface.) Prototype: int bps_set_gpio_q( unsigned char ucvalue, unsigned char ucoutputenable ); Parameters: ucvalue The 8-bit value representing the output levels of Slave Select (SS) lines. The MSB represents the level for SS7, and the LSB for SS0. The value 1 represents high, and the 0 represents low. The lines are driven to their specified levels only when the corresponding bits in the ucoutputenable value are also set. ucoutputenable The 8-bit value representing the output-enable settings of Slave Select (SS) lines. The MSB represents the setting for SS7, and the LSB for SS0. The value 1 makes the output to be enabled, and the 0 to be disabled. The lines are driven to the levels specified by the ucvalue parameter only when the corresponding bits in this parameter are also set. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // queue the command for driving Slave Select lines // 6, 4, 2, and 0 high, and 7, 5, 3, and 1 low nret = bps_set_gpio_q(0x55, 0xFF); // queue the command for driving Slave Select lines // 5 and 4 high and 7 and 6 low nret = bps_set_gpio_q(0x30, 0xF0); Third Party Application Interface 111

124 // execute the queued transactions nret = bps_execute_queue(pucdatain); 112 Third Party Application Interface

125 bps_set_spi_mode() Description: Sets the SPI mode, which is a combination of clock polarity and phase. The clock polarity (CPOL) can be either 0, meaning the base level of the clock is low, or 1, meaning the base level is high. The clock phase can be either 0, meaning the data are captured on the clock s leading edge, or 1, meaning the data are captured on trailing edge. The SPI mode 0 is the combination of CPOL=0 and CPHA=0, mode 1 is CPOL=0 and CPHA=1, mode 2 is CPOL=1 and CPHA=0, and mode 3 is CPOL=1 and CPHA=1. Figure 62 and table summarize the various SPI modes. (NOTE: Only mode 0 is supported when operating with Enhanced SPI Type interface.) Figure 62. Timing Diagrams of SPI Modes Mode CPOL CPHA Table 17. CPOL and CPHA of SPI Modes Prototype: int bps_set_spi_mode( int nspimode ); Parameters: nspimode The new SPI mode to be used. The valid modes are 0 through 3 for Standard SPI Type interface, and only 0 for Enhanced SPI Type interface. Third Party Application Interface 113

126 Return Value: // initialize adapter nret = bps_init_adapter(); // set SPI type to Standard (4-wire only) type nret = bps_set_spi_type(spi_type_standard); // set SPI mode to 3 nret = bps_set_spi_mode(3); // all subsequent write and read will operate with the // base value of the clock as 1, and capture the data // on trailing edges, which are rising edges 114 Third Party Application Interface

127 bps_set_spi_type() Description: Sets the current SPI interface type to a new type. BusPro-S provides two different types of SPI bus interfaces. The Standard SPI Type interface is to be used for operating in various SPI modes (0, 1, 2, and 3). With this interface, however, only the standard (4-wire) data line mode is supported. On the other hand, the Enhanced SPI Type interface supports 3-wire, dual, and quad data line modes as well as the standard (4-wire) data line mode; but, it operates in the SPI mode 0 only. Table 18 summarizes their differences. Standard SPI Type Interface Enhanced SPI Type Interface SPI Mode Supported 0, 1, 2, 3 0 Data Line Mode Supported 4-wire 4-wire, 3-wire, Dual, Quad Maximum Clock Rate 30 MHz 60 MHz Table 18. Comparison of SPI Type Interfaces Prototype: int bps_set_spi_type( int nspitype ); Parameters: nspitype The new SPI interface type to be used. The valid selections are SPI_TYPE_STANDARD (=0) and SPI_TYPE_ENHANCED (=1). Return Value: // initialize adapter nret = bps_init_adapter(); // set SPI type to Enhanced (3-wire/Dual/Quad) type nret = bps_set_spi_type(spi_type_enhanced); // set voltage to 3.3 V nret = bps_set_voltage(3300); Third Party Application Interface 115

128 // set frequency to 10 MHz. nret = bps_set_frequency( ); 116 Third Party Application Interface

129 bps_set_ss() Description: Specifies a slave select line to be asserted during subsequent write and read transactions for both queued and non-queued mode. The actual assertion of the line occurs at the start of each transaction or when the bps_assert_ss() function or the bps_assert_ss_q() function (during execution of a queued sequence) is called. Likewise, the de-assertion of the line occurs at the end of each transaction or when the bps_deassert_ss() function or the bps_deassert_ss_q() function (during execution of a queued sequence) is called. Prototype: int bps_set_ss( int nssid ); Parameters: nssid The ID of slave select line to be asserted. The valid ID s are 0 through 7, and the startup default value is 0. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // read a byte from each of the eight slaves for (int i=0; i<7; i++) { // set Slave Select to i nret = bps_set_ss(i); // read a byte of data from slave i nret = bps_spi_read(pucdatain, 1*8); // assertion and de-assertion // occur during the transaction printf("\ndata read from slave#%d: %02X ", i, pucdatain[i]); } Third Party Application Interface 117

130 // START of QUEUE ///////////////////////////// // set Slave Select to 2 nret = bps_set_ss(2); // queue asserting Slave Select line nret = bps_assert_ss_q(); // will assert slave select 2 during // execution of queued transactions // queue writing of "memory read" command at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); // queue reading of 8 bytes nret = bps_spi_read_q(8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // will de-assert slave select 2 during // execution of queued transactions // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); 118 Third Party Application Interface

131 bps_set_ss_polarity() Description: Specifies a polarity of the slave select lines. After this function is called, all slave select lines shift to the non-asserted state. In other words, if the polarity is active low, the slave select lines are driven high or pulled-up high (if OC mode is selected). If the polarity is active high, then the slave select lines are driven low and stay low until the actual assertion event occurs. Prototype: int bps_set_ss_polarity( int nsspolarity ); Parameters: nsspolarity The polarity of slave select line. The valid selections are SS_POLARITY_ACTIVE_LOW_OC (=0), SS_POLARITY_ACTIVE_LOW (=1), and SS_POLARITY_ACTIVE_HIGH (=2). Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // set Slave Select Polarity to Active High // all Slave Select lines driven low in non-active state nret = bps_set_ss_polarity(ss_polarity_active_high); // set Slave Select to 2 nret = bps_set_ss(2); // assert Slave Select line nret = bps_assert_ss(); // drives slave select line 2 high, and keeps it // high until bsp_deassert_ss() is called // send command for "memory read" at address 0x nret = bps_spi_write(pucdataout, 4*8); Third Party Application Interface 119

132 // read 8 bytes nret = bps_spi_read(pucdatain, 8*8); // de-assert Slave Select line nret = bps_deassert_ss (); // de-asserts slave select line 2 by driving // the line low 120 Third Party Application Interface

133 bps_set_voltage() Description: Sets the operating voltage to a specified value. Prototype: int bps_set_voltage( int nmillivolt ); Parameters: nmillivolt The voltage value to be used in mv unit. The valid selections are 1800 (1.8V), 2500 (2.5V), and 3300 (3.3V). Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // initialize adapter nret = bps_init_adapter(); // set SPI type to Enhanced (3-wire/Dual/Quad) type nret = bps_set_spi_type(spi_type_enhanced); // set voltage to 3.3 V nret = bps_set_voltage(3300); // set frequency to 10 MHz. nret = bps_set_frequency( ); Third Party Application Interface 121

134 bps_spi_read() Description: Reads specified number of data bits from a slave device. For the duration of the operation, the slave select line specified by a preceding bps_set_ss() function call will be asserted according to the polarity specified by a preceding bps_set_ss_polarity() function call. Prototype: int bps_spi_read( unsigned char *pucdatain, int nbitstoreceive ); Parameters: pucdatain The pointer to a buffer to store the data bytes read. nbitstoreceive The number of bits to be read. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // set Slave Select Polarity to Active Low (Open-Collector) nret = bps_set_ss_polarity(ss_polarity_active_low_oc); // set Slave Select to 6 nret = bps_set_ss(6); unsigned char pucdatain[8]; // input data buffer // read of 8 bytes of data nret = bps_spi_read(pucdatain, 8*8); 122 Third Party Application Interface

135 bps_spi_read_q() Description: Queues a read transaction with a specified number of data bits to be read from a slave device. All queued transactions are executed when the bps_execute_queue function is called. Prototype: int bps_spi_read_q( int nbitstoreceive ); Parameters: nbitstoreceive The number of bits to be read. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // queue asserting Slave Select line nret = bps_assert_ss_q(); // queue writing of "memory read" command at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); // queue reading of 8 bytes Third Party Application Interface 123

136 nret = bps_spi_read_q(8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); // display read values printf("\ndata read: "); for (i=0; i<8; i++) printf("%02x ", pucdatain[i]); 124 Third Party Application Interface

137 bps_spi_write() Description: Writes out specified number of data bits to a slave device. For the duration of the operation, the slave select line specified by a preceding bps_set_ss() function call will be asserted according to the polarity specified by a preceding bps_set_ss_polarity() function call. Prototype: int bps_spi_write( unsigned char *pucdataout, int nbitstosend ); Parameters: pucdataout The pointer to an array of data bytes to be written. nbitstosend The number of bits to be written. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // set Slave Select Polarity to Active Low (Open-Collector) nret = bps_set_ss_polarity(ss_polarity_active_low_oc); // set Slave Select to 6 nret = bps_set_ss(6); // send command to set the "Quad-Enable(QE)" bit on SR2 pucdataout[0] = 0x01; // write register pucdataout[1] = 0x00; // SR1 value pucdataout[2] = 0x02; // SR2 value (w/ QE bit) nret = bps_spi_write(pucdataout, 3*8); Third Party Application Interface 125

138 bps_spi_write_q() Description: Queues a write transaction with a specified number of data bits to be written to a slave device. All queued transactions are executed when the bps_execute_queue function is called. Prototype: int bps_spi_write_q( unsigned char *pucdataout, int nbitstosend ); Parameters: pucdataout The pointer to an array of data bytes to be written. nbitstosend The number of bits to be written. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // queue asserting Slave Select line nret = bps_assert_ss_q(); // queue writing of "memory read" command at address 0x pucdataout[0] = 0x03; // read instruction pucdataout[1] = 0x10; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB nret = bps_spi_write_q(pucdataout, 4*8); 126 Third Party Application Interface

139 // queue reading of 8 bytes nret = bps_spi_read_q(8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); // display read values printf("\ndata read: "); for (i=0; i<8; i++) printf("%02x ", pucdatain[i]); Third Party Application Interface 127

140 bps_spi_write_read() Description: Writes out specified number of data bits to a slave device while reading back the same number of bits from it. For the duration of the operation, the slave select line specified by a preceding bps_set_ss() function call will be asserted according to the polarity specified by a preceding bps_set_ss_polarity() function call. Prototype: int bps_spi_write_read( unsigned char *pucdataout, unsigned char *pucdatain, int nbitstotransfer ); Parameters: pucdataout The pointer to an array of data bytes to be written. pucdatain The pointer to a buffer to store the data bytes read. nbitstosend The number of bits to be transferred. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: // set Slave Select Polarity to Active Low (Open-Collector) nret = bps_set_ss_polarity(ss_polarity_active_low_oc); // set Slave Select to 6 nret = bps_set_ss(6); // read Status Register SR1 pucdataout[0] = 0x05; pucdataout[1] = 0xff; nret = bps_spi_write_read(pucdataout, pucdatain, 2*8); printf("\ndata read from SR1: %02X ", pucdatain[1]); 128 Third Party Application Interface

141 bps_spi_write_read_q() Description: Queues a write-and-read transaction with a specified number of data bits to be transferred to and from a slave device. All queued transactions are executed when the bps_execute_queue function is called. Prototype: int bps_spi_write_read_q( unsigned char *pucdataout, int nbitstotransfer ); Parameters: pucdataout The pointer to an array of data bytes to be written. nbitstosend The number of bits to be transferred. Return Value: BPS_FT_OK (=0) if the function completes successfully. Otherwise, an error code defined in the BusPro_S.h file. Example: unsigned char pucdataout[100]; unsigned char pucdatain[100]; // output data buffer // input data buffer // START of QUEUE ///////////////////////////// // queue asserting Slave Select line nret = bps_assert_ss_q(); // queue command and address for reading 4 bytes from address 0x pucdataout[0] = 0x03; // read command pucdataout[1] = 0x20; // addr MSB pucdataout[2] = 0x00; // addr pucdataout[3] = 0x00; // addr LSB pucdataout[4] = 0xFF; // byte 1 (shift out dummy bytes for reading) pucdataout[5] = 0xFF; // byte 2 Third Party Application Interface 129

142 pucdataout[6] = 0xFF; // byte 3 pucdataout[7] = 0xFF; // byte 4 nret = bps_spi_write_read_q(pucdataout, 8*8); // queue releasing of Slave Select line nret = bps_deassert_ss_q(); // END of QUEUE /////////////////////////////// // execute the queued transactions // (pucdatain will contain all data bytes being returned // from all queued transactions. (e.g. 8 in this case)) nret = bps_execute_queue(pucdatain); // display read values (first four are ignored) printf("\ndata read: "); for (i=4; i<8; i++) printf("%02x ", pucdatain[i]); 130 Third Party Application Interface

143 Appendix A BusPro-S Hardware Reference Hardware Specifications Physical Mechanical Dimensions (box) Host Interface 3.25 inches x 2.30 inches x 0.80 inches (+/ ) USB Connector Standard Type B Socket Port Version 2.0 Power Requirements 5.0V Provided by the host USB 2.0 port in compliance with its requirements. Do not connect the hardware to the host PC through a bus (passive/unpowered) powered USB hub as it may not provide adequate operating current. USB extender cables are not recommended. Hardware DC and Switching Characteristics Absolute Maximum Ratings 1 Symbol Description Units V IN and V TS I/O input voltage or voltage applied to 3-state output, 0.60 to 4.10 V relative to GND T STG Storage temperature (ambient) 65 to 150 C T j Maximum junction temperature +125 C Recommended Operating Conditions 2 Symbol Description Min Typ Max Units V IN Input voltage relative to GND V T j Junction temperature operating range 0 85 C 1 Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability. 2 All voltages are relative to ground. BusPro-S Hardware Reference 131

144 Interface DC Input and Output Levels Voltage V IL V IH V OL V OH I OL I OH V V, Min V, Max V, Min V, Max V, Max V, Min ma ma System Switching Characteristics and Performance Symbol Description Min Typ Max Units T CLK Clock Period ns t co Data Out Propagation Time 0 5 ns t su Data In Setup Time 5 ns t h Data In Hold Time 0 ns Figure 63. Data Out Timing Figure 64. Data In Timing 132 BusPro-S Hardware Reference

145 SPI Timing Diagrams SPI Mode 0 (0, 0) CPOL = 0: Clock is low when idle CPHA = 0: Data is sampled on the leading (first) clock edge Data is captured on the clock s rising edge (low high transition) Data is propagated on the clock s falling edge (high low transition) Figure 65. SPI Mode 0 Timing SPI Mode 1 (0, 1) CPOL = 0: Clock is low when idle CPHA = 1: Data is sampled on the trailing (second) clock edge Data is captured on the clock s falling edge (high low transition) Data is propagated on the clock s rising edge (low high transition) Figure 66. SPI Mode 1 Timing BusPro-S Hardware Reference 133

146 SPI Mode 2 (1, 0) CPOL = 1: Clock is high when idle CPHA = 0: Data is sampled on the leading (first) clock edge Data is captured on the clock s falling edge (high low transition) Data is propagated on the clock s rising edge (low high transition) Figure 67. SPI Mode 2 Timing SPI Mode 3 (1, 1) CPOL = 1: Clock is high when idle CPHA = 1: Data is sampled on the trailing (second) clock edge Data is captured on the clock s rising edge (low high transition) Data is propagated on the clock s falling edge (high low transition) Figure 68. SPI Mode 3 Timing 134 BusPro-S Hardware Reference

147 3-Wire and Microwire Mode SPI The output data bits will toggle on the rising edge of the Clock and are stable after the specified time delay (TPD). Figure Wire and Microwire Timing BusPro-S Hardware Reference 135