HC11 Instruction Set Architecture

Transcription

1 HC11 Instruction Set Architecture Summer 2008 High-level HC11 architecture Interrupt logic MEMORY Timer and counter M8601 CPU core Serial I/O A/D converter Port A Port B Port C Port D Port E CMPE12 Summer 2008 Slides by ADB 2 1

2 HC11 Architecture CMPE12 Summer 2008 Slides by ADB 3 The HC11 registers CMPE12 Summer 2008 Slides by ADB 4 2

3 A line of assembly HC11 assembly [Label]: [Mnemonic [Operand]] [// Comment] Labels are case-sensitive LOOP and loop are different labels Comments are C-style block and line comments Block comment: /* block of comment text */ Line comment: // line of comment text CMPE12 Summer 2008 Slides by ADB 5 HC11 assembler directives HC11 assembler uses C-like directives #include to include a file #define to define a constant E.g., #include <v2_18g3.asm> #define MAX CMPE12 Summer 2008 Slides by ADB 6 3

4 HC11 assembler directives Separate sections for data declarations and for instructions.sect.data for data sections.sect.text Data types.space.byte.word.asciz.ascii for instructions sections for array declarations declares a single byte declares a 16-bit word a 0-terminated string of characters a string, no NULL terminator CMPE12 Summer 2008 Slides by ADB Data declaration examples.sect.data myvar:.word 0x1000 // init a word myarray:.space 20 // 20 bytes mychar:.byte 'a' // a character mybyte:.byte 23 // decimal integer myhi:.asciz "Hi" // a string + \0 myhi2:.ascii "Hi" // a string no \0.sect.text // Instructions would start here. // Can have many.text and.data sections! CMPE12 Summer 2008 Slides by ADB 8 4

5 Immediate (IMM) Direct (DIR) Extended (EXT) Indexed (INDX and INDY) Inherent (INH) Relative (REL) HC11 addressing modes CMPE12 Summer 2008 Slides by ADB 9 Immediate addressing 1 or 2 byte immediate depending on register involved (LDAA vs. LDD) Use # prefix Several formats for different bases C-style Constants instead of what is in the HC11 manual (don t use!,$,@,%) LDAA #245 LDAA #0x61 LDAA #041 LDAA #0b LDAA #'a' // dec // hex // oct // bin // ascii CMPE12 Summer 2008 Slides by ADB 10 5

6 Direct addressing Access an absolute memory location 8-bit addresses 256 bytes Premium addressing space: only 1 byte required! var:.sect.data // Assume data starts at 0x0040.word 0x1000// Allocate and initialize.sect.text SUBD var // Subtract M[0x0040] from D ADDA 0x11 //? ADDA #0x11 //? CMPE12 Summer 2008 Slides by ADB 11 Extended addressing Access an absolute memory location Essentially the same mode as direct, but with 16-bit (enhanced or extended) addresses The assembler will decide on which to use based on where the reference is located. Ex: var:.sect.data // Assume data starts at 0x0040.word 0xAA12 // Allocate and initialize.sect.text SUBD var // Subtract M[x4000] from D SUBD 0x4230 // Subtract M[x4230] from D CMPE12 Summer 2008 Slides by ADB 12 6

7 Indexed addressing (Indexed-X and -Y) Uses index register X or Y EA = X (or Y) + offset Similar to LC-3 s LDR R0, R2, #3 but can access memory and use it all at once. NOTE that the offset here is 1 byte, unsigned: only #define mydef 4 // c preprocessor used ldx #var // X address of var addd 0, X // D D + M[0+X] addd 2, X // D D + M[2+X] addd 4, X // D D + M[4+X] CMPE12 Summer 2008 Slides by ADB 13 Opcode fully specifies the operands Inherent addressing INCB ASLA PSHY // increment accumulator B // arithmetic shift left accumulator A // push index register Y onto stack CMPE12 Summer 2008 Slides by ADB 14 7

8 Relative addressing Used only for branch instructions, set by the assembler One-byte offset, two s complement Offsets from 128 to +127 bytes, with respect to the incremented program counter (PC+2) Use jumps for longer branches THERE: BRA WHERE WHERE: BEQ HERE HERE: CMPA #10 // compare A with 10 BEQ HERE // branch if A=10 CMPE12 Summer 2008 Slides by ADB 15 Aside: the shift operations: LSL Logical shift left All bits move left by one position Leftmost bit falls off (into the carry flag) Zero is shifted in to the LSb Like multiplying by 2 Same as arithmetic shift left (ASL) CMPE12 Summer 2008 Slides by ADB 16 8

9 Aside: the shift operations: LSR Logical shift right All bits move right by one position Rightmost bit falls off (into the carry flag) Zero is shifted in to MSb CMPE12 Summer 2008 Slides by ADB 17 Aside: the shift operations: ASR Arithmetic shift right All bits move right by one position Rightmost bit falls off (into the carry flag) MSb is replicated into the MSb (sign is preserved) Like dividing by 2 CMPE12 Summer 2008 Slides by ADB 18 9

10 foo:.byte 0xAB HC11 addressing modes review ldab #0 // loads the number 0 into b ldaa foo // loads the contents of byte // variable foo into acc. A ldy #foo // loads the address of foo into Y ldab 0, x // loads the byte at address X+0 // into acc. B NOTE that instructions can be used with different addressing modes CMPE12 Summer 2008 Slides by ADB 19 HC11 Kit Memory map 0x0000 0x00FF 0x0100 0x0FFF 0x1000 0x7BC0 0x7BC1 0x7BFF 0x7C00 0x7FFF 0x8000 0x803F 0x8040 0xFFFF Internal SRAM 4k System Memory User Area User Interrupt vector jump table I/O ports Internal 64-byte register block External ROM (system code) STACK CMPE12 Summer 2008 Slides by ADB 20 10