Defining UVM Coverage in IDesignSpec Sandeep Thakur Agnisys Support Team

Size: px

Start display at page:

Download "Defining UVM Coverage in IDesignSpec Sandeep Thakur Agnisys Support Team"

Kerrie Adele Carr
6 years ago
Views:

Defining UVM Coverage in IDesignSpec Sandeep Thakur Agnisys Support Team Table of Contents DEFINING UVM COVERAGE IN IDESIGNSPEC... 1 Customize Auto-generated Coverage... 5 User-Defined Coverage.

1 Defining UVM Coverage in IDesignSpec Sandeep Thakur Agnisys Support Team Table of Contents DEFINING UVM COVERAGE IN IDESIGNSPEC... 1 Customize Auto-generated Coverage... 5 User-Defined Coverage... 6 Mention the Coverage Identifiers and their "one-hot" values Linking the Covergroups and Its respective Identifiers Control the user-defined coverage... 8 Summary... 9 Defining UVM Coverage in IDesignSpec UVM Register Model has its default coverage types i.e. fields, bits and address-map coverage types.idesignspec (IDS) automatically generate the coverage code for all the components inside the top level block. User can also control, what type of coverage code should be generated for any particular register or block. This is done using IDS property coverage which support values on, off, a, b and f which generates: a Coverage code for the addresses read or written in an address map. b Coverage code for the bits read or written in registers. f Coverage code for the values of fields. on Coverage code for all the above mentioned types off No coverage code will be generated For a register or block, user can define multiple coverage types like ab, fb and so on. For this, coverage code will be generated for multiple types. coverage=on is similar to coverage=abf. In case of f and b types of coverage, two read and write access type covergroups are generated for each type of coverages(f.rd, f.wr, b.rd, b.wr). e.g. in case of f type coverage rd_cg_vals and wr_cg_vals are generated. User can also restrict covergroups generation based on read or write access types using property coverage=f.rd, will generate only read access type 1

2 covergroups(rd_cg_vals) or coverage=f.wr will generate write access type(wr_cg_vals).user can generate whatever access types of covergroups using rd/wr to the coverage property value. This coverage property is hierarchical, if mentioned in the block,it will be applied for all the registers that are inside the block. User can also mention this property for a particular register, which will over-ride this property value if mentioned above in its (parent) block. Coverage code is generated for Blocks, Memories and Registers deping on where coverage property value. For Register (reg1) having fields(fld1& fld2), there are two types of covergroups that can be generated, covergroups according to values of fields(f) read and written and covergroups for bits read and written in registers(b). Deping on the coverage property value either b, f, bf or on the coverage code will be generated for that register. Following coverage code will be generated for reg1 register having coverage property value equal to on or bf : Tip: Coverage code is in blue colour. class basic_blk_reg1 exts uvm_reg; randuvm_reg_field fld1; randuvm_reg_field fld2; localuvm_reg_data_tm_current; localuvm_reg_data_tm_data; localuvm_reg_data_tm_be; local bit m_is_read; covergroupwr_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (!m_is_read&&m_be[0]); field_1: coverpoint {m_current[1],m_data[1]} iff (!m_is_read&&m_be[0]); field_2: coverpoint {m_current[2],m_data[2]} iff (!m_is_read&&m_be[0]); field_3: coverpoint {m_current[3],m_data[3]} iff (!m_is_read&&m_be[0]); field_4: coverpoint {m_current[4],m_data[4]} iff (!m_is_read&&m_be[0]); field_5: coverpoint {m_current[5],m_data[5]} iff (!m_is_read&&m_be[0]); field_6: coverpoint {m_current[6],m_data[6]} iff (!m_is_read&&m_be[0]); field_7: coverpoint {m_current[7],m_data[7]} iff (!m_is_read&&m_be[0]); covergrouprd_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (m_is_read&&m_be[0]); field_1: coverpoint {m_current[1],m_data[1]} iff (m_is_read&&m_be[0]); field_2: coverpoint {m_current[2],m_data[2]} iff (m_is_read&&m_be[0]); field_3: coverpoint {m_current[3],m_data[3]} iff (m_is_read&&m_be[0]); field_4: coverpoint {m_current[4],m_data[4]} iff (m_is_read&&m_be[0]); field_5: coverpoint {m_current[5],m_data[5]} iff (m_is_read&&m_be[0]); field_6: coverpoint {m_current[6],m_data[6]} iff (m_is_read&&m_be[0]); field_7: coverpoint {m_current[7],m_data[7]} iff (m_is_read&&m_be[0]); covergroupwr_cg_vals; fld1: coverpointfld1.value[3:0]; fld2: coverpointfld2.value[3:0]; covergrouprd_cg_vals; fld1: coverpointfld1.value[3:0]; fld2: coverpointfld2.value[3:0]; function new(string name = "basic_blk_reg1"); 2

3 super.new(name, 8, build_coverage(uvm_cvr_reg_bits + UVM_CVR_FIELD_VALS)); add_coverage(build_coverage(uvm_cvr_reg_bits + UVM_CVR_FIELD_VALS)); //Added because build coverage in the line above doesn t work due to a bug in UVM 1.1 library if (has_coverage(uvm_cvr_reg_bits)) wr_cg_bits = new(); rd_cg_bits = new(); if (has_coverage(uvm_cvr_field_vals)) wr_cg_vals = new(); rd_cg_vals = new(); function virtual function void sample(uvm_reg_data_t data, uvm_reg_data_tbyte_en, bit is_read, uvm_reg_map map); super.sample(data, byte_en, is_read, map); if (get_coverage(uvm_cvr_reg_bits)) m_current = get(); m_data = data; m_be = byte_en; m_is_read = is_read; if(!is_read) wr_cg_bits.sample(); if(is_read) rd_cg_bits.sample(); if (get_coverage(uvm_cvr_field_vals)) if(!is_read) wr_cg_vals.sample(); if(is_read) rd_cg_vals.sample(); function virtual function void sample_values(); super.sample_values(); if (get_coverage(uvm_cvr_field_vals)) wr_cg_vals.sample(); rd_cg_vals.sample(); function virtual function void build(); this.fld1 = uvm_reg_field::type_id::create("fld1"); this.fld2 = uvm_reg_field::type_id::create("fld2"); this.fld1.configure(this, 4, 0, "RW", 0, 'd2, 1, 1, 0); this.fld2.configure(this, 4, 4, "RW", 0, 'd12, 1, 1, 0); function `uvm_object_utils(basic_blk_reg1) class If coverage property has value on or a for Memory(DMA_MEM) following coverage code will be generated for DMA_MEM memory: classbasic_blk_dma_mem exts uvm_mem; 3

4 localuvm_reg_addr_tm_offset; covergroupcg_addr; QUADRANTS :coverpointm_offset { bins FIRST = {[0:63]}; bins SECOND = {[64:127]}; bins THIRD = {[128:191]}; bins FOURTH = {[192:255]}; } function new(string name = "basic_blk_dma_mem"); super.new(name, 'h400, 32, "RW", build_coverage(uvm_cvr_addr_map)); if (has_coverage(uvm_cvr_addr_map)) cg_addr = new(); function virtual function void sample(uvm_reg_addr_t offset, bit is_read, uvm_reg_map map); if (get_coverage(uvm_cvr_addr_map)) m_offset = offset; cg_addr.sample(); function `uvm_object_utils(basic_blk_dma_mem) class And when coverage is on or a for block(basic_blk) following coverage code will be generated for basic_blk block: classbasic_blk_block exts uvm_reg_block; randbasic_blk_dma_memdma_mem; rand basic_blk_reg1 reg1; localuvm_reg_addr_tm_offset; covergroupcg_addr; basic_blk_dma_mem :coverpointm_offset { bins hit = { ['h2000 : 'h23ff] }; } basic_blk_reg1 :coverpointm_offset { bins hit = { 'h2400 }; } function new(string name = "basic_blk"); super.new(name, build_coverage(uvm_cvr_addr_map)); if (has_coverage(uvm_cvr_addr_map)) cg_addr = new(); function virtual function void build();..... function virtual function void sample(uvm_reg_addr_t offset, bit is_read, uvm_reg_map map); if (get_coverage(uvm_cvr_addr_map)) m_offset = offset; cg_addr.sample(); function `uvm_object_utils(basic_blk_block) class :basic_blk_block 4

5 Customize Auto-generated Coverage User can also customize the auto generated covergroups of coverage types a, b or f by adding bins to the coverpoints, include new coverpoints or include cross between different coverpoints in the covergroups. IDS provide the customization of such auto-generated coverage code. In IDS this is possible using *uvm+ <custom code>*/uvm+ tags. Through this user can modify/customize the covergroups, coverpoints that are automatically generated for a, b and f coverage types. The entire syntax is as follows: [uvmloc = (coverpoint/covergroup).(abf/b/f/a).(rd/wr) ] <user code> where, rd or wr is optional. If wr or rd is not mentioned then the code inside uvm tags will be added for both read and write access type covergroups/coverpoints. In this syntax, a is valid only for blocks and memories, b is valid for registers and f for fields/registers. User can specify this in block as well, which IDS interprets that it will be for all the registers inside the block i.e. it is by default hierarchical. User can also specify individually for each or particular register, memory or register-file. If user has specified both in block as well as in register, IDS will take which is nearest to it i.e. the [uvm] tags mentioned in the register. For examples: [uvmloc=coverpoint.b] ignore_binsig_b = {1,2}; This will generate the code inside it for all the Register bits coverpoints: covergroupwr_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (!m_is_read&&m_be[0]) { ignore_bins ig_b1 = {1,2}; } covergrouprd_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (m_is_read&&m_be[0]) { ignore_bins ig_b1 = {1,2}; } Using ignore_bins ig_b1 =,1,2-; auto bins auto*1+ & auto*2+ won t be generated. [uvmloc= coverpoint.f.rd] binssome_range = [0:3] }; This will generate the code inside it for read access of Field Values coverpoints: covergrouprd_cg_vals; fld1: coverpointfld1.value[31:0]{ binssome_range = { [0:3] }; } [uvmloc= covergroup.f.wr] my_cross: cross cpt_field0, cpt_field1; 5

6 Through this user can make own coverpoints and cross inside the auto generated covergroups for register bits and fields. covergroupwr_cg_vals; my_cross: cross cpt_field0, cpt_field1; User-Defined Coverage But, often these default coverage types provided by UVM are not enough. What if the user has specific coverage code that needs to be generated? In IDS, it is possible to generate the user-defined coverage code and also control the covergroups included in the coverage of that element in the auto-generated register or block UVM Register Model classes. Following are the steps/controls that IDS provides for generating the user-defined coverage code: Mention the Coverage Identifiers and their "one-hot" values. Coverage Identifiers are the identifiers for the user defined covergroups which the user wants to include in the UVM register model. Through these identifiers user can control the coverage. For details about how it is controlled, please refer the UVM User Guide 1.1. In IDS, user can specify all the identifiers globally at the top level of the register specification in the block description using a property, as follows: {uvm.user_coverage= <IDENTIFIER_NAME1>:<its_value>, <IDENTIFIER_NAME2>:<its_value> } This will generate an enum of type uvm_reg_cvr_t typedefenumuvm_reg_cvr_t { COV_ID_1 = 'h01000, COV_ID_2 = 'h02000, COV_ID_3 = 'h04000 } my_uvm_coverage_model_e; Note: Values of the coverage identifiers should be one-hot values. This is to avoid collisions with pre-defined UVM, vor-defined, and user-defined coverage modelidentifiers, bits 0 through 7 are reserved for UVM, bits 8 through 15 are reserved for vors, and bits 16through 23 are reserved for users. Linking the Covergroups and Its respective Identifiers. Using IDS user can write the user-defined coverage code inside the uvm tags, [uvm]<>. That code will be automatically included in the component class of that register or block. In UVM, user has to link its covergroup with the coverage Identifier, in order to include that covergroup(s) in the coverage database on running simulation 6

7 environment.in IDS, user has to add the coverage identifier in the comment like a pragma in the first line of thecovergroup, inside the [uvm] tags for register/block,using property user_coverage=<identifier> or uvm.user_coverage=<identifier>, as follows : [uvm] covergroup cg_vals_my_cov1; //user_coverage=<identifier_name1> covergroup cg_vals_my_cov2; //uvm.user_coverage=<identifier_name2>, <IDENTIFIER_NAME3>,.. In UVM Register Model, this willinclude code for coverage in new() function of register/block and also create the sample() and sample_values() functions for the user defined covergroup(s). classmy_reg exts uvm_reg; `uvm_object_utils(my_reg).... //USER-CODE START covergroup cg_vals_my_cov1; // user_coverage=cov_id_1 fld1: coverpointfld1.value[7:0]{ binshdmi_dvi_bin = fld1.value [0:3]; binsmipi_bin = fld1.value[7] ; } covergroup cg_vals_my_cov2; // user_coverage= COV_ID_2, COV_ID_3 fld2: coverpointfld1.value[8:31] { binshdmi_dvi_bin = fld1.value [24:8]; binsmipi_bin = fld1.value[28] ; } function new(); if (has_coverage(cov_id_1)) cg_vals_my_cov1 = new(); if (has_coverage(cov_id_2)) cg_vals_my_cov2 = new(); if (has_coverage(cov_id_3)) cg_vals_my_cov2 = new(); function : new 7

8 virtual function void sample(uvm_reg_data_t data, uvm_reg_data_tbyte_en, bit is_read, uvm_reg_map map); function class super.sample(data, byte_en, is_read, map); if (get_coverage(cov_id_1)) cg_vals_my_cov1.sample(); if (get_coverage(cov_id_2)) cg_vals_my_cov2.sample(); if (get_coverage(cov_id_3)) cg_vals_my_cov2.sample(); virtual function void sample_values(); super.sample_values(); if (get_coverage(cov_id_1)) cg_vals_my_cov1.sample(); if (get_coverage(cov_id_2)) cg_vals_my_cov2.sample(); if (get_coverage(cov_id_3)) cg_vals_my_cov2.sample(); function Note: Single covergroup can link with multiple coverage identifiers or vice-versa. Control the user-defined coverage UVM provides a control for coverage collection where user can control for which identifiers containing covergroups are to be included in coverage database on running the simulation environment. In IDS, user has to add the identifier(s) linked to that covergroup(s) using the coverage property, where its value is separated by comma, : {coverage=f, <IDENTIFIER_NAME1>, <IDENTIFIER_NAME3> } In this case, coverage will be build for fields, bits and user-defined covergroup(s) which is/are linked to <IDENTIFIER_NAME1> and <IDENTIFIER_NAME3>, no matter there are multiple covergroups in that linked to the Identifier(s)in the UVMRegister Model. 8

9 In UVM register model,itwill create the add_coverage() for the listed coverage model identifiers. classmy_reg exts uvm_reg;... function new(string name = "my_reg"); super.new(name, 16, build_coverage(uvm_cvr_field_vals)); add_coverage(build_coverage(uvm_cvr_field_vals + COV_ID_1 + COV_ID_3)); function class Summary Property Value Component Code coverage a Block/Memory Covergroup: cg_addr f Register/Register Covergroups: rd_cg_vals& wr_cg_vals f.rd Register/Register Covergroup: rd_cg_vals f.wr Register/Register Covergroup: wr_cg_vals b Register/Register Covergroups: rd_cg_bits& wr_cg_bits b.rd Register/Register Covergroup: rd_cg_bits b.wr Register/Register Covergroup: wr_cg_bits IDENTIFIER_NAME1 Block/Register/R This is used to identify user, IDENTIFIER_NAME2 egiste/me defined covergroups., mory [uvmloc= covergroup.a] [uvmloc= covergroup.b.rd] [uvmloc= covergroup.b.wr] [uvmloc= covergroup.b] Memory/Block covergroupcg_addr; Register/Field covergrouprd_cg_bits; Register/Field covergroupwr_cg_bits; Register/Field covergrouprd_cg_bits; covergroupwr_cg_bits; [uvmloc= covergroup.f.rd] Register/Field covergrouprd_cg_vals; 9

10 [uvmloc= covergroup.f.wr] [uvmloc= covergroup.f] [uvmloc= coverpoint.f.rd] [uvmloc= coverpoint.f.wr] [uvmloc= coverpoint.f] [uvmloc= coverpoint.b.rd] [uvmloc= coverpoint.b.wr] [uvmloc= coverpoint.b] Register/Field covergroupwr_cg_vals; Register/Field covergrouprd_cg_vals; covergroupwr_cg_vals; Register/Field covergrouprd_cg_vals; fld1: coverpoint fld1.value[31:0]{ } Register/Field covergroupwr_cg_vals; fld1: coverpoint fld1.value[31:0]{ } Register/Field covergrouprd_cg_vals; fld1: coverpoint fld1.value[31:0]{ } covergroupwr_cg_vals; fld1: coverpoint fld1.value[31:0]{ } Register covergrouprd_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (!m_is_read&&m_be[0]) { } Register covergroupwr_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (!m_is_read&&m_be[0]) { } Register covergrouprd_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff (!m_is_read&&m_be[0]) { } covergroupwr_cg_bits; field_0: coverpoint {m_current[0],m_data[0]} iff(!m_is_read&&m_be[0]) { } 10

11 [uvmloc= covergroup.(f/b/a).(wr/rd)] my_cross: cross cvpt1, cvpt2; uvm.user_coverage my_cross: cross cvpt1, cvpt2; <IDENTIFIER_NA ME1>:<its_value>,<IDENTIFIER_NA ME2>:<its_value> Block/Memory/R egister/field covergroup xxx; cvpt1: coverpoint ; my_cross: cross cvpt1, cvpt2; Block typedefenumuvm_reg_cvr_t { IDENTIFIER_NAME1 = 'h01000, IDENTIFIER_NAME2 = 'h02000, } my_uvm_coverage_model_e; 11

Getting Started with UVM. Agenda

Getting Started with UVM. Agenda Getting Started with UVM Vanessa Cooper Verification Consultant 1 Agenda Testbench Architecture Using the Configuration Database Connecting the Scoreboard Register Model: UVM Reg Predictor Register Model: