Modeling with the Timing Definition Language (TDL) Wolfgang Pree Professor Department of Computer Science Univ. Salzburg, Austria

Transcription

1 Modeling with the Timing Definition Language (TDL) Wolfgang Pree Professor Department of Computer Science Univ. Salzburg, Austria

2 Overview What is TDL? TDL component model TDL tool chain simulation in Matlab/Simulink transparent distribution of components 2 W. Pree

3 What is TDL? A high-level textual notation for defining the timing behavior of a real-time application. Conceptually based on Giotto TDL = Giotto + syntax + cleanups + component architecture + control engineering enhancements. Analogy: IDL (CORBA, MIDL) vs. TDL IDL defines an interface for a distributed application => Separates interface from implementation TDL defines the timing for a real-time application => Separates timing from implementation 3 W. Pree

4 Embedded hard real-time software 4 W. Pree

5 Multi-rate, multi-mode systems (Giotto) 5 W. Pree

6 Multi-rate, multi-mode systems (II) LET-semantics 6 W. Pree

7 Logical Execution Time (LET) abstraction release Logical Execution Time (LET) terminate Logical task invocation time Physical start suspend resume stop ET <= WCET <= LET results are available at 'terminate' 7 W. Pree

8 Motivation for the TDL component model ECU1 Program1 ECU2 Program2 ECU3 Program3 e.g. modern cars have up to 80 control units (ECUs) ECU consolidation is a topic run multiple programs on one ECU leads to TDL component model 8 W. Pree

9 TDL component model ECU Program1 Program2 Program3 ProgramX is called a module modules may be independent modules may also refer to each other modules can be used for multiple purposes 9 W. Pree

10 Modules 10 W. Pree

11 Modules public 11 W. Pree

12 Modules private public 12 W. Pree

13 TDL syntax by example module M1 { sensor boolean s1 uses gets1; actuator int a1 := 10 uses seta1; public task inc { output int o := 10; uses incimpl(o); } start mode main [period=10ms] { task [freq=1] inc(); // LET = 10ms / 1 = 10ms actuator [freq=2] a1 := inc.o; // update every 10ms/2 = 5ms mode [freq=1] if exitmain(s1) then freeze; } } mode freeze [period=1000ms] {} 13 W. Pree

14 Module import module M2{ } import M1; task clienttask { input int i1; } mode main [period=100ms] { task [freq=1] clienttask(m1.inc.o); } TDL supports structured module names (e.g. com.avl.p1.m1) import with rename: (e.g. import com.avl.p1.m1 as A1;) group import: (e.g. import com.avl.p1 {M1, M2, M3};) 14 W. Pree

15 Module summary provides a named program component provides a name space partitions the set of actuators allows for exporting sensors, constants, types, task outputs may be imported by other module(s) acts as unit of composition acts as the unit of distribution acts as the unit of loading acts as the unit of execution TDL supports multi mode & multi rate & multi program systems. 15 W. Pree

16 TDL tool chain 16 W. Pree

17 core tool chain functionalit y code.tdl Compiler E-machine*.ecode *Simulink, FlexRay-AES, OSEK, INtime, RTLinux, W. Pree

18 plug-in architecture of compiler functionalit y code.tdl Compiler.ecode E-machine* AST platform specific Platform plugin* platform specific *Simulink, FlexRay-AES, OSEK, INtime, RTLinux, W. Pree

19 tool chain overview Matlab/Simulink Model TDL: Visual Creator Decoder functionalit y code.txt.tdl Compiler.ecode E-machine* AST platform specific Platform plugin* platform specific *Simulink, FlexRay-AES, OSEK, INtime, RTLinux, W. Pree

20 Simulation in Matlab/ Simulink 20 W. Pree

21 How can we ensure that simulated behavior and behavior on a specific platform are equivalent? we use the same E-machine implementation in Matlab/Simulink the E-machine implementation is wrapped within an S-function 21 W. Pree

22 Matlab/Simulink simulation of TDL modules before the simulation is started, the TDL compiler processes the textual representation of each TDL module and generates E-code that is then interpretetd by the S-function-E-machine The E-machine operates at a single discrete sample time that is computed from the minimum period used by any activity in all possible modes. 22 W. Pree

23 Transparent distribution 23 W. Pree

24 Transparent distribution of TDL modules (I) Modules are the natural choice as unit of distribution because dataflow within a module (cohesion) will most probably be much larger than dataflow across module boundaries (adhesion). The possibility to distribute modules across different computation nodes leads us to the notion of transparent distribution. 24 W. Pree

25 Transparent distribution of TDL modules (II) We define the term transparent distribution in the context of hard real-time applications with respect to two points of view: Firstly, at runtime a set of modules behaves exactly the same, no matter if all modules (i.e. components) are executed on a single node or if they are distributed across multiple nodes. The logical timing is always preserved, only the physical timing, which is not observable from the outside, may be changed. Secondly, for the developer of a module, it does not matter where the module itself and any imported modules are executed. 25 W. Pree

26 Communication scheduling requirements resulting from transparent distribution (I) Example: 26 W. Pree

27 Communication scheduling requirements resulting from transparent distribution (II) sample execution of the two tasks on a single node: 27 W. Pree

28 Distributed components (I) M1 and M2 on different nodes. We call the local memory buffer of node1 comm1 and the local memory buffer of node 2 comm2. 28 W. Pree

29 Distributed components (II) 29 W. Pree

30 Distributed components (II) communication window 30 W. Pree

31 Transparent distribution challenge each mode combination => another static bus schedule The challenge was to beat the combinatorial explosion of the number of static bus schedules, as we need to generate potentially one static bus schedule for each mode/phase combination. If we have i communicating modules and each module k (1 <= k <= i) has k modes modes, we would have to generate bus schedules. 31 W. Pree

32 solution with what we call dynamic multiplexing 32 W. Pree

33 sample binding of several messages to one frame 33 W. Pree

34 Status quo ready TDL:VisualCreator TDL:Compiler and Bus Schedule Generator for FlexRay TDL:Machine for Simulink, FlexRay-AES, INtime, OSEK Decoder TDL:VisualDistributor you can get a free trial version of the TDL:VisualCreator in Simulink (includes the TDL:Compiler) work in progress fine-grained integration with DESIGNERPRO (DeComSys.com) TDL extensions 34 W. Pree

35 Thank you for your attention! 35 W. Pree