PLC-5 A.I. SERIES PROGRAMMING GUIDE. December Supersedes Doc. ID 9399-L5PG Allen-Bradley Parts

Transcription

1 PLC-5 A.I. SERIES PROGRAMMING GUIDE December 1997 Supersedes Doc. ID 9399-L5PG

2 Contacting Rockwell Software Copyright Notice Trademark Notices Warranty Technical Support Telephone Technical Support Fax World Wide Web Rockwell Software Inc. All rights reserved Printed in the United States of America Portions copyrighted by Allen-Bradley Company, Inc. and used with permission. This manual and any accompanying Rockwell Software products are copyrighted by Rockwell Software Inc. Any reproduction and/or distribution without prior written consent from Rockwell Software Inc. is strictly prohibited. Please refer to the license agreement for details. WINtelligent Series is a registered trademark. The Rockwell Software logo, RSAssistant, RSBatch, RSData, RSLogix Emulate 5, RSLogix Emulate 500, RSGuardian, RSHarmony, RSKeys, RSLinx, RSLogix 5, RSLogix 500, RSPower, RSPowerCFG, RSPowerRUN, RSServer32, RSServer, RSServer Toolkit, RSSql, RSToolbox, RSTrainer, RSTrend, RSTune, RSView32, RSView, RSWire, A.I. Series, Advanced Interface (A.I.) Series, AdvanceDDE, ControlGuardian, ControlView, INTERCHANGE, Packed DDE, PLC-500, WINtelligent, WINtelligent EMULATE 5, WINtelligent EMULATE 500, WINtelligent LINX, WINtelligent LOGIC 5, WINtelligent VIEW, WINtelligent RECIPE, WINtelligent VISION, WINtelligent VISION2 are trademarks of Rockwell Software Inc. PLC, PLC-2, PLC-3 and PLC-5 are registered trademarks, and Data Highway Plus, DH+, DHII, DTL, Network DTL, Pyramid Integrator, PanelBuilder, PanelView, PLC-5/250, PLC-5/20E, PLC- 5/40E, PLC-5/80E, SLC, SLC 5/01, SLC 5/02, SLC 5/03, SLC 5/04, and SLC 500 are trademarks of the Allen-Bradley Company, Inc. Microsoft, MS-DOS, Windows, and Visual Basic are registered trademarks, and Windows NT and Microsoft Access are trademarks of the Microsoft Corporation. Ethernet is a registered trademark of Digital Equipment Corporation, Intel, and Xerox Corporation. IBM is a registered trademark of International Business Machines Corporation. AIX, PowerPC, Power Series, RISC System/6000 are trademarks of International Business Machines Corporation. UNIX is a registered trademark in the United States and other countries, licensed exclusively through X/Open Company Limited. All other trademarks are the property of their respective holders and are hereby acknowledged. This Rockwell Software product is warranted in accord with the product license. The product's performance will be affected by system configuration, the application being performed, operator control and other related factors. The product's implementation may vary among users. This manual is as up-to-date as possible at the time of printing; however, the accompanying software may have changed since that time. Rockwell Software reserves the right to change any information contained in this manual or the software at anytime without prior notice. The instructions in this manual do not claim to cover all the details or variations in the equipment, procedure, or process described, nor to provide directions for meeting every possible contingency during installation, operation, or maintenance.

3 Table of Contents 1 Introduction How to Use This Manual Planning Programs for Your Application Functional Specification Detailed Analysis Program Entry Testing Acceptance Using Main Control Programs How the Processor Interprets the MCPs Configuring Main Control Programs Specifying The Order of Main Control Programs Disabling Main Control Programs Monitoring Main Control Programs Using Interrupt Programs Designing Programs for Your Application Machine Example Creating the Functional Specification Creating the Detailed Analysis Entering the Program Using Other Processor Programming Features Examples of Special Programming Applications Checking for Completeness SFC Building Blocks SFC Building Blocks Step Transition Simple Path Selection Branch Simultaneous Branch GOTO and Label Statements Drawing an SFC Example SFC How Selection Branches Work

4 PLC-5 A.I. Series Software Reference How Simultaneous Branches Work Using GOTOs and Labels Using the SFR Instruction Writing Ladder Logic Converting Machine Statements to Ladder Logic Rung Logic Example Example Discrete I/O Instructions Constructing Ladder Rungs Writing Rung Logic Writing Branch Logic Arranging Input Instructions Organizing Data Table Files Understanding Data Storage Organizing Data into Files and Data Blocks Default Data Table Files Addressing Data Table Files Specifying Logical Addresses Using Address Mnemonics Specifying I/O Image Addresses Specifying Indirect Addresses Specifying Indexed Addresses Indexed Addressing Example Specifying Symbolic Addresses SoftLogix 5 Symbols Addressing Frequently Used Files Status File for PLC 5/10, PLC 5/12, and PLC 5/15 Processors Status File for PLC 5/25 Processors Using a Selectable Timed Interrupt Writing STI Ladder Logic Setting Up an STI Storing the Location of the STI File in the Processor Status File Block Transfers Used Within an STI Using a Processor Input Interrupt Writing PII Ladder Logic PII Application Examples Using Counter Mode Using Bit Transition Mode Setting Up a PII ii

5 Table of Contents Configuring the PII Block Transfers Used Within a PII Monitoring a PII PII Return Mask PII Accumulator PII Scan Times Writing a Fault Routine Using Fault Routines Responses to a Major Fault Major Fault Codes Programming a Fault Routine Set an Alarm Clearing the Fault Using Shutdown Logic Testing a Fault Routine Setting Up a Fault Routine Enabling a Fault Routine Changing the Fault Routine from Ladder Logic Clearing a Major Fault Setting Power Up Protection Allowing or Inhibiting Startup Using Adapter Mode Using Adapter Mode Operating in Adapter Mode Configuring an Original PLC-5 Processor for Adapter Mode Configuring a New Platform PLC-5 Processor for Adapter Mode Transferring Discrete I/O and Block Data Programming Discrete Data Transfers Using Rack Creating an Adapter Image File - Original PLC-5 Processors Creating an Adapter Image File - New Platform PLC-5 Processors Transferring Bits between Supervisory (PLC-2) and Adapter Processors Determining the Status of the Adapter Processor Determining the Status of the Supervisory Processor Programming Considerations for Using Adapter Mode Programming Block Transfers - Original PLC-5 Processors Addressing Tips for Block Transfers Example Ladder Logic Supervisory Processor (PLC 2/30, PLC 3, PLC 5, or PLC 5/250) Adapter Processor (PLC 5/15, 5/25) iii

6 PLC-5 A.I. Series Software Reference Adapter Processor (New Platform Processors) Using Scanner Mode Operating in Scanner Mode Configuring an Original PLC 5 Processor for Scanner Mode Configuring a New Platform PLC 5 Processor for Scanner Mode Transferring Discrete Data Transferring Block Data Queued Block Transfer Requests Block Transfers to Local I/O Block Transfers to Remote I/O Block Transfers in Fault Routines or Selectable Timed Interrupts (STIs) Block Transfer Sequence Original PLC-5 Processors Block Transfer Sequence New Platform PLC-5 Processors Block Transfer Sequence with Status Bits Block Transfer Timing: Original PLC-5 Processors Instruction Run Time Waiting Time in the Queue Transfer Time Block Transfer Timing: New Platform PLC-5 Processors Instruction Run Time Waiting Time in the Holding Area Transfer Time When the Processor Detects a Major Fault When a Resident Local I/O Rack Faults When a Remote I/O Rack Faults Recovering from a Resident Local I/O or Remote I/O Rack Fault Using I/O Status File Bits to Monitor Rack Faults Using Fault Routine and Ladder Logic to Recover Index iv

7 Introduction 1 Introduction This manual provides you with information about programming the Allen Bradley PLC 5 family of programmable logic controllers. This information includes: Planning your projects Basics of SFC programming Basics of ladder logic programming Basics of the PLC 5 data table, including the various methods you can use to address data table files Using selectable timed interrupts, processor input interrupts, and fault routines Setting up the processor for adapter and scanner mode Programming through a serial port Note Command Portal keys for this function:.uuki For information on the PLC 5 instruction set, see the Instruction Set Reference or the instruction set help in the software (from the Online or Offline Editor, select [F6] Utility, [F9] Util2, [F7] Keyconf, [F4] Inshelp or press [Shift-F10]). PLC-5 processors can be grouped into three categories: Original (classic ), New Platform (NP5 or Enhanced), and Secure. As much as possible, this manual will refer to a group of processors rather than listing individual models. The table below lists the different processors in each category. (The processor type given includes all variants of that processor: L-Local, E-Ethernet, C-ControlNet, and V-VME.) Original New Platform Secure PLC-5/10 PLC-5/11 PLC-5/16 PLC-5/12 PLC-5/20 PLC-5/26 PLC-5/15 PLC-5/30 PLC-5/36 PLC-5/25 PLC-5/40 PLC-5/46 PLC-5/VME PLC-5/60 PLC-5/66 PLC-5/80 PLC-5/86 1-1

8 PLC-5 A.I. Series Programming Guide How to Use This Manual This manual is a guide to programming the PLC 5 family of programmable logic controllers. While this manual will not tell you everything about PLC 5 programming, it does discuss the major program structures that you can use in your projects. Before you begin with your PLC 5 project, read through Chapter 2 Planning Programs for Your Application. This chapter describes an Allen Bradley recommended procedure for developing PLC 5 programs using multiple main control programs. While much of the material in that chapter is devoted to New Platform and Secure PLC-5 processors, a great deal of the information applies to Original PLC-5 processors as well. For those using one main control program, or for those using earlier PLC 5 processors, Chapter 3 Designing Programs for Your Application contains the Allen Bradley recommended procedure for developing programs. Chapter 4 SFC Building Blocks describes the components of Sequential Function Charts. If your processor supports SFC programming, this chapter can help you get started with SFCs. The rest of the manual is to be used as a guide the first place to turn when you have questions about: Using interrupt programs (selectable timed interrupts and program input interrupts) PLC-5 data table structures Adapter and scanner mode Serial port programming 1-2

9 Planning Programs for Your Application 2 Planning Programs for Your Application Allen Bradley recommends that you develop a design specification for your programming application. The design specification is a conceptual view of your application and is used to determine your sequential function chart (SFC) and ladder logic requirements. This chapter gives you an overview on how to plan your design specification for your processor; the next two chapters give you more specific detail to prepare your design specification. In planning and developing the programs for your application, we recommend that you use the Program Development model shown below. Functional Specification (general conception) Acceptance Sign-off Detailed Anaylsis Testing Program Development Each box represents an activity that you perform. Begin with the functional specification, and move on to the detailed analysis. Based on the detailed analysis, you can enter your programs and test them. When testing is complete, you are ready to implement the programs in your application. This model also allows for interaction of the activities at the different levels. The detailed analysis can be used as the basis for developing your testing procedures and requirements. And, because the functional specification is well thought out, it can be used as the program sign off document. 2-1

10 PLC-5 A.I. Series Programming Guide Not all machine processes can be controlled with an SFC implementation; the following description of the program development model is generalized to fit most processes. The power of an SFC is that it is a descriptive programming language that you can use to describe your process in terms of machine states and transition conditions. Because this description executes your process control, your SFC provides the link between these two legs of the development model. Functional Specification Detailed Analysis The functional specification represents a very general view of your process or a description of operation. Identify the events and the overall order in which they must occur. This functional specification can be in any form: written statements, flowcharts, or rough-draft sequential function charts (SFC). Use the form that is most familiar to you. Allen Bradley recommends that you generate a rough-draft SFC so that you have a better correspondence between your beginning diagrams and your finished program. In this phase, you take the functional specification and add the details of your process. Identify your inputs and outputs, specific actions and transitions between actions (that is, the bit-level details needed to write your program. If you are using a New Platform or Secure PLC-5 processor, you also determine the number of Main Control Programs (MCPs) and the programming method for each during this phase. Use MCPs when you are describing your process in terms of function or in terms of geography. You then break down those functions into ladder programs, sequential function charts (SFCs), or structured text. For typical SFC applications, an SFC program controls the order of events in your process by issuing commands. A command, such as fwd_conv_cmd to move a conveyor forward, is simply a data table storage bit (for example B3:0/7) which you set up in the SFC. You then program the ladder logic for fwd_conv_cmd in a separate ladder program to control the actual outputs to move the conveyor. The ability to have one SFC program defining the sequence and then separate ladder logic programs controlling outputs is the basis of New Platform and Secure PLC-5 processors main control program feature. For more information on this feature, see the next section, titled Using Main Control Programs. If you are using an Original PLC-5 processor, note that you can have only one main program. For information on planning a design specification using only one main program, see Chapter 3 Planning Programs for Your Application. 2-2

11 Planning Programs for Your Application Program Entry In this phase, you enter the programs into your computer using the SFC Editor, Ladder Editor, or Structured Text Editor. For more information on entering SFCs, ladder logic, or structured text, see the PLC 5 A.I. Series Software Reference manual. Testing In this phase, you test the programs you have entered. You may want to consider using RSLogix Emulate 5 processor emulation to simulate your system. Acceptance Once testing is complete, your resulting programs should match your functional specification. 2-3

12 PLC-5 A.I. Series Programming Guide Using Main Control Programs New Platform and Secure processors only New Platform and Secure PLC-5 processors can have up to 16 control programs active in a single PLC-5 processor to control your process. Each of these programs is called a main control program (MCP). This chapter describes the effects of using multiple main control programs and how a New Platform or Secure PLC-5 processor interprets the main control programs. By using several main control programs, you can define one main control program for each particular machine or function of your process. This allows you to separate sequential logic (SFCs) from ladder logic and structured text to subdivide your process and make troubleshooting easier. For example, you can specify an SFC program to define the order of events in the process and separate ladder logic and structured text programs to directly control the outputs. Each of these is a main control program. A main control program can be a sequential function chart, ladder program, or structured text program in any program file numbered 1 through You can use any mix of SFC, ladder, and structured text programs to define up to 16 main control programs. One data table is used by all MCPs (that is, you do not have a separate data table for each MCP). How the Processor Interprets the MCPs The main control programs are scheduled to execute in the order in which you specified on the Processor Configuration screen. An I/O image update and housekeeping takes place after each MCP is completed. After the last MCP is completed, all MCPs are then repeated in the same order. Note that the watchdog setpoint covers one scan of all MCPs. The drawing below shows how the processor interprets MCPs. 2-4

13 Planning Programs for Your Application If the MCP is a ladder program, the program is executed normally (that is, rungs are executed from the first rung to the last, with all timers, counters, jumps and subroutines active). After the END instruction in the ladder program, the processor initiates an I/O update (reading local inputs, writing local outputs, reading remote buffers and writing remote outputs to the buffer). The next MCP is then started. If the MCP is a structured text program, the program is executed normally. After the last line in the structured text program, the processor initiates an I/O update and the next MCP is started. If the MCP is a sequential function chart, only the active steps are scanned and transitions from those active steps are examined; then (after one complete pass through the active steps) the processor initiates an I/O update and the next MCP is started. 2-5

14 PLC-5 A.I. Series Programming Guide Configuring Main Control Programs New Platform and Secure PLC-5 processors only You configure which programs are your main control programs on the Processor Configuration screen. Specifying The Order of Main Control Programs On the Processor Configuration screen, specify the program file number and the order in which the MCPs should be run. This configuration is read before the MCP is executed; if you make a change to the configuration screen regarding an MCP, that change takes effect on the next execution of the MCP. You can also change the MCP information through ladder logic by manipulating the status file. The change then takes effect on the next execution of that MCP. You can have the same program file number specified more than once as a main control program. For example, you may want a program to execute frequently and have a higher priority over other programs. If you do not want to use multiple main programs, program your main SFC (program file 1) or ladder program (program file 2) and the processor will execute your main program. You do not need to make any entries on the Processor Configuration screen (the processor automatically enters the main file in the first MCP entry). For more information on how to specify your program file numbers on the configuration screen, see the PLC 5 A.I. Series Software Reference manual. Disabling Main Control Programs Each MCP has an inhibit bit in the processor status file (S:79). You can set these bits to tell the processor to skip over the MCP until the bit is reset. Disable an MCP if you want to hold a machine state temporarily, regardless of transitions (for example, in machine fault conditions). Disabling an MCP can also help improve scan time; if you know you don t need to run one of your MCPs every scan, you can disable it until you need it.! If you disable an MCP, outputs remain in the state that they were in during the last scan (that is, all actions remain active). Make sure you consider any outputs that might be controlled within that MCP before disabling it. Otherwise, injury to personnel or damage to equipment may result. Note If the disable bit is set for all MCPs, a minor fault occurs to warn you that no MCPs are executing. 2-6

15 Planning Programs for Your Application Monitoring Main Control Programs New Platform and Secure PLC-5 processors only The program scan times for each MCP are stored in the processor status file (S), displaying the previous and maximum scan time. The status file also stores the cumulative scan time, S:8 (the scan time for one complete pass through all MCPs), and the maximum cumulative scan time, S:9. 2-7

16 PLC-5 A.I. Series Programming Guide Using Interrupt Programs If you are using interrupt programs (such as a Selectable Timed Interrupt or a Processor Input Interrupt), they have a higher priority than a main control program. The processor uses the following priorities for programs: 1. Fault Routine 2. Processor Input Interrupt (PII) 3. Selectable Timed Interrupt (STI) 4. Main Control Programs If an interrupt occurs during the execution of an MCP, the processor stops the MCP, executes the interrupt program, and returns control to the MCP at the point that it was stopped. You can protect important parts of your main control programs from interruption by using the User Interrupt Disable (UID) and User Interrupt Enable (UIE) instructions. These instructions allow you to temporarily disable interrupts. If a condition arises that would normally call for the interrupt program, these instructions tell the processor to finish executing the rungs in the MCP first. For more information on these instructions, see the PLC 5 A.I. Series Instruction Set Reference manual. Remember, however, that interrupt programs are re enabled at each END instruction (regardless of the UID state). If you want to completely disable an interrupt program, enter a 0 in the appropriate address of the processor status file. For Original PLC-5 processors, disable the STI by entering 0 in S:31, using the Processor Status screen For New Platform and Secure PLC-5 processors, disable the STI by entering 0 in S:31, and disable the PII by entering 0 in S:46, using the Processor Configuration screen. For more information on disabling interrupts in the status file, see the PLC 5 A.I. Series Software Reference manual. 2-8

17 Designing Programs for Your Application 3 Designing Programs for Your Application Note Based on the model discussed in the previous chapter and the information on using MCPs, this chapter uses a drill machine example to help show how to complete the first two activities in the Program Development Model: functional specification and detailed analysis. Information on the program entry phase is in the remaining chapters of this manual and in the PLC-5 A.I. Series Software Reference manual. If you are using an Original PLC-5 processor, you can use only one main program. You can still apply some of the steps in this chapter, but you must incorporate them into your one main SFC and supporting ladder programs. 3-1

18 PLC-5 A.I. Series Programming Guide Machine Example The following example uses a description of a specific machine operation to show how to identify conditions and actions and how to group the actions into steps of machine operation. The drawing below shows a hardware block diagram. Auto Off Conveyor Motor Load Station Fwd Fwd Fwd Advance Assembly Drill Motor Clamp N.C. LS2 LS3 N.O. LS1 N.O. LS4 N.O. CL1 Held Open LS5 N.O. Unload Station 3-2

19 Designing Programs for Your Application Creating the Functional Specification The functional specification represents a general description of the operation of your process in Auto mode. Based on the drill machine example, this general description might be: 1. The operator starts the conveyor by selecting AUTO. 2. The operator puts a block of wood onto the conveyor. 3. The wood moves into position and actuates LS1. 4. When the wood is in position: a. The conveyor stops. b. CL1 clamps the wood. c. The drill station moves forward. 5. The drill station moves forward and closes LS3. This action turns on the drill motor. 6. The drill station moves to full depth and closes LS4. This action: a. Stops forward motion of the drill station b. Initiates a 2 second dwell 7. The drill station backs up after the 2 second dwell. 8. The drill motor stops when LS3 is released. 9. The drill station reaches home position and opens LS2. This action: a. Stops the reverse motion b. Opens the clamp c. Starts the conveyor forward 10. The wood is ejected when LS5 toggles to indicate the cycle is complete. We recommend that you create a rough draft SFC to represent this general description. An SFC is drawn using a series of boxes and lines. A box represents a step, or one independent machine operation. A transition, shown as a in the drawing below, is a logic condition that lets the processor progress from one step to the next. 3-3

20 PLC-5 A.I. Series Programming Guide initialization 010 AUTO operator starts cycle conveyor forward 011 LS1 wood in position drill 012 LS4 hole drilled dwell 013 TMR1 dwell timer done reverse drill 014 LS2 station home eject 015 LS5 wood ejected For more information on the building blocks of SFC diagrams, see Chapter 4- SFC Building Blocks. 3-4

21 Designing Programs for Your Application Creating the Detailed Analysis Now that you have a functional specification, start filling it in with the details of your process. Identify the hardware requirements. The table below identifies hardware requirements for the inputs and outputs of the drill machine. Input Part Description AUTO selector switch select automatic mode LS1 N.O. limit switch part in place LS2 N.C. limit switch drill station home LS3 N.O. limit switch drill motor on LS4 N.O. limit switch drill station at full depth LS5 N.O. limit switch cycle complete Output Part Description DSF drive motor move drill station forward DSB drive motor move drill station back DM drill motor drill motor on CL1 electric clamp clamp 1 on CMF drive motor move conveyor forward TMR1 timer dwell timer Use the hardware requirements (with the functional specification) to match the inputs and outputs with the actions of the process. The table below shows the hardware requirements with the general description for the drill machine example. When This Happens: Take This Action: AUTO switch closes conveyor moves forward (CMF = on) LS1 closes conveyor stops clamp holds wood drill station advances (CMF = off) (CL1 = on) (DSF = on) LS3 closes drill motor starts (DM = on) LS4 closes drill station stops dwell timer starts (DSF = off) (TMR1 = on) timer done drill station backs up (DSB = on) LS3 opens drill motor stops (DM = off) 3-5

22 PLC-5 A.I. Series Programming Guide When This Happens: LS2 opens LS5 closes Take This Action: drill station stops clamp releases wood conveyor starts wood is ejected (DSB = off) (CL1 = off) (CMF = on) Once you identify the individual actions, you can add these actions to your functional specification to complete the planning of your program. The following drawing shows the detailed analysis of the drill machine example. 3-6

23 Designing Programs for Your Application initialization ladder file 2 init action name 010 AUTO operator starts cycle conveyor forward ladder file action name 3 conv_frwd 011 LS1 wood in position drill ladder file action name 4 clamp_on 5 drill_adv 6 drill_on 012 LS4 hole drilled dwell 013 TMR1 dwell timer done reverse drill ladder file action name 7 rev_drill 8 drill_move 014 LS2 station home eject ladder file action name 9 clamp_off 015 LS5 wood ejected 3-7

24 PLC-5 A.I. Series Programming Guide Now that you have an SFC program that defines the individual machine actions for your process (Process Sequence MCP), you can create a ladder logic program that controls the outputs of those machine actions (Outputs MCP). The order in which you program these rungs does not matter. This program merely contains the ladder logic that defines a command for each machine action in your process. Your Process Sequence MCP determines in what order they are executed. You can also create a Modes MCP that defines the operation of your hardware in the different machine modes (Auto, Manual, Fault, Cycle Start/Stop, etc.). 3-8

25 Designing Programs for Your Application Entering the Program Once you have finished your detailed analysis, that is, you have the MCPs defined and programmed (for example, the drill machine has a Process Sequence MCP, Outputs MCP and a Modes MCP), enter the program into your computer. The example below illustrates what would be entered in the Process Sequence MCP, Outputs MCP and Modes MCP for one step from the drill machine. 3-9

26 PLC-5 A.I. Series Programming Guide Process Sequence MCP drill ladder file action name 4 clamp_on 5 drill_adv 6 drill_on (ladder logic for action) fwd_drill_cmd * 012 LS4 hole drilled Ladder Logic for Outputs MCP Auto Fault mode fwd_drill_cmd * mode * Any symbol can be used for this "command" to control an output. drill station forward Manual mode Jog pushbutton Ladder Logic for Modes MCP (rung that controls Auto mode) Auto pushbutton All_home Manual pushbutton Fault mode Auto mode Auto mode 3-10

27 Designing Programs for Your Application Using Other Processor Programming Features Use your design specification to determine if you need one or more of the following special processor programming features: Power-up routines Time driven interrupt routines Event driven interrupt routines Fault driven interrupt routines The table below explains when to use these special programming features. If a Portion of Logic Should Execute: Immediately upon detecting conditions that require a startup At a specified time interval Immediately when an event occurs Immediately upon detecting a major fault Mark that Portion with a: Power-up/Fault Routine Selectable Timed Interrupt (STI) Processor Input Interrupt (PII) Fault Routine Description: Create a separate file for a controlled start up procedure, for the first time you start a program or when you start a program after system down time. The processor executes the power-up/fault routine to completion. Create a separate program file and specify the interrupt time interval. The processor interrupts the main logic program at the specified interval, runs the STI to completion, then resumes the main logic program where it left off. Create a separate program file and specify 16 inputs of an input word in the I/O rack. When the event(s) occurs, the processor interrupts the main logic program, runs the PII to completion, then resumes the main logic program where it left off. This feature is only available with New Platform and Secure PLC-5 processors. Create a separate file for a controlled response to a major fault. The first fault detected determines which fault routine is executed. The processor executes the fault routine to completion. If the routine clears the fault, the processor resumes the main logic program where it was interrupted. If not, the processor faults and switches to program mode. 3-11

28 PLC-5 A.I. Series Programming Guide Examples of Special Programming Applications The table below describes programming situations that might require special programming features. If the Application is to: Choose a: Eject a faulty bottle from a bottling line Send critical status to a supervisory processor via DH+ after detecting a major fault Monitor machine position every 250ms and calculate the average rate of change Shut down plant floor devices upon detecting a major fault Restart the system after the system has been shut down Take a measurement and compare it with a standard every 1.0 seconds PII Fault routine STI Fault routine Power up routine STI 3-12

29 Designing Programs for Your Application Checking for Completeness When you complete the functional specification and the detailed analysis, review them and check for missing or incomplete information such as: Insufficient input conditions Safety conditions Startup or emergency shutdown routines Alarms and alarm handling Fault detection and fault handling Message display of fault conditions Abnormal operating conditions 3-13

30 SFC Building Blocks 4 SFC Building Blocks Note This chapter describes the components used to create a Sequential Function Chart (SFC) and how to use those components in an SFC. SFCs are somewhat different between Original and New Platform processors. When changing the processor type from an Original to a New Platform processor, SFCs will be converted automatically. The reverse (from New Platform to Original), however, is not true. SFC Building Blocks An SFC uses the following types of building blocks: Step Transition Simple Path Selection Branch Simultaneous Branch GOTO statements and labels Step A step typically represents an independent machine state. One step of ladder logic runs repeatedly, top to bottom, until a logic condition (transition) lets the processor progress to the next step of the chart. You draw a step as a numbered and labeled box in the SFC. The number 007 in the example below represents the ladder file number that contains the ladder logic for that step. 4-1

31 PLC-5 A.I. Series Programming Guide Corresponding ladder logic Mixer 1 } 007 Step New Platform and Secure PLC-5 processors can have up to eight actions per step. An action is a subset of a step. Instead of assigning a single ladder file to a step, you can assign individual ladder files to actions of a step to better represent the individual pieces of your operation. Transition A transition represents the logic condition that lets the processor progress from one step to the next. You draw a transition as a numbered cross below its step (see the following drawing). Corresponding ladder logic 017 } Transition EOT Simple Path Every transition must contain at least one EOT (End of Transition) instruction. A simple path contains a series of steps and transitions that execute one at a time in sequence. 4-2

32 SFC Building Blocks Mixer Dump Selection Branch A selection branch contains alternative paths from which the processor selects one. This is equivalent to an OR structure. Draw a selection branch as parallel paths connected with single horizontal lines (see the drawing below). Notice that transitions are located within the structure s boundaries and are at the top of each parallel path Mixer Mixer Rinse Dump

33 PLC-5 A.I. Series Programming Guide Simultaneous Branch A simultaneous branch runs steps simultaneously that are in parallel paths (the processor shares processing time for each path). This is equivalent to an AND structure. Draw a simultaneous branch as parallel paths connected with double horizontal lines as shown in the following drawing. Notice that a common transition for the last step in all the paths is outside of the branch. The processor finishes running a simultaneous branch when it has scanned each step in each path at least once and the common transition is true. Mixer Dump Mixer Rinse When using simultaneous branches, you may want to include a dummy step at the end of each path to synchronize the simultaneous actions. This dummy step merely holds each path (until all paths have been executed) before moving on to the transition. Using the example above, the structure would look like the following: Mixer Dump Mixer Rinse Dummy Dummy Dummy

34 SFC Building Blocks You can combine SFC building blocks (step, transition, selection branch, and simultaneous branch) to build structures that represent your programming application. GOTO and Label Statements A GOTO statement tells the processor to continue program execution at another location marked with a label. The example below shows a GOTO statement and its associated label. 003: GO TO

35 PLC-5 A.I. Series Programming Guide Drawing an SFC After you identify the major areas of machine operation, convert the logical paths and steps that you labeled in your design specification to SFC building blocks. The table below helps explain when to use which SFC building blocks. Note At this point, do not worry about the actual ladder logic for each step and transition. After you complete the SFC, you can develop the ladder logic. If You Have: Then Draw: Using These Rules: An independent machine state A step/transition pair A step must always be followed by a transition. A clearly defined chain of events that occur sequentially For example, in one heat treating area, the temperature must ramp up at a particular rate, maintain the temperature for a certain duration, then cool at a particular rate. Two or more alternative paths where only one is selected For example, depending on a build code, one station must either drill or polish. Two or more parallel paths that must be scanned at least once For example, communications and block transfers must occur while control logic is executing. A simple path of steps and transitions A selection branch A simultaneous branch For design purposes, number steps and transitions consecutively from 2. Start the path with a step; end the path with a transition. The transitions beginning each path are scanned from left to right. The first true transition determines the path taken. For an Original PLC-5 processor, you can define up to 7 paths in the structure. For a New Platform or Secure PLC-5 processor, you can define up to 16 paths. See How Selection Branches Work on page 4-9. All paths are active in the structure. For an Original PLC-5 processor, you can define up to 7 parallel paths. For a New Platform or Secure PLC-5 processor, you can define up to 16 parallel paths. See How Simultaneous Branches Work on page For special cases, use the rules listed in the following table. 4-6

36 SFC Building Blocks If You Have: To jump within the SFC A step that needs to be run in multiple places within the SFC A step that can be ignored based on logic conditions An SFC branch structure within another branch structure (nesting) To reset the logic in an SFC program To disable a Main Control Program (New Platform and Secure PLC-5 processors only) Then: Use a GOTO statement and label. See Using GOTOs and Labels on page Repeat the step where needed or use a global subroutine that gets called from multiple steps by the same processor. Create two selection branches, one with and one without the step; place the step in a subroutine; or combine the step with another step that is segregated by an MCR zone. Nest the branch structures. The software supports as many levels of nested branches as you can store based on processor memory. Use the SFR instruction to reset the chart. See the Instruction Set Reference manual. Set the disable bit for the MCP on the Processor Configuration screen. See the PLC 5 A.I.Series Software Reference manual. 4-7

37 PLC-5 A.I. Series Programming Guide Example SFC 002 Initial Step

38 SFC Building Blocks How Selection Branches Work When a processor runs a selection branch, the processor finds the path that is true for the program scan and runs the steps and transitions in that path. If more than one path in a selection branch goes true at the same time, the processor chooses the left most path. 4-9

39 PLC-5 A.I. Series Programming Guide How Simultaneous Branches Work When a processor runs the simultaneous branch, the processor scans the branch from left to right, top to bottom. It appears that the processor runs each path in the branch simultaneously. The following drawings show a typical scan sequence. Typical SFC Scan of a Simultaneous Branch Typical SFC Scan of a Simultaneous Branch when a Transition Goes True First: Then: last scan/ post scan false transition true transition false transition false transition false true false false transition transition transition transition step added to list of steps to be scanned first scan 4-10

40 SFC Building Blocks The following table lists considerations for selecting SFC scan sequences. Control Characteristic: When a transition is true, the processor scans that step one last time so that the processor can reset non-retentive outputs. The last step in each path of a simultaneous branch must be executed before the processor scans the common transition. Considerations: Your application may have to consider the extra time for the post scan. If you are using a New Platform or Secure PLC-5 processor, you can configure your SFC program to do a manual reset instead of an automatic reset. The processor cannot exit the simultaneous branch until the last step in each path has been executed. Using GOTOs and Labels GOTO and label statements tell the processor to stop scanning the current path, jump to another step, and continue scanning. General Rules for GOTOs and Labels Each label must have a unique 3 digit number ( ), the same as its corresponding GOTO. You can have up to 250 labels in one SFC. More than one GOTO can jump to the same label. You cannot jump into, out of, or between simultaneous branches. Use sparingly to avoid confusing the flow of the SFC. Rules for Placing GOTOs and Labels You can only place GOTOs at the end of the SFC or after the last transition of a selection branch. You can only place labels immediately before a step or before a simultaneous branch. You cannot place a label between a step and its transition. 4-11

41 PLC-5 A.I. Series Programming Guide Using the SFR Instruction New Platform and Secure PLC-5 processors only The SFR instruction resets the logic in an SFC. When an SFR instruction goes true, the processor performs a postscan/lastscan and then resets the logic in the SFC on the next program scan. The chart remains in this reset state until the instruction goes false. The SFR instruction also resets all retentive actions that are currently active.! Use the SFR instruction with care. Unexpected machine motion could injure personnel. Use the SFR instruction to handle situations that require resetting your machines. For example, if a machine goes out of alignment, use the SFR to reset the chart, align the machine, and then disable the SFR to start the SFC again. For more information on the SFR instruction, refer to the Instruction Set Reference manual. 4-12

42 Writing Ladder Logic 5 Writing Ladder Logic After you have a design specification for your application, you are ready to create the ladder logic. This chapter shows you how to: Convert statements of machine operation into rungs of ladder logic with digital I/O instructions Construct ladder rungs in the correct format Arrange instructions for fast program scan Assign bit addresses to digital I/O instructions 5-1

43 PLC-5 A.I. Series Programming Guide Converting Machine Statements to Ladder Logic Ladder logic is a program written in a format resembling an electrical ladder diagram. A programmable controller uses the program to sense inputs and control outputs. Ladder logic programs: Examine the on/off status of machine devices by reading bit data in the input and output image file Make decisions based on input and output conditions Control the on/off status bit data in the output image file which in turn controls the on/off status of output devices To write ladder logic, you need to understand these definitions: Rung a logic statement that controls one or more bits based on the state of other bits examined. Ladder logic is composed of a listing of rungs. Each rung connects at one point to the left and right power rails. A rung must have at least one output instruction. Input (condition) instructions examine input and output conditions that then determine the true or false state of the instruction. These commands appear on the left side of a rung to the left of the output instructions. A rung may have multiple input instructions. Output (control) instructions control the state of a bit or bits based on input (condition) instructions. These commands are placed on the right side of a rung, to the right of the input instructions. Each rung must have at least one output instruction (or more). 5-2

44 Writing Ladder Logic Rung Logic Example input (condition) instruction elements output instruction elements Rung 1 Rung 2 Rung 3 Rung 4 Rung 5 Note Each input instruction and output instruction you enter generates a rung element. As each input instruction is executed, the addressed bit is examined to see if it matches a certain condition (on or off). If the condition is found (rung 1 above), the rung element is set true. Input instructions must contain a continuous path of true elements from the start of the rung to the output instruction for the output instruction to be enabled. If a rung element is unconditioned (that is, has no input instructions as in rung 4 above), the output instruction is always enabled. The PLC 5 A.I. ladder editor highlights logically true instructions when the processor is in run, remote run, or test mode. Example Discrete I/O Instructions The example rung format above uses the following discrete I/O instructions: Name: Format: Description: If the bit is: ON (1) OFF(0) Examine On An input instruction that examines a bit for an ON condition as follows: Then the instruction is: true false 5-3

45 PLC-5 A.I. Series Programming Guide Name: Output Energize Format: Description: An output instruction that controls the status of one bit (which in turn could control the on/off status of the output device). If the instruction is: Then the bit is: enabled (rung is true) set to 1 disabled (rung is false) reset to zero For information about other available instructions, refer to Allen-Bradley's Instruction Set Reference manual or to the online help in PLC-5 A.I. Series (accessed with the command sequence.uuki or [Shift-F10] then [F4]). 5-4

46 Writing Ladder Logic Constructing Ladder Rungs Writing Rung Logic When you construct ladder rungs, there are guidelines you should follow for writing rung and branch logic. When you write rung logic, follow these guidelines: Sort the actions to be taken from the conditions to be examined for each statement of machine operation. Select the appropriate input instruction for each condition and the appropriate output instruction for each action.! Some input devices and input modules use inverse (negative) logic where a logically true condition turns the bit off, and a logically false condition turns the bit on. If used incorrectly, these instructions can cause unexpected operation with damage to equipment or injury to personnel. Arrange input instructions on the left hand side of the rung as shown in the table below. If you have multiple input conditions and: all conditions must be true to take action (logical AND) Then arrange the instructions: in series ] [ ] [ ] [ any of several conditions must be true to take action (logical OR) in parallel ] [ ] [ ] [ a combination of AND and OR conditions must be true to take action in series and parallel ] [ ] [ ] [ 5-5

47 PLC-5 A.I. Series Programming Guide Arrange output instructions on the right hand side of the rung as shown in the table below. If you program: a single output instruction Then arrange the instruction(s): at the far right ( ) multiple output instructions Note All parallel outputs are enabled when the logic path becomes true. in parallel ( ) ( ) ( ) a conditioned output instruction in a separate output branch ( ) ] [ ( ) Rung Example Label each instruction with the name of the device it examines or controls. You can program as many instructions per rung as you want. A statement of machine operation reads: When LS1 and LS2 are closed, or when SW6 is closed, turn on FAN1 and BULB1. Translate the statement to a rung as follows: The when indicates an input condition. The and indicates serial input conditions The or indicates parallel input conditions. The turn on portion of the statement indicates two outputs (in parallel). When input conditions provide a logically true path across the rung, the rung is true and the outputs are energized. 5-6

48 Writing Ladder Logic The drawing below shows what a rung would look like for the above statement of machine operation with the outputs in parallel. LS1 LS2 FAN1 SW6 BULB1 Writing Branch Logic Whenever you program instructions in parallel, you must create branches. Follow these rules for input and output branching. The number of parallel branches allowed is limited only by processor memory. Branches must not overlap. (A branch cannot start inside another and end outside it.) Branches may, however, be nested. See the section below. For example, this is not allowed: An output branch must end with an output instruction. For example, input instruction (A) is not allowed in that position: Nested Branching A Input and output branches can be nested to avoid redundant instructions and to provide more efficient programming. A nested branch is a branch that starts or ends within another branch. You can nest branches up to four levels deep. 5-7

49 PLC-5 A.I. Series Programming Guide Nested Input and Output Branches ] [ ] [ ] [ ( ) ] [ ] [ ( ) ] [ ] [ ] [ ( ) ] [ ] [ ] [ ] [ Nested branching can be converted into non-nested branches by repeating instructions to make parallel equivalents. A B C F ] [ ] [ ] [ ( ) E ] [ D ] [ Nested Branch A B C F ] [ ] [ ] [ ( ) D ] [ C ] [ E ] [ Non-Nested Equivalent Parallel Branch Execution Time and Branch Structure Considerations In general, non-nested branches are more efficient than nested branches. Both of the examples shown below accomplish the same result with the same number of output instructions; however, the non-nested branching example is evaluated approximately 1 microsecond faster than the nested branching example. 5-8