Assembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice
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1 Assembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice Jumps and iterations conditional and unconditional jumps iterations (loop) implementation of HLL control structures Unconditional jump unconditional transfer of control to the destination specified, syntax: jmp dest Destination specification destination address specified directly (part of instruction, forward/backward) indirectly (register/memory contains the address) direct jumps address specified within instruction relative offset between the destination and instruction following the jmp (!) after the jmp is fetched, EIP updated automatically offset signed number (positive forward jump) relative addresses suitable for dynamically relocatable code (position-independent code) jump destination within a segment destination in the same segment like the jmp instruction (intrasegment jump) till now we considered this type of jump EIP EIP + rel. offset
2 in different segment (intersegment jump, far jump) CS dest. segment EIP dest. offset segment and offset specified within an instruction (for 32-bit. segment instruction size 7B) most of jumps intrasegment, 2 ways of specifying the destination according to the size of rel. offset short jump (2B, 1B op. code + 1B rel. offset, signed number from range -128/+127) near jump (3/5B, 1B op. code + 2/4B rel. offset) 2B rel. offset for 16-bit. segments, 4B for 32-bit segments specification of short jumps (SHORT) we want to use a short jump information for compiler: jmp SHORT ECX_init_done if the destination is farther error message assembler will automatically supply SHORT for backward jumps (if the destination is in valid range) forward jumps assembler doesn't know the destination distance, help of programmer welcome
3 Example: short/near jumps encoding [1] r.167 (2B) specified like a SHORT, op. code EBH, offset 14H r.169 (5B) not specified like a SHORT, assembler assumes NEAR version (op. code E9H, offset AH) r.177 (2B) backward jump, assembler can decide, that NEAR is enough (FDH = -3) r.172 (5B) little endian, offset H
4 Comparison instruction (cmp) setting flags, next conditional jump instruction tests them implementation of HLL construction IF-THEN-ELSE in assembly in two steps arithmetic/compare instruction conditional jump Conditional jumps can be subdivided into three groups according to the value of a single flag according to results of unsigned comparisons according to results of signed comparisons Jumps with single flag test two instructions (0/1) for each status flag except the AF two names available (alias) for ZF, PF zero flag (ZF) jz, je (ZF = 1) jnz, jne (ZF = 0) jecxz (jump if ECX = 0, without testing the flags), jcxz (if CX = 0) carry (CF) jc (CF = 1), jnc (CF = 0) overflow (OF) jo (OF = 1), jno (OF = 0) sign (SF) js (SF = 1), jns (SF = 0) parity (PF) jp, jpe (PF = 1) jnp, jpo (PF = 0)
5 Jumps according to results of unsigned comparisons when comparing two numbers (cmp num1, num2) signed or unsigned numbers? Example: AL = (183/-73) 10, DL = (110) 10 cmp AL, DL AL > DL (unsigned interpretation) AL < DL (signed interpretation) comparison order (cmp num1, num2) always the relation num1 to num2, possible relations (6): num1 = num2, num1 num2 num1 > num2, num1 num2 num1 < num2, num1 num2 for unsigned numbers CF and ZF relevant, aliases available mnemonics je/jz jne/jnz ja/jnbe jae/jnb jb/jnae jbe/jna meaning equal/ zero not equal/ not zero above/ not below or equal above or equal/ not below below/ not above or equal below or equal/ not above condition ZF = 1 ZF = 0 CF = 0 AND ZF = 0 CF = 0 CF = 1 CF = 1 OR ZF = 1
6 Jumps according to results of signed comparisons comparisons =, work in the same way on signed/unsigned numbers for signed numbers relevant flags: SF, OF, ZF mnemonics je/jz jne/jnz jg/jnle jge/jnl jl/jnge jle/jng meaning equal/ zero not equal/ not zero greater/ not less or equal greater or equal/ not less less/ not greater or equal less or equal/ not greater condition ZF = 1 ZF = 0 ZF = 0 AND SF = OF SF = OF SF OF ZF = 1 OR SF OF suppose instruction cmp snum1, snum2: conditions for snum1 > snum2 (jg) conditions for snum1 < snum2 (jl, ZF redundant, ZF=1 SF = OF = 0)
7 Destination distance and conditional jumps conditional jumps SHORT/NEAR (most efficient if encoded like 2B instructions, SHORT) range -128/127 B (SHORT) when this range is not sufficient (condition negation + unconditional jump) Example: LHS code replaced by RHS one [1] Iterations iteration instructions use CX/ECX register (repeat count) according to the operand size (we suppose 32-bit in most cases) decrements the register before the test for zero (without affecting flags) destination range -128/127 B (1B offset) Instructions loop, loope/loopz, loopne/loopnz synonyms (aliases), syntax loop loope loopne dest dest dest instructions loope/loopz, loopne/loopnz support of loops with two termination conditions
8 mnemonics loop loope/loopz loopne/loopnz meaning loop loop while equal/ loop while zero condition ECX = ECX 1 IF ECX 0 jump to dest ECX = ECX 1 IF (ECX 0 AND ZF = 1) jump to dest loop while not equal/ loop while not zero ECX = ECX 1 IF (ECX 0 AND ZF = 0) jump to dest Example: program reads integers from the keyboard, terminates after specified number of integers (SIZE), or zero read %include "asm_io.inc" SIZE EQU 10 segment.bss buffer resd SIZE segment.text global _asm_main _asm_main: enter 0,0 pusha mov EBX,buffer mov ECX,SIZE read_more: call mov add cmp loopne popa mov leave ret read_int [EBX],EAX EBX,4 EAX,0 read_more EAX,0 problem: if at the beginning ECX = 0 (FFFFFFFFH repeats or zero entered) solution: instruction jecxz before entering the loop execution speed of instructions loop and jcxz (optimization purposes) [3] two instructions [2 clock ticks] executed faster than corresponding (loop dest) (5/6 clocks) dec ECX jnz dest two instructions [2 clock ticks] executed faster than corresponding (jecxz dest) (5/6 clocks) cmp ECX,0 jz dest
9 Implementation of HLL control structures using jumping and iteration instructions Construction if-then-else Example: construction if and relational operator (C code assigns bigger of two values (int) to variable bigger) [1] a) C code b) after the translation (Turbo C) condition tested by cmp/jle redundant code generated
10 Example: construction if and logical operator and (test for lower case letter and eventual translation to capital) [1] a) C code b) after the translation (Turbo C, variable ch in DL) combined condition two pairs of cmp/jx instructions redundant code generated (sub DL,32) Iterative constructions constructions like while, repeat-until, for Loop while test of condition before executing the loop (entry-test loop) loop body executed repeatedly, until the condition holds
11 a) C code b) after the translation (Turbo C, variable total in BX) [1] unconditional control transfer at the beginning (condition test) Loop repeat-until condition tested after the loop body execution (exit-test loop) commands in the body executed once at least a) C code b) after the translation (Turbo C, variable number in DI) [1] test realized using or (instead of cmp instruction)
12 Loop for number of iterations fixed (counting loop) a) C code b) after the translation (Turbo C, variable i in SI) [1] unconditional jump at the beginning (condition test) incrementing i (decrementing similarly) Indirect jumps till now instructions of direct jumps (destination address) encoded within the instruction itself we suppose intersegment jumps address of destination specified in R/M specified absolute offset size (offset in direct jumps relative) usage jmp [ECX]
13 Multiway conditional execution for greater number of branches, using if construction often not effective, error prone [1] Construction switch a) C code b) after the translation (Turbo C) jump table in code segment (jump_table) segment prefix CS: (line 11) BX index into table, table items 2B (shl (line 10)) BP counters, local variables
14 Study literature: [1] Dandamudi,S.,P.: Introduction to Assembly Language Programming, Springer Science+Business Media, Inc., [2] Carter, A., P.: PC Assembly Language, 2006, [3] Rafiquzzaman, M.: Microprocessor Theory and Applications with 68000/68020 and Pentium, John Wiley & Sons, Inc., 2008,
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