Overview of Assembly Language

Transcription

1 Overview of Assembly Language Chapter 9 S. Dandamudi Outline Assembly language statements Data allocation Where are the operands? Addressing modes» Register» Immediate» Direct» Indirect Data transfer instructions mov, xchg, and xlat PTR directive Overview of assembly language instructions Arithmetic Conditional Logical Shift Rotate Defining constants EQU and = directives Macros Illustrative examples S. Dandamudi Chapter 9: Page 2 1

2 Assembly Language Statements Three different classes Instructions» Tell CPU what to do» Executable instructions with an op-code Directives (or pseudo-ops)» Provide information to assembler on various aspects of the assembly process» Non-executable Do not generate machine language instructions Macros» A shorthand notation for a group of statements» A sophisticated text substitution mechanism with parameters S. Dandamudi Chapter 9: Page 3 Assembly Language Statements (cont d) Assembly language statement format: [label] mnemonic [operands] [;comment] Typically one statement per line Fields in [ ] are optional label serves two distinct purposes:» To label an instruction Can transfer program execution to the labeled instruction» To label an identifier or constant mnemonic identifies the operation (e.g., add, or) operands specify the data required by the operation» Executable instructions can have zero to three operands S. Dandamudi Chapter 9: Page 4 2

3 Assembly Language Statements (cont d) comments» Begin with a semicolon (;) and extend to the end of the line Examples repeat: inc result ; increment result CR EQU 0DH ; carriage return character White space can be used to improve readability repeat: inc result S. Dandamudi Chapter 9: Page 5 Data Allocation Variable declaration in a high-level language such as C char response int value float total double average_value specifies» Amount storage required (1 byte, 2 bytes, )» Label to identify the storage allocated (response, value, )» Interpretation of the bits stored (signed, floating point, ) Bit pattern is interpreted as 29,255 as a signed number 36,281 as an unsigned number S. Dandamudi Chapter 9: Page 6 3

4 Data Allocation (cont d) In assembly language, we use the define directive Define directive can be used» To reserve storage space» To label the storage space» To initialize»but no interpretation is attached to the bits stored Interpretation is up to the program code Define directive goes into the.data part of the assembly language program Define directive format [var-name] D? init-value [,init-value],... S. Dandamudi Chapter 9: Page 7 Five define directives Data Allocation (cont d) DB Define Byte ;allocates 1 byte DW Define Word ;allocates 2 bytes DD Define Doubleword ;allocates 4 bytes DQ Define Quadword ;allocates 8 bytes DT Define Ten bytes ;allocates 10 bytes Examples sorted DB y response DB? ;no initialization value DW float1 DD float2 DQ S. Dandamudi Chapter 9: Page 8 4

5 Data Allocation (cont d) Multiple definitions can be abbreviated Example message DB DB DB DB DB can be written as message DB More compactly as message DB B y e 0DH 0AH B, y, e,0dh,0ah Bye,0DH,0AH S. Dandamudi Chapter 9: Page 9 Data Allocation (cont d) Multiple definitions can be cumbersome to initialize data structures such as arrays Example To declare and initialize an integer array of 8 elements marks DW 0,0,0,0,0,0,0,0 What if we want to declare and initialize to zero an array of 200 elements? There is a better way of doing this than repeating zero 200 times in the above statement» Assembler provides a directive to do this (DUP directive) S. Dandamudi Chapter 9: Page 10 5

6 Data Allocation (cont d) Multiple initializations The DUP assembler directive allows multiple initializations to the same value Previous marks array can be compactly declared as marks DW 8 DUP (0) Examples table1 DW 10 DUP (?) ;10 words, uninitialized message DB 3 DUP ( Bye! ) ;12 bytes, initialized ; as Bye!Bye!Bye! Name1 DB 30 DUP (? ) ;30 bytes, each ; initialized to? S. Dandamudi Chapter 9: Page 11 Data Allocation (cont d) The DUP directive may also be nested Example stars DB 4 DUP(3 DUP ( * ),2 DUP (? ),5 DUP (! )) Reserves 40-bytes space and initializes it as ***??!!!!!***??!!!!!***??!!!!!***??!!!!! Example matrix DW 10 DUP (5 DUP (0)) defines a 10X5 matrix and initializes its elements to 0 This declaration can also be done by matrix DW 50 DUP (0) S. Dandamudi Chapter 9: Page 12 6

7 Data Allocation (cont d) Symbol Table Assembler builds a symbol table so we can refer to the allocated storage space by the associated label Example.DATA name offset value DW 0 value 0 sum DD 0 sum 2 marks DW 10 DUP (?) marks 6 message DB The grade is:,0 message 26 char1 DB? char1 40 S. Dandamudi Chapter 9: Page 13 Data Allocation (cont d) Correspondence to C Data Types Directive DB DW DD DQ DT C data type char int, unsigned float, long double internal intermediate float value S. Dandamudi Chapter 9: Page 14 7

8 Data Allocation (cont d) LABEL Directive LABEL directive provides another way to name a memory location Format: name LABEL type type can be BYTE WORD DWORD QWORD TWORD 1 byte 2 bytes 4 bytes 8 bytes 10 bytes S. Dandamudi Chapter 9: Page 15 Data Allocation (cont d) LABEL Directive Example.DATA count LABEL WORD Lo-count DB 0 Hi_count DB 0.CODE... mov Lo_count,AL mov Hi_count,CL count refers to the 16-bit value Lo_count refers to the low byte Hi_count refers to the high byte S. Dandamudi Chapter 9: Page 16 8

9 Where Are the Operands? Operands required by an operation can be specified in a variety of ways A few basic ways are: operand in a register register addressing mode operand in the instruction itself immediate addressing mode operand in memory variety of addressing modes direct and indirect addressing modes operand at an I/O port discussed in Chapter 19 S. Dandamudi Chapter 9: Page 17 Where Are the Operands? (cont d) Register addressing mode Operand is in an internal register Examples mov EAX,EBX ; 32-bit copy mov BX,CX ; 16-bit copy mov AL,CL ; 8-bit copy The mov instruction mov destination,source copies data from source to destination S. Dandamudi Chapter 9: Page 18 9

10 Where Are the Operands? (cont d) Register addressing mode (cont d) Most efficient way of specifying an operand» No memory access is required Instructions using this mode tend to be shorter» Fewer bits are needed to specify the register Compilers use this mode to optimize code total := 0 for (i = 1 to 400) total = total + marks[i] end for Mapping total and i to registers during the for loop optimizes the code S. Dandamudi Chapter 9: Page 19 Where Are the Operands? (cont d) Immediate addressing mode Data is part of the instruction» Ooperand is located in the code segment along with the instruction» Efficient as no separate operand fetch is needed» Typically used to specify a constant Example mov AL,75 This instruction uses register addressing mode for destination and immediate addressing mode for the source S. Dandamudi Chapter 9: Page 20 10

11 Where Are the Operands? (cont d) Direct addressing mode Data is in the data segment» Need a logical address to access data Two components: segment:offset» Various addressing modes to specify the offset component offset part is called effective address The offset is specified directly as part of instruction We write assembly language programs using memory labels (e.g., declared using DB, DW, LABEL,...)» Assembler computes the offset value for the label Uses symbol table to compute the offset of a label S. Dandamudi Chapter 9: Page 21 Where Are the Operands? (cont d) Direct addressing mode (cont d) Examples mov mov AL,response» Assembler replaces response by its effective address (i.e., its offset value from the symbol table) table1,56» table1 is declared as table1 DW 20 DUP (0)» Since the assembler replaces table1 by its effective address, this instruction refers to the first element of table1 In C, it is equivalent to table1[0] = 56 S. Dandamudi Chapter 9: Page 22 11

12 Where Are the Operands? (cont d) Direct addressing mode (cont d) Problem with direct addressing Useful only to specify simple variables Causes serious problems in addressing data types such as arrays» As an example, consider adding elements of an array Direct addressing does not facilitate using a loop structure to iterate through the array We have to write an instruction to add each element of the array Indirect addressing mode remedies this problem S. Dandamudi Chapter 9: Page 23 Where Are the Operands? (cont d) Indirect addressing mode The offset is specified indirectly via a register Sometimes called register indirect addressing mode For 16-bit addressing, the offset value can be in one of the three registers: BX, SI, or DI For 32-bit addressing, all 32-bit registers can be used Example mov AX,[BX] Square brackets [ ] are used to indicate that BX is holding an offset value» BX contains a pointer to the operand, not the operand itself S. Dandamudi Chapter 9: Page 24 12

13 Where Are the Operands? (cont d) Using indirect addressing mode, we can process arrays using loops Example: Summing array elements Load the starting address (i.e., offset) of the array into BX Loop for each element in the array» Get the value using the offset in BX Use indirect addressing» Add the value to the running total» Update the offset in BX to point to the next element of the array S. Dandamudi Chapter 9: Page 25 Where Are the Operands? (cont d) Loading offset value into a register Suppose we want to load BX with the offset value of table1 We cannot write mov BX,table1 Two ways of loading offset value» Using OFFSET assembler directive Executed only at the assembly time»using lea instruction This is a processor instruction Executed at run time S. Dandamudi Chapter 9: Page 26 13

14 Where Are the Operands? (cont d) Loading offset value into a register (cont d) Using OFFSET assembler directive The previous example can be written as mov BX,OFFSET table1 Using lea (load effective address) instruction The format of lea instruction is lea register,source The previous example can be written as lea BX,table1 S. Dandamudi Chapter 9: Page 27 Where Are the Operands? (cont d) Loading offset value into a register (cont d) Which one to use -- OFFSET or lea? Use OFFSET if possible» OFFSET incurs only one-time overhead (at assembly time)» lea incurs run time overhead (every time you run the program) May have to use lea in some instances» When the needed data is available at run time only An index passed as a parameter to a procedure» We can write lea BX,table1[SI] to load BX with the address of an element of table1 whose index is in SI register» We cannot use the OFFSET directive in this case S. Dandamudi Chapter 9: Page 28 14

15 Default Segments In register indirect addressing mode 16-bit addresses» Effective addresses in BX, SI, or DI is taken as the offset into the data segment (relative to DS)» For BP and SP registers, the offset is taken to refer to the stack segment (relative to SS) 32-bit addresses» Effective address in EAX, EBX, ECX, EDX, ESI, and EDI is relative to DS» Effective address in EBP and ESP is relative to SS push and pop are always relative to SS S. Dandamudi Chapter 9: Page 29 Default Segments (cont d) Default segment override Possible to override the defaults by using override prefixes» CS, DS, SS, ES, FS, GS Example 1» We can use add AX,SS:[BX] to refer to a data item on the stack Example 2» We can use add AX,DS:[BP] to refer to a data item in the data segment S. Dandamudi Chapter 9: Page 30 15

16 Data Transfer Instructions We will look at three instructions mov (move)» Actually copy xchg (exchange)» Exchanges two operands xlat (translate)» Translates byte values using a translation table Other data transfer instructions such as movsx (move sign extended) movzx (move zero extended) are discussed in Chapter 12 S. Dandamudi Chapter 9: Page 31 Data Transfer Instructions (cont d) The mov instruction The format is mov destination,source» Copies the value from source to destination» source is not altered as a result of copying» Both operands should be of same size» source and destination cannot both be in memory Most Pentium instructions do not allow both operands to be located in memory Pentium provides special instructions to facilitate memory-to-memory block copying of data S. Dandamudi Chapter 9: Page 32 16

17 Data Transfer Instructions (cont d) The mov instruction Five types of operand combinations are allowed: Instruction type Example mov register,register mov DX,CX mov register,immediate mov BL,100 mov register,memory mov BX,count mov memory,register mov count,si mov memory,immediate mov count,23 The operand combinations are valid for all instructions that require two operands S. Dandamudi Chapter 9: Page 33 Data Transfer Instructions (cont d) Ambiguous moves: PTR directive For the following data definitions.data table1 DW 20 DUP (0) status DB 7 DUP (1) the last two mov instructions are ambiguous mov BX,OFFSET table1 mov SI,OFFSET status mov [BX],100 mov [SI],100 Not clear whether the assembler should use byte or word equivalent of 100 S. Dandamudi Chapter 9: Page 34 17

18 Data Transfer Instructions (cont d) Ambiguous moves: PTR directive The PTR assembler directive can be used to clarify The last two mov instructions can be written as mov mov WORD PTR [BX],100 BYTE PTR [SI],100 WORD and BYTE are called type specifiers We can also use the following type specifiers: DWORD for doubleword values QWORD for quadword values TWORD for ten byte values S. Dandamudi Chapter 9: Page 35 Data Transfer Instructions (cont d) The xchg instruction The syntax is xchg operand1,operand2 Exchanges the values of operand1 and operand2 Examples xchg xchg xchg EAX,EDX response,cl total,dx Without the xchg instruction, we need a temporary register to exchange values using only the mov instruction S. Dandamudi Chapter 9: Page 36 18

19 Data Transfer Instructions (cont d) The xchg instruction The xchg instruction is useful for conversion of 16-bit data between little endian and big endian forms Example: mov AL,AH converts the data in AX into the other endian form Pentium provides bswap instruction to do similar conversion on 32-bit data bswap 32-bit register bswap works only on data located in a 32-bit register S. Dandamudi Chapter 9: Page 37 Data Transfer Instructions (cont d) The xlat instruction The xlat instruction translates bytes The format is xlatb To use xlat instruction» BX should be loaded with the starting address of the translation table» AL must contain an index in to the table Index value starts at zero» The instruction reads the byte at this index in the translation table and stores this value in AL The index value in AL is lost» Translation table can have at most 256 entries (due to AL) S. Dandamudi Chapter 9: Page 38 19

20 Data Transfer Instructions (cont d) The xlat instruction Example: Encrypting digits Input digits: Encrypted digits: DATA xlat_table DB CODE mov BX,OFFSET xlat_table GetCh AL sub AL, 0 ; converts input character to index xlatb ; AL = encrypted digit character PutCh AL... S. Dandamudi Chapter 9: Page 39 Pentium Assembly Instructions Pentium provides several types of instructions Brief overview of some basic instructions: Arithmetic instructions Jump instructions Loop instruction Logical instructions Shift instructions Rotate instructions These instructions allow you to write reasonable assembly language programs S. Dandamudi Chapter 9: Page 40 20

21 INC and DEC instructions Arithmetic Instructions Format: inc destination dec destination Semantics: destination = destination +/- 1» destination can be 8-, 16-, or 32-bit operand, in memory or register No immediate operand Examples inc dec BX value S. Dandamudi Chapter 9: Page 41 Arithmetic Instructions (cont d) Add instructions Format: add destination,source Semantics: destination = destination + source Examples add add EBX,EAX value,35 inc EAX is better than add EAX,1 inc takes less space Both execute at about the same speed S. Dandamudi Chapter 9: Page 42 21

22 Arithmetic Instructions (cont d) Add instructions Addition with carry Format: adc destination,source Semantics: destination = destination + source + CF Example: 64-bit addition add EAX,ECX ; add lower 32 bits adc EBX,EDX ; add upper 32 bits with carry 64-bit result in EBX:EAX S. Dandamudi Chapter 9: Page 43 Arithmetic Instructions (cont d) Subtract instructions Format: sub destination,source Semantics: destination = destination - source Examples sub sub EBX,EAX value,35 dec EAX is better than sub EAX,1 dec takes less space Both execute at about the same speed S. Dandamudi Chapter 9: Page 44 22

23 Arithmetic Instructions (cont d) Subtract instructions Subtract with borrow Format: sbb destination,source Semantics: destination = destination - source - CF Like the adc, sbb is useful in dealing with more than 32-bit numbers Negation neg destination Semantics: destination = 0 - destination S. Dandamudi Chapter 9: Page 45 Arithmetic Instructions (cont d) CMP instruction Format: cmp destination,source Semantics: destination - source destination and source are not altered Useful to test relationship (>, =) between two operands Used in conjunction with conditional jump instructions for decision making purposes Examples cmp EBX,EAX cmp count,100 S. Dandamudi Chapter 9: Page 46 23

24 Format: jmp label Unconditional Jump Semantics:» Execution is transferred to the instruction identified by label Target can be specified in one of two ways Directly» In the instruction itself Indirectly» Through a register or memory» Discussed in Chapter 12 S. Dandamudi Chapter 9: Page 47 Unconditional Jump (cont d) Example Two jump instructions Forward jump jmp CX_init_done Backward jump jmp repeat1 Programmer specifies target by a label Assembler computes the offset using the symbol table... mov CX,10 jmp CX_init_done init_cx_20: mov CX,20 CX_init_done: mov AX,CX repeat1: dec CX... jmp repeat1... S. Dandamudi Chapter 9: Page 48 24

25 Unconditional Jump (cont d) Address specified in the jump instruction is not the absolute address Uses relative address» Specifies relative byte displacement between the target instruction and the instruction following the jump instruction» Displacement is w.r.t the instruction following jmp Reason: IP points to this instruction after reading jump Execution of jmp involves adding the displacement value to current IP Displacement is a signed 16-bit number» Negative value for backward jumps» Positive value for forward jumps S. Dandamudi Chapter 9: Page 49 Target Location Inter-segment jump Target is in another segment CS = target-segment (2 bytes) IP = target-offset (2 bytes)» Called far jumps (needs five bytes to encode jmp) Intra-segment jumps Target is in the same segment IP = IP + relative-displacement (1 or 2 bytes) Uses 1-byte displacement if target is within 128 to +127» Called short jumps (needs two bytes to encode jmp) If target is outside this range, uses 2-byte displacement» Called near jumps (needs three bytes to encode jmp) S. Dandamudi Chapter 9: Page 50 25

26 Target Location (cont d) In most cases, the assembler can figure out the type of jump For backward jumps, assembler can decide whether to use the short jump form or not For forward jumps, it needs a hint from the programmer Use SHORT prefix to the target label If such a hint is not given» Assembler reserves three bytes for jmp instruction» If short jump can be used, leaves one byte of nop (no operation) See the next example for details S. Dandamudi Chapter 9: Page 51 Example EB 0C jmp SHORT CX_init_done = 0C B9 000A mov CX, A EB jmp CX_init_done nop D = init_cx_20: D B mov CX, E9 00D0 jmp near_jump 00E = D0 14 CX_init_done: B C1 mov AX,CX S. Dandamudi Chapter 9: Page 52 26

27 Example (cont d) 16 repeat1: dec CX EB FD jmp repeat = -3 = FDH DB EB 03 jmp SHORT short_jump 00E0-00DD = DD B9 FF00 mov CX, 0FF00H 86 short_jump: 87 00E0 BA 0020 mov DX, 20H 88 near_jump: 89 00E3 E9 FF27 jmp init_cx_20 000D - 00E6 = -217 = FF27H S. Dandamudi Chapter 9: Page 53 Conditional Jumps (cont d) Format: j<cond> lab Execution is transferred to the instruction identified by label only if <cond> is met Example: Testing for carriage return read_char:... cmp AL,0DH ; 0DH = ASCII carriage return je CR_received inc CL jmp read_char... CR_received: S. Dandamudi Chapter 9: Page 54 27

28 Conditional Jumps (cont d) Some conditional jump instructions Treats operands of the CMP instruction as signed numbers je jg jl jge jle jne jump if equal jump if greater jump if less jump if greater or equal jump if less or equal jump if not equal S. Dandamudi Chapter 9: Page 55 Conditional Jumps (cont d) Conditional jump instructions can also test values of the individual flags jz jump if zero (i.e., if ZF = 1) jnz jump if not zero (i.e., if ZF = 0) jc jump if carry (i.e., if CF = 1) jnc jump if not carry (i.e., if CF = 0) jz is synonymous for je jnz is synonymous for jne S. Dandamudi Chapter 9: Page 56 28

29 target:... cmp AX,BX je target mov CX,10... A Note on Conditional Jumps All conditional jumps are encoded using 2 bytes Treated as short jumps What if the target is outside this range? traget is out of range for a short jump Use this code to get around target:... cmp AX,BX jne skip1 jmp target skip1: mov CX,10... S. Dandamudi Chapter 9: Page 57 Loop Instructions Unconditional loop instruction Format: loop target Semantics:» Decrements CX and jumps to target if CX 0 CX should be loaded with a loop count value Example: Executes loop body 50 times mov CX,50 repeat: <loop body> loop repeat... S. Dandamudi Chapter 9: Page 58 29

30 Loop Instructions (cont d) The previous example is equivalent to mov CX,50 repeat: <loop body> dec CX Surprisingly, dec jnz repeat... jnz CX repeat executes faster than loop repeat S. Dandamudi Chapter 9: Page 59 Loop Instructions (cont d) Conditional loop instructions loope/loopz» Loop while equal/zero CX = CX 1 ff (CX = 0 and ZF = 1) jump to target loopne/loopnz» Loop while not equal/not zero CX = CX 1 ff (CX = 0 and ZF = 0) jump to target S. Dandamudi Chapter 9: Page 60 30

31 Logical Instructions Format: and destination,source or destination,source xor destination,source not destination Semantics:» Performs the standard bitwise logical operations result goes to destination test is a non-destructive and instruction test destination,source Performs logical AND but the result is not stored in destination (like the CMP instruction) S. Dandamudi Chapter 9: Page 61 Example:... Logical Instructions (cont d) and jz AL,01H ; test the least significant bit bit_is_zero <bit 1 code> jmp skip1 bit_is_zero: <bit 0 code> skip1:... test instruction is better in place of and S. Dandamudi Chapter 9: Page 62 31

32 Shift Instructions Two types of shifts» Logical» Arithmetic Logical shift instructions Shift left shl destination,count shl destination,cl Shift right shr destination,count shr destination,cl Semantics:» Performs left/right shift of destination by the value in count or CL register CL register contents are not altered S. Dandamudi Chapter 9: Page 63 Logical shift Shift Instructions (cont d) Bit shifted out goes into the carry flag» Zero bit is shifted in at the other end S. Dandamudi Chapter 9: Page 64 32

33 Shift Instructions (cont d) count is an immediate value shl AX,5 Specification of count greater than 31 is not allowed» If a greater value is specified, only the least significant 5 bits are used CL version is useful if shift count is known at run time» Ex: when the shift count value is passed as a parameter in a procedure call» Only the CL register can be used Shift count value should be loaded into CL mov CL,5 shl AX,CL S. Dandamudi Chapter 9: Page 65 Arithmetic shift Shift Instructions (cont d) Two versions as in logical shift sal/sar destination,count sal/sar destination,cl S. Dandamudi Chapter 9: Page 66 33

34 Double Shift Instructions Double shift instructions work on either 32- or 64- bit operands Format Takes three operands shld dest,src,count ; left shift shrd dest,src,count ; right shift dest can be in memory or register src must be a register count can be an immediate value or in CL as in other shift instructions S. Dandamudi Chapter 9: Page 67 Double Shift Instructions (cont d) src is not modified by doubleshift instruction Only dest is modified Shifted out bit goes into the carry flag S. Dandamudi Chapter 9: Page 68 34

35 Rotate Instructions Two types of ROTATE instructions Rotate without carry» rol (ROtate Left)» ror (ROtate Right) Rotate with carry» rcl (Rotate through Carry Left)» rcr (Rotate through Carry Right) Format of ROTATE instructions is similar to the SHIFT instructions» Supports two versions Immediate count value Count value in CL register S. Dandamudi Chapter 9: Page 69 Rotate Instructions (cont d) Bit shifted out goes into the carry flag as in SHIFT instructions S. Dandamudi Chapter 9: Page 70 35

36 Rotate Instructions (cont d) Bit shifted out goes into the carry flag as in SHIFT instructions S. Dandamudi Chapter 9: Page 71 Rotate Instructions (cont d) Example: Shifting 64-bit numbers Multiplies a 64-bit value in EDX:EAX by 16» Rotate version mov CX,4 shift_left: shl EAX,1 rcl EDX,1 loop shift_left» Doubleshift version shld EDX,EAX,4 shl EAX,4 Division can be done in a similar a way S. Dandamudi Chapter 9: Page 72 36

37 Defining Constants Assembler provides two directives:» EQU directive No reassignment String constants can be defined» = directive Can be reassigned No string constants Defining constants has two advantages: Improves program readability Helps in software maintenance» Multiple occurrences can be changed from a single place Convention» We use all upper-case letters for names of constants S. Dandamudi Chapter 9: Page 73 Defining Constants (cont d) The EQU directive Syntax: name EQU expression Assigns the result of expression to name The expression is evaluated at assembly time Similar to #define in C Examples NUM_OF_ROWS EQU 50 NUM_OF_COLS EQU 10 ARRAY_SIZE EQU NUM_OF_ROWS * NUM_OF_COLS Can also be used to define string constants JUMP EQU jmp S. Dandamudi Chapter 9: Page 74 37

38 Defining Constants (cont d) The = directive Syntax: name = expression Similar to EQU directive Two key differences:» Redefinition is allowed count = 0... count = 99 is valid» Cannot be used to define string constants or to redefine keywords or instruction mnemonics Example: JUMP = jmp is not allowed S. Dandamudi Chapter 9: Page 75 Macros Macros can be defined with MACRO and ENDM Format macro_name MACRO[parameter1, parameter2,...] macro body ENDM A macro can be invoked using macro_name [argument1, argument2, ] Example: Definition Invocation multax_by_16 MACRO... sal AX,4 mov AX,27 ENDM multax_by_16... S. Dandamudi Chapter 9: Page 76 38

39 Macros (cont d) Macros can be defined with parameters» More flexible» More useful Example mult_by_16 MACRO operand sal operand,4 ENDM To multiply a byte in DL register mult_by_16 DL To multiply a memory variable count mult_by_16 count S. Dandamudi Chapter 9: Page 77 Macros (cont d) Example: To exchange two memory words Memory-to-memory transfer Wmxchg MACRO operand1, operand2 xchg AX,operand1 xchg AX,operand2 xchg AX,operand1 ENDM S. Dandamudi Chapter 9: Page 78 39

40 Illustrative Examples Five examples in this chapter Conversion of ASCII to binary representation (BINCHAR.ASM) Conversion of ASCII to hexadecimal by character manipulation (HEX1CHAR.ASM) Conversion of ASCII to hexadecimal using the XLAT instruction (HEX2CHAR.ASM) Conversion of lowercase letters to uppercase by character manipulation (TOUPPER.ASM) Sum of individual digits of a number (ADDIGITS.ASM) Last slide S. Dandamudi Chapter 9: Page 79 40