Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)

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Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester

1 Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of the module total Lecturer: Coordinator: Internal Examiner: Dr. Qadri Hamarsheh Dr. Qadri Hamarsheh Dr. Naser Halasa

2 Marking Scheme Microprocessors (630313) The presented exam questions are organized to overcome course material, the exam contains 6 questions; all questions are compulsory requested to be answered. Thus, the student is permitted to answer any question out of the existing ones in this section. Marking Assignments The following scheme shows the marks assignments for each question. They show also the steps for which a student can get marks along the related procedure he/she achieves. Question 1This question is attributed with 25 points if answered properly 1) One of the following microprocessors has a built in math co-processor in a single chip c) d) ) The operands, source and destination in an instruction cannot be register, register memory location, register c) memory location, memory location d) immediate data, register 3) The register which has a special role in multiply and divides operations is AX BX c) CX d) DX 4) Which directive is used when defining BCD numbers? QWORD FWORD c) TBYTE d) DWORD 5) The TEXTEQU directive allows a constant to be redefined at any point in a program at run time. True False 6) The instruction TEST is most similar to OR AND c) XOR d) NOT 7) Number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00h A1: INC AL JNZ A1 0 1 c) 255 d) 256 8) Given that the BL register contains B, which of the following instructions will change BL so that it contains 'b' and BL, or BL, c) or BL, d) and BL, Assume the following same initial processor state to answer questions (9), and (10) below. Treat each part individually. AX BX CX DX 6521 H ABCD H 0105 H 876F H C A Z S P O FLAGS 9) What will be the contents of AX after SUB AL, AH 65BC H BC21 H c) 4421 H d) 6544 H 10) What are the flags after CMP AH, CL C=1, Z=0, S=1 C=0, Z=1, S=0 c) C=0, Z=0, S=0 d) C=0, Z=1, S=1

3 Question 2 This question is attributed with 16 points if answered properly Ñ Instruction Answer c) 1) SUB AL, Arr_Byte V 2) mov DS, Arr_DwordSIZE I 3) Name Byte 100 dup(?) V 4) mov Arr_Byte, Arr_Dword I 5) ADD [BX], 3H I mov esi, OFFSET Arr_Bytes mov ax, [esi] ; a. AX = 2010h b. EAX =003B008Ah mov eax, DWORD PTR Arr_Words ; mov esi, Ptr_DoubleWords mov ax, [esi+2] ; c. AX =0 mov ax, [esi+6] ; d. AX =0 mov ax, [esi-4] ; e. AX =0044h EAX = d) e) Or AX, 0FF00h edx = h Question 3 This question is attributed with 20 points, if answered properly. (12 points) Registers of Microprocessor 8086 Intel 16-bit registers AX is used for the accumulator because it is favored by the CPU for arithmetic operations. BX is used for base addressing register hold the address of a procedure or variable. Three other registers with this ability are SI, DI and BP. The BX register can also perform arithmetic and data movement. CX is used for counter loop operations. These instructions automatically repeat and decrement CX. DX is used to point out data in I/O operations DX register has a special role in multiply and divide operation. 1. Segment Registers: the CPU contain four segment registers, used as base location for program instruction, and for the stack. CS (Code Segment): The code segment register holds the base address of all executable instructions (code) in a program. DS (Data Segment): the data segment register is the default base location for variables. SS (Stack Segment): the stack segment register contain the base location of the stack. ES (Extra Segment): The extra segment register is an additional base location for memory variables. 2. Index registers: index registers contain the offset of data and instructions. The term offset refers to the distance of a variable, label, or instruction from its base segment. The index registers are: BP (Base Pointer): the BP register contain an assumed offset from the stack segment register, as does the stack pointer. SP (Stack Pointer): the stack pointer register contain the offset of the top of the stack. The stack pointer and the stack segment register combine to form the complete address of the top of the stack.

4 SI (Source Index): This register takes its name from the string movement instruction DI (Destination Index): the DI register acts as the destination for string movement instruction. 3. Status and Control register: IP (Instruction Pointer): The instruction pointer register always contain the offset of the next instruction to be executed within the current code segment. The instruction pointer and the code segment register combine to form the complete address of the next instruction. Flag Registers and bit fields CF, the Carry Flag: This flag is set whenever there is a carry out, either from d7 after an 8-bit operation or from d15 after a 16-bit data operation. if the sum of 71 and 99 where stored in the 8-bit register AL, the result cause the carry flag to be 1. The flag values = 1 = carry, 0 = no carry. PF, the Parity Flag: After certain operations, the parity of the result s low-order byte is checked. If the byte has an even number of 1s, the parity flag is set to 1; otherwise, it is cleared. This flag is used by the OS to verify memory integrity and by communication software to verify the correct transmission of data. AF, the Auxiliary Carry Flag: If there is a carry from d3 to d4 (or borrow from bit 4 to bit 3) of an operation this bit is set to 1, otherwise cleared (set to 0). ZF, the Zero Flag: The ZF is set to 1 if the result of the arithmetic or logical operation is zero; otherwise, it is cleared (set to 0). SF, the Sign Flag: MSB is used as the sign bit of the binary representation of the signed numbers. After arithmetic or logical operations the MSB is copied into SF to indicate the sign of the result. The flag values 1=negative, 0 = positive OF, the Overflow Flag: This flag is set whenever the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit. The flag values 1 = overflow, 0 = no overflow. TF, the Trap Flag: When this flag is set it allows the program to single step, meaning to execute one instruction at a time. Used for debugging purposes. The flag values are 1 = on, 0 = off. IF, Interrupt Enable Flag: This bit is set or cleared to enable or disable only the external interrupt requests as keyboard, disk drive, and the system clock timer. The flag values are 1= enable, 0 = disable. DF, the Direction Flag: This bit is used to control the direction of the string operations and used for block data transfer instructions, such as MOVS, CMPS, SCAS, it selects increment or decrement mode for the DI and/or SI registers. (8 points) CMP (Comparison): The comparison instruction (CMP) is a subtraction that changes only the flag bits; the destination operand never changes. A comparison is useful for checking the entire contents of a register or a memory location against another value. A CMP is normally followed by a conditional jump instruction, which tests the condition of the flag bits, The destination and source operands can be unsigned or signed CMP destination, source CMP AL,[DI] LAHF transfers the rightmost 8 bits of the flag-register into the AH register (the SF, ZF, AF, PF, and CF). XCHG: This exchanges contents of a register with contents of any other register or memory location.this can exchange either byte or word, etc. This cannot exchange segment registers or memory-to-memory data. This can use any addressing-mode except immediate addressing. XCHG instruction, using the 16-bit AX register with another 16-bit register, is the most efficient exchange. XCHG AL,[DI] TEST: The TEST instruction performs the AND operation. The difference is that the AND instruction changes the destination operand, while the TEST instruction does not. A TEST only affects the condition of the flag register, which indicates the result of the test. Test AX, BX

5 Question 4 This question is attributed with 10 points, if answered properly. BH = 20 DH = 99 Question 5 This question is attributed with 11 points, if answered properly. The complete code for this question as the following: c) call Clrscr mov eax, 500 call Delay call DumpRegs (3 points) (4 points).data arrayd DWORD 1000h,2000h,3000h mov esi, OFFSET arrayd ; starting OFFSET mov ecx, LENGTHOF arrayd ; number of units in dwordval mov ebx, TYPE arrayd ; size of a doubleword call DumpMem ; display memory call Crlf ; new line (4 points).data prompt1 BYTE "Enter a 32-bit signed integer: ",0 mov edx,offset prompt1 call WriteString call Crlf ; new line call ReadInt ; input the integer call WriteInt ; display in signed decimal call Crlf call WriteHex ; display in hexadecimal call Crlf call WriteBin ; display in binary call Crlf

6 Question 6 This question is attributed with 18 points, if answered properly. ;locate procedure ; Receives: esi = string address ; ecx = string size ; AL = character to be located ; Returns: ebx = position of found character OR negative value (-1) locate PROC USES ecx jecxz notfound mov ebx,1 L1: cmp AL, [esi] ; string character = search character? je found ; yes? found character inc esi ; no? point to next string character inc ebx loop L1 notfound: mov ebx, -1 ; if not found then ebx = -1 found: ret ; if found, si = element address locate ENDP Locate_Charater.asm Title locate (search) a character in a given string Locate_Charater.asm.Model flat, stdcall.data str Byte 'Enter the string' char Byte 'm' msg1 Byte " character found at position ", 0 msg2 Byte " character not found ",0 Main Proc Mov ecx, lengthof str Mov esi, Offset str Mov al, char Call locate (3 points) cmp ebx, -1 je notfound Mov edx, Offset msg1 call WriteString Mov eax, ebx call WriteDec call crlf jmp Quit notfound: Mov dx, Offset msg2 call WriteString call crlf Quit: Exit Main ENDP End Main (4 points)

Marking Scheme. Examination Paper. Module: Microprocessors (630313)

Marking Scheme. Examination Paper. Module: Microprocessors (630313) Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of