Chapter 12. Selected Pentium Instructions
|
|
- Elmer Patrick
- 5 years ago
- Views:
Transcription
1 Chapter 12 Selected Pentium Instructions 1
2 2 Chapter Carry flag indicates out-of-range error for unsigned operations.
3 Chapter Overflow flag indicates out-of-range error for signed operations.
4 4 Chapter Sign flag is a copy of the most significant bit of the result. We can detect this by several methods. Couple of them are given below: Use shift left (SHL) instruction to move the sign bit into the carry flag. Use and 80H and test the zero flag
5 Chapter Parity flag is set when the least significant byte of the result contains even number of 1 bits (i.e., even parity). This flag is useful in parity generation.
6 6 Chapter When executing sub dest,src if CF is set, it indicated that src is greater than dest operand when these two operand are treated as unsigned numbers.
7 Chapter If the overflow flag is set, src is greater than dest operand when these two operands are treated as signed numbers.
8 8 Chapter No. The carry flag is set when src is greater than dest whereas ZF is set when they are equal.
9 Chapter No. The overflow flag is set when src is greater than dest whereas ZF is set when they are equal.
10 10 Chapter When the result contains even number of 1s (except the zero result), the parity flag is set but not the zero flag.
11 Chapter The following code implements a count-down loop using the zero flag: mov CX,count repeat1: <<loop body>> dec CX jnz repeat1 The above code is better than the count-up loop implementation shown below: mov CX,0 repeat1: <<loop body>> inc CX cmp CX,count jne repeat1
12 12 Chapter AL CF ZF SF OF PF mov AL,127 add AL,-128 FF mov AL,127 sub AL,-128 FF mov AL,-1 add AL, mov AL,127 inc AL mov AL,127 neg AL mov AL,0 neg AL
13 Chapter Before execution After execution Instruction AL BL AL ZF SF PF and AL,BL 79H 86H or AL,BL 79H 86H FFH xor AL,BL 79H 86H FFH test AL,BL 79H 86H 79H and AL,BL 36H 24H 24H or AL,BL 36H 24H 36H xor AL,BL 36H 24H 12H test AL,BL 36H 24H 36H 0 0 1
14 14 Chapter Before execution After execution Instruction AL CF AL CF shl AL,1 1? FFH 1 rol AL,1 1? FFH 1 shr AL,1 50? 19H 0 ror AL,1 50? 19H 0 sal AL,1 20? D8H 1 sar AL,1 20? F6H 0 rcl AL, D9H 1 rcr AL, F6H 0
15 Chapter Before execution After execution Instruction AL CF AL CF shl AL,CL 76H? B0H 1 sal AL,CL 76H? B0H 1 rcl AL,CL 76H 1 B5H 1 rcr AL,CL 76H 1 AEH 1 ror AL,CL 76H? CEH 1 rol AL,CL 76H? B3H 1
16 16 Chapter The reason is that in unsigned numbers, there is no sign bit; even the most significant bit represents magnitude. In the signed numbers, the most significant bit represents sign, not magnitude.
17 Chapter We will show that the statement is true for the 8-bit numbers. The other two are similar. The maximum (unsigned) number we can represent using four bits is 255D. So multiplying 255D by 255D is the maximum number we can expect from the multiplication of two 8-bit numbers. Since this number (65025D) is less than , there will not be any overflow. A more general proof that looks at x-bit inputs: Multiplying two x-bit numbers results in (2 x 1) 2 =(2 2x +1 2 x+1 ), which is less than 2 2x 1.
18 18 Chapter jg condition: The logical expression ((SF xor OF) or ZF) = 0 is true when ZF = 0 and SF = OF (because of the xor operation). This is the condition given in Table jge condition: The logical expression (SF xor OF) = 1 is true only SF = OF (because of the xor operation). This is the condition given in Table jl condition: The logical expression (SF xor OF) = 0 is true only SF 6= OF (because of the xor operation). This is the condition given in Table jle condition: The logical expression ((SF xor OF) or ZF) = 1 is true when either ZF = 1 or SF 6= OF (because of the xor operation). This is the condition given in Table 12.6.
19 Chapter In the fixed-length representation, each string occupies exactly the same number of character positions. In such a representation, if a string has fewer characters, it is extended by padding, for example, with blank characters. On the other hand, if a string has more characters, it is usually truncated to fit the storage space available. Clearly, if we want to avoid truncation of larger strings, we need to fix the string length carefully so that it can accommodate the largest string. In practice, it may be difficult to guess this value. A further disadvantage is that memory space is wasted if the majority of strings are shorter than the fixed length used.
20 20 Chapter The main advantages are: We don t have to decide on the string length. We don t waste memory space if the actual string is shorter than the fixed length used. We don t truncate longer strings if they exceed the fixed length used. The main disadvantage is the overhead associated with processing variable-length strings (for example, testing for the sentinel character). In addition, in sentinel-terminated variable strings, the sentinel character must be avoided in the string.
21 Chapter Explicitly storing string length: In this method, the string length attribute is explicitly stored along with the string. Thus, it is efficient to find the string length. An additional advantage is that we can use any character in the string (in contrast to the other method that reserves a special character as the sentinel). However, the disadvantage is that, if we modify the contents of the string, we have to update the string length value as well. Using a sentinel character: In this method, strings are stored with a trailing sentinel character. The main advantage is that there is no need to store string length explicitly. The disadvantage is that the sentinel character is a special character that cannot appear within a string. Furthermore, finding string length involves scanning the string until we find the sentinel character.
22 22 Chapter The main advantage of the string instructions is that, as part of execution, they automatically update (i.e., increment or decrement) the index registers used by these instructions. Another advantage is that they allow memory-to-memory copying of data. (Note that normal instructions do not allow memory-to-memory copying.) In addition, string instructions can accept a repetition prefix to repeatedly execute the operation. These features result in an efficient code for block movement of data (strings and other types of data).
23 Chapter The load string (lods) instruction copies the value at DS:SI from the source string to AL, AX, or EAX. Use of the rep prefix does not make sense, as it will leave only the last value in AL, AX, or EAX. This instruction, along with the stos instruction, is often used when processing is required while copying a string.
24 24 Chapter This is because these string instructions do not compare values like the cmps instruction.
25 Chapter The repeat prefixes first check the CX register to see if it is not 0, only then is the string instruction executed. Thus, if CX is 0 to start with, the string instruction is not executed at all. This is in contrast to the loop instruction, which first decrements and then tests if CX is 0. Thus, with loop, CX = 0 results in a maximum number of iterations, and usually a jcxz check is needed.
26 26 Chapter Usually it does not matter whether the string processing direction is forward or backward. However, for sentinel character-terminated strings, the forward direction is preferred as it improves efficiency (copy the character until the sentinel character is read).
27 Chapter There are situations where one particular direction is mandatory. For example, if we want to shift a string right by one position, we have to start with the tail and proceed toward the head (i.e., in the backward direction) as in the following example: Initial string! a b c 0? After one shift! a b c 0 0 After two shifts! a b c c 0 After three shifts! a b b c 0 Final string! a a b c 0 If we proceed in the forward direction, only the first character is copied through the string, as shown below: Initial string! a b c 0? After one shift! a a c 0? After two shifts! a a a 0? After three shifts! a a a a? Final string! a a a a a
28 28 Chapter The code for lds SI,string can be implemented as shown below: mov mov mov SI,[string+2] DS,SI SI,[string]
29 Chapter From the Pentium data book, we get the following timing information: The code above takes 4 cycles as indicated below: mov SI,[string+2] ; 1 cycle mov DS,SI ; 2 cycles mov SI,[string] ; 1 cycle The lds instruction also takes 4 clock cycles.
30 30 Chapter In direct procedure calls, the offset of the target procedure is provided directly. In indirect procedure calls, this offset is given with one level of indirection as in the indirect jump. That is, the call instruction itself will contain either a memory address (through a label), or a 16-bit generalpurpose register. The actual offset of the target procedure is obtained either from the memory or register. For example, we could use call BX if BX contains the offset of the target procedure. When this call instruction is executed, the BX register contents are used to load IP in order to transfer control to the target procedure. Similarly, we can use call target_proc_ptr if the word in memory at target_proc_ptr contains the offset of the target procedure.
Lecture 9. INC and DEC. INC/DEC Examples ADD. ADD Examples SUB. INC adds one to a single operand DEC decrements one from a single operand
Lecture 9 INC and DEC Arithmetic Operations Shift Instructions Next week s homework! INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination
More information8086 Programming. Multiplication Instructions. Multiplication can be performed on signed and unsigned numbers.
Multiplication Instructions 8086 Programming Multiplication can be performed on signed and unsigned numbers. MUL IMUL source source x AL source x AX source AX DX AX The source operand can be a memory location
More informationLecture (08) x86 programming 7
Lecture (08) x86 programming 7 By: Dr. Ahmed ElShafee 1 Conditional jump: Conditional jumps are executed only if the specified conditions are true. Usually the condition specified by a conditional jump
More informationEx : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H.
Ex : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H. MOV AX, 5000H MOV DS, AX MOV AL, 20H MOV CL, 30H ADD AL, CL MOV CL, 10H MUL CL
More informationLogical and bit operations
Assembler lecture 6 S.Šimoňák, DCI FEEI TU of Košice Logical and bit operations instructions performing logical operations, shifts and rotations logical expressions and bit manipulations strings Logical
More informationLogic Instructions. Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Segment 4A
Segment 4A Logic Instructions Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Course Instructor Mohammed Abdul kader Lecturer, EEE, IIUC Basic
More informationEx: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.
INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0
More informationIntroduction to 8086 Assembly
Introduction to 8086 Assembly Lecture 8 Bit Operations Clock cycle & instruction timing http://www.newagepublishers.com/samplechapter/000495.pdf Clock cycle & instruction timing See 8086: http://www.oocities.org/mc_introtocomputers/instruction_timing.pdf
More informationX86 Addressing Modes Chapter 3" Review: Instructions to Recognize"
X86 Addressing Modes Chapter 3" Review: Instructions to Recognize" 1 Arithmetic Instructions (1)! Two Operand Instructions" ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src
More informationEXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM
EXPERIMENT WRITE UP AIM: Assembly language program to search a number in given array. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM
More informationArithmetic and Logic Instructions And Programs
Dec Hex Bin 3 3 00000011 ORG ; FOUR Arithmetic and Logic Instructions And Programs OBJECTIVES this chapter enables the student to: Demonstrate how 8-bit and 16-bit unsigned numbers are added in the x86.
More information8086 INSTRUCTION SET
8086 INSTRUCTION SET Complete 8086 instruction set Quick reference: AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD CLI CMC CMP CMPSB CMPSW CWD DAA DAS DEC DIV HLT IDIV IMUL IN INC INT INTO I JA JAE JB JBE
More informationSelection and Iteration. Chapter 7 S. Dandamudi
Selection and Iteration Chapter 7 S. Dandamudi Outline Unconditional jump Compare instruction Conditional jumps Single flags Unsigned comparisons Signed comparisons Loop instructions Implementing high-level
More informationInstructions moving data
do not affect flags. Instructions moving data mov register/mem, register/mem/number (move data) The difference between the value and the address of a variable mov al,sum; value 56h al mov ebx,offset Sum;
More informationQ1: Multiple choice / 20 Q2: Protected mode memory accesses
16.317: Microprocessor-Based Systems I Summer 2012 Exam 2 August 1, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationBAHAR DÖNEMİ MİKROİŞLEMCİLER LAB4 FÖYÜ
LAB4 RELATED INSTRUCTIONS: Compare, division and jump instructions CMP REG, memory memory, REG REG, REG memory, immediate REG, immediate operand1 - operand2 Result is not stored anywhere, flags are set
More informationSPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY
BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One
More informationQ1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100
16.317: Microprocessor-Based Systems I Summer 2012 Exam 1 July 20, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationCMSC 313 Lecture 05 [draft]
CMSC 313 Lecture 05 [draft] More on Conditional Jump Instructions Short Jumps vs Near Jumps Using Jump Instructions Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL,
More informationcomplement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]
The following pages contain references for use during the exam: tables containing the x86 instruction set (covered so far) and condition codes. You do not need to submit these pages when you finish your
More informationLogical and Bit Operations. Chapter 8 S. Dandamudi
Logical and Bit Operations Chapter 8 S. Dandamudi Outline Logical instructions AND OR XOR NOT TEST Shift instructions Logical shift instructions Arithmetic shift instructions Rotate instructions Rotate
More informationAPPENDIX C INSTRUCTION SET DESCRIPTIONS
APPENDIX C INSTRUCTION SET DESCRIPTIONS This appendix provides reference information for the 80C186 Modular Core family instruction set. Tables C-1 through C-3 define the variables used in Table C-4, which
More informationWeek /8086 Microprocessor Programming
Week 5 8088/8086 Microprocessor Programming Multiplication and Division Multiplication Multiplicant Operand Result (MUL or IMUL) (Multiplier) Byte * Byte AL Register or memory Word * Word AX Register or
More informationWeek /8086 Microprocessor Programming II
Week 5 8088/8086 Microprocessor Programming II Quick Review Shift & Rotate C Target register or memory SHL/SAL 0 C SHR 0 SAR C Sign Bit 2 Examples Examples Ex. Ex. Ex. SHL dest, 1; SHL dest,cl; SHL dest,
More information3.1 DATA MOVEMENT INSTRUCTIONS 45
3.1.1 General-Purpose Data Movement s 45 3.1.2 Stack Manipulation... 46 3.1.3 Type Conversion... 48 3.2.1 Addition and Subtraction... 51 3.1 DATA MOVEMENT INSTRUCTIONS 45 MOV (Move) transfers a byte, word,
More informationWeek /8086 Microprocessor Programming I
Week 4 8088/8086 Microprocessor Programming I Example. The PC Typewriter Write an 80x86 program to input keystrokes from the PC s keyboard and display the characters on the system monitor. Pressing any
More informationPESIT Bangalore South Campus
INTERNAL ASSESSMENT TEST 2 Date : 02/04/2018 Max Marks: 40 Subject & Code : Microprocessor (15CS44) Section : IV A and B Name of faculty: Deepti.C Time : 8:30 am-10:00 am Note: Note: Answer any five complete
More informationUS06CCSC04: Introduction to Microprocessors and Assembly Language UNIT 3: Assembly Language Instructions II
Unconditional & Conditional JUMP instructions: Conditional JUMP instructions: JA/JNBE Jump if above / Jump if not Below or Equal These two mnemonics represent the same instruction. The term above and below
More informationSOEN228, Winter Revision 1.2 Date: October 25,
SOEN228, Winter 2003 Revision 1.2 Date: October 25, 2003 1 Contents Flags Mnemonics Basic I/O Exercises Overview of sample programs 2 Flag Register The flag register stores the condition flags that retain
More informationString Processing. Chapter 9 S. Dandamudi
String Processing Chapter 9 S. Dandamudi Outline String representation Using string length Using a sentinel character String instructions Repetition prefixes Direction flag String move instructions String
More informationINSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Note: PUSHF / POPF have no operands The figure below shows that if (SS) = 3000H, (SP) = 0042H, so the execution of POP CX loads CX by the word 4050H form the stack segment. The SP is incremented by 2.
More informationChapter 5. Real-Mode 80386DX Microprocessor Programming 1 Part 2. The 80386, 80486, and Prentium Processors,Triebel Prof. Yan Luo, UMass Lowell 1
Chapter 5 Real-Mode 80386DX Microprocessor Programming 1 Part 2 Prof. Yan Luo, UMass Lowell 1 Introduction 5.2 Data-Transfer Instructions 5.3 Arithmetic Instructions 5.4 Logic Instructions 5.5 Shift Instructions
More informationBasic Assembly SYSC-3006
Basic Assembly Program Development Problem: convert ideas into executing program (binary image in memory) Program Development Process: tools to provide people-friendly way to do it. Tool chain: 1. Programming
More information8088/8086 Programming Integer Instructions and Computations
Unit3 reference 2 8088/8086 Programming Integer Instructions and Computations Introduction Up to this point we have studied the software architecture of the 8088 and 8086 microprocessors, their instruction
More informationCode segment Stack segment
Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1
More informationQ1: Multiple choice / 20 Q2: Data transfers and memory addressing
16.317: Microprocessor Systems Design I Fall 2014 Exam 1 October 1, 2014 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationCSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs
CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32)
More informationLab 3. The Art of Assembly Language (II)
Lab. The Art of Assembly Language (II) Dan Bruce, David Clark and Héctor D. Menéndez Department of Computer Science University College London October 2, 2017 License Creative Commons Share Alike Modified
More informationLab 6: Conditional Processing
COE 205 Lab Manual Lab 6: Conditional Processing Page 56 Lab 6: Conditional Processing Contents 6.1. Unconditional Jump 6.2. The Compare Instruction 6.3. Conditional Jump Instructions 6.4. Finding the
More informationJones & Bartlett Learning, LLC NOT FOR SALE OR DISTRIBUTION 80x86 Instructions
80x86 Instructions Chapter 4 In the following sections, we review some basic instructions used by the 80x86 architecture. This Jones is by & no Bartlett means a Learning, complete list LLC of the Intel
More informationBasic Pentium Instructions. October 18
Basic Pentium Instructions October 18 CSC201 Section 002 Fall, 2000 The EFLAGS Register Bit 11 = Overflow Flag Bit 7 = Sign Flag Bit 6 = Zero Flag Bit 0 = Carry Flag "Sets the flags" means sets OF, ZF,
More informationSection 002. Read this before starting!
Points missed: Student's Name: _ Total score: /100 points East Tennessee State University -- Department of Computer and Information Sciences CSCI 2150 Computer Organization Final Exam for Fall Semester,
More informationSigned number Arithmetic. Negative number is represented as
Signed number Arithmetic Signed and Unsigned Numbers An 8 bit number system can be used to create 256 combinations (from 0 to 255), and the first 128 combinations (0 to 127) represent positive numbers
More informationSection 001. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Fall Semester,
More informationCMSC 313 Lecture 07. Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR
CMSC 313 Lecture 07 Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR More Arithmetic Instructions NEG, MUL, IMUL, DIV Indexed Addressing:
More informationCSC 8400: Computer Systems. Machine-Level Representation of Programs
CSC 8400: Computer Systems Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) 1 Compilation Stages
More information16.317: Microprocessor Systems Design I Fall 2013
16.317: Microprocessor Systems Design I Fall 2013 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling
More informationIntel 8086: Instruction Set
IUST-EE (Chapter 6) Intel 8086: Instruction Set 1 Outline Instruction Set Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Unconditional Transfer Instruction
More informationLecture 9. INC and DEC. INC/DEC Examples ADD. Arithmetic Operations Overflow Multiply and Divide
Lecture 9 INC and DEC Arithmetic Operations Overflow Multiply and Divide INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination can
More informationCS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2017 Lecture 5
CS24: INTRODUCTION TO COMPUTING SYSTEMS Spring 2017 Lecture 5 LAST TIME Began exploring x86-64 instruction set architecture 16 general-purpose registers Also: All registers are 64 bits wide rax-rdx are
More informationEECE.3170: Microprocessor Systems Design I Spring 2016
EECE.3170: Microprocessor Systems Design I Spring 2016 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response
More informationRead this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Fall Semester,
More informationEC 333 Microprocessor and Interfacing Techniques (3+1)
EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 6 8086/88 Microprocessor Programming (Arithmetic Instructions) Dr Hashim Ali Fall 2018 Department of Computer Science and Engineering HITEC
More informationSummer 2003 Lecture 4 06/14/03
Summer 2003 Lecture 4 06/14/03 LDS/LES/LSS General forms: lds reg,mem lseg reg,mem Load far pointer ~~ outside of current segment {E.g., load reg w/value @ mem, & seg w/mem+2 XCHG Exchange values General
More informationLABORATORY WORK NO. 7 FLOW CONTROL INSTRUCTIONS
LABORATORY WORK NO. 7 FLOW CONTROL INSTRUCTIONS 1. Object of laboratory The x86 microprocessor family has a large variety of instructions that allow instruction flow control. We have 4 categories: jump,
More informationComputer Architecture..Second Year (Sem.2).Lecture(4) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات
مدرس المادة : م. سندس العزاوي... قسم / الحاسبات... - 26 27 Assembly Level Machine Organization Usage of AND, OR, XOR, NOT AND : X Y X AND Y USE : to chick any bit by change ( to ) or ( to ) EX : AX = FF5
More informationCS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers. MC
CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers MC100401285 Moaaz.pk@gmail.com Mc100401285@gmail.com PSMD01 MIDTERM FALL 2011 CS401 Assembly Language Q: Affected flag of AND operation
More informationDefining and Using Simple Data Types
85 CHAPTER 4 Defining and Using Simple Data Types This chapter covers the concepts essential for working with simple data types in assembly-language programs The first section shows how to declare integer
More informationChapter Four Instructions Set
Chapter Four Instructions set Instructions set 8086 has 117 instructions, these instructions divided into 6 groups: 1. Data transfer instructions 2. Arithmetic instructions 3. Logic instructions 4. Shift
More informationSection 001. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University -- Department of Computer and Information Sciences CSCI 2150 Computer Organization Final Exam for Spring Semester,
More informationAssembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice
Assembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice Jumps and iterations conditional and unconditional jumps iterations (loop) implementation of HLL control structures Unconditional jump unconditional
More information16.317: Microprocessor Systems Design I Spring 2014
16.317: Microprocessor Systems Design I Spring 2014 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by
More informationCS401 Assembly Language Solved MCQS From Midterm Papers
CS401 Assembly Language Solved MCQS From Midterm Papers May 14,2011 MC100401285 Moaaz.pk@gmail.com MC100401285@gmail.com PSMD01(IEMS) Question No:1 ( Marks: 1 ) - Please choose one The first instruction
More informationJump instructions. Unconditional jumps Direct jump. do not change flags. jmp label
do not change flags Unconditional jumps Direct jump jmp label Jump instructions jmp Continue xor eax,eax Continue: xor ecx,ecx Machine code: 0040340A EB 02 0040340C 33 C0 0040340E 33 C9 displacement =
More information9/25/ Software & Hardware Architecture
8086 Software & Hardware Architecture 1 INTRODUCTION It is a multipurpose programmable clock drive register based integrated electronic device, that reads binary instructions from a storage device called
More informationBit Operations. Ned Nedialkov. McMaster University Canada. SE 3F03 February 2014
Bit Operations Ned Nedialkov McMaster University Canada SE 3F03 February 2014 Outline Logical shifts Arithmetic shifts Rotate shifts Where are rotate shifts used? Bitwise operations Bit operations in C
More informationKingdom of Saudi Arabia Ministry of Higher Education. Taif University. Faculty of Computers & Information Systems
Kingdom of Saudi Arabia Ministry of Higher Education Taif University Faculty of Computers & Information Systems المملكة العربية السعودية وزارة التعليم العالي جامعة الطاي ف آلية الحاسبات ونظم المعلومات
More informationComputer Department Chapter 7. Created By: Eng. Ahmed M. Ayash Modified and Presented by: Eng. Eihab S. El-Radie. Chapter 7
Islamic University Of Gaza Assembly Language Faculty of Engineering Discussion Computer Department Chapter 7 Created By: Eng. Ahmed M. Ayash Modified and Presented by: Eng. Eihab S. El-Radie Chapter 7
More informationIntel Instruction Set (gas)
Intel Instruction Set (gas) These slides provide the gas format for a subset of the Intel processor instruction set, including: Operation Mnemonic Name of Operation Syntax Operation Examples Effect on
More informationUNIT III MICROPROCESSORS AND MICROCONTROLLERS MATERIAL OVERVIEW: Addressing Modes of Assembler Directives. Procedures and Macros
OVERVIEW: UNIT III Addressing Modes of 8086 Assembler Directives Procedures and Macros Instruction Set of 8086 Data Transfer Group Arithmetic Group Logical Instructions Rotate and Shift instructions Loop
More informationArithmetic Instructions
Segment 3C Arithmetic Instructions This topic covers the following instructions: Addition (ADD, INC, ADC) Subtraction (SUB, DEC, SBB,CMP) Multiplication (MUL, IMUL) Division (DIV, IDIV) BCD Arithmetic
More informationMarking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of
More informationAssignment no:4 on chapter no :3 : Instruction set of 8086
Assignment no:4 on chapter no :3 : Instruction set of 8086 1) Describe any two string operation instruction of 8086 with syntax & one example of each. 1] REP: REP is a prefix which is written before one
More informationBasic Assembly Instructions
Basic Assembly Instructions Ned Nedialkov McMaster University Canada SE 3F03 January 2013 Outline Multiplication Division FLAGS register Branch Instructions If statements Loop instructions 2/21 Multiplication
More informationSection 001 & 002. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Spring Semester,
More informationLecture 5 Program Logic and Control
Lecture 5 Program Logic and Control Chapter Outline Short, near and far address JMP Instruction The CMP Instruction Conditional Jump instruction The Loop instruction While Loop REPEAT Loop Short,near,and
More informationCS-202 Microprocessor and Assembly Language
CS-202 Microprocessor and Assembly Language Lecture 2 Introduction to 8086 Assembly Language Dr Hashim Ali Spring - 2019 Department of Computer Science and Engineering HITEC University Taxila!1 Lecture
More informationConditional Processing
١ Conditional Processing Computer Organization & Assembly Language Programming Dr Adnan Gutub aagutub at uqu.edu.sa Presentation Outline [Adapted from slides of Dr. Kip Irvine: Assembly Language for Intel-Based
More informationQ1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100
16.317: Microprocessor-Based Systems I Fall 2012 Exam 1 October 3, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationLanguage of x86 processor family
Assembler lecture 2 S.Šimoňák, DCI FEEI TU of Košice Language of x86 processor family Assembler commands: instructions (processor, instructions of machine language) directives (compiler translation control,
More informationArithmetic Logic Unit
Arithmetic Logic nit The arithmetic logic unit AL performs arithmetic, logic and shift operations. It is composed of three blocks namely the logic, arithmetic and shift blocks. Each block performs different
More informationUW CSE 351, Winter 2013 Midterm Exam
Full Name: Student ID: UW CSE 351, Winter 2013 Midterm Exam February 15, 2013 Instructions: Make sure that your exam is not missing any of the 9 pages, then write your full name and UW student ID on the
More informationInternational Islamic University Chittagong (IIUC) Department of Electrical and Electronic Engineering (EEE)
International Islamic University Chittagong (IIUC) Department of Electrical and Electronic Engineering (EEE) EEE-3506: Microprocessor and Interfacing Sessional Experiment No. 05: Program control instructions
More informationif 2 16bit operands multiplied the result will be
how many operands in ADC? ans:3 how 32 bit word is defined? ans define double if 2 16bit operands multiplied the result will be ans 32bit if div by ero occurs then?? ans div by zero int for software int
More informationIt is possible to define a number using a character or multiple numbers (see instruction DB) by using a string.
1 od 5 17. 12. 2017 23:53 (https://github.com/schweigi/assembler-simulator) Introduction This simulator provides a simplified assembler syntax (based on NASM (http://www.nasm.us)) and is simulating a x86
More informationSelected Pentium Instructions. Chapter 12 S. Dandamudi
Selected Pentium Instructions Chapter 12 S. Dandamudi Outline Status flags Zero flag Carry flag Overflow flag Sign flag Auxiliary flag Parity flag Arithmetic instructions Multiplication instructions Division
More informationComputer Architecture and Assembly Language Programming CS401 Lecture No: 1 Address, Data, and Control Buses A computer system comprises of a
Computer Architecture and Assembly Language Programming CS401 Lecture No: 1 Address, Data, and Control Buses A computer system comprises of a processor, memory, and I/O devices. I/O is used for interfacing
More informationAssembly Language: IA-32 Instructions
Assembly Language: IA-32 Instructions 1 Goals of this Lecture Help you learn how to: Manipulate data of various sizes Leverage more sophisticated addressing modes Use condition codes and jumps to change
More information8086 programming Control Flow Instructions and Program Structures
8086 programming Control Flow Instructions and Program Structures Example: write a procedure named Square that squares the contents of BL and places the result in BX. Square: PUSH AX MOV AL, BL MUL BL
More informationComputer Architecture and System Programming Laboratory. TA Session 3
Computer Architecture and System Programming Laboratory TA Session 3 Stack - LIFO word-size data structure STACK is temporary storage memory area register points on top of stack (by default, it is highest
More informationb) List the 16 Bit register pairs of 8085?(Any 2 pair, 1 Mark each) 2M Ans: The valid 16 bit register pair of 8085 are
Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate
More informationOverview of Assembly Language
Overview of Assembly Language Chapter 9 S. Dandamudi Outline Assembly language statements Data allocation Where are the operands? Addressing modes» Register» Immediate» Direct» Indirect Data transfer instructions
More informationLecture 8: Control Structures. Comparing Values. Flags Set by CMP. Example. What can we compare? CMP Examples
Lecture 8: Control Structures CMP Instruction Conditional High Level Logic Structures Comparing Values The CMP instruction performs a comparison between two numbers using an implied subtraction. This means
More informationMarking Scheme. Examination Paper. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of
More informationUNIT II 16 BIT MICROPROCESSOR INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING. The Intel 8086 Instruction Set
UNIT II 16 BIT MICROPROCESSOR INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING The Intel 8086 Instruction Set 1.Explain Addressing Modes of 8086? ADDRESSING MODES Implied - the data value/data address
More informationIFE: Course in Low Level Programing. Lecture 6
IFE: Course in Low Level Programing Lecture 6 Instruction Set of Intel x86 Microprocessors Conditional jumps Jcc jump on condition cc, JMP jump always, CALL call a procedure, RET return from procedure,
More informationArchitecture and components of Computer System Execution of program instructions
Execution of program instructions Microprocessor realizes each program instruction as the sequence of the following simple steps: 1. fetch next instruction or its part from memory and placing it in the
More informationECOM Computer Organization and Assembly Language. Computer Engineering Department CHAPTER 7. Integer Arithmetic
ECOM 2325 Computer Organization and Assembly Language Computer Engineering Department CHAPTER 7 Integer Arithmetic Presentation Outline Shift and Rotate Instructions Shift and Rotate Applications Multiplication
More informationCSE351 Spring 2018, Midterm Exam April 27, 2018
CSE351 Spring 2018, Midterm Exam April 27, 2018 Please do not turn the page until 11:30. Last Name: First Name: Student ID Number: Name of person to your left: Name of person to your right: Signature indicating:
More informationMicroprocessor and Assembly Language Week-5. System Programming, BCS 6th, IBMS (2017)
Microprocessor and Assembly Language Week-5 System Programming, BCS 6th, IBMS (2017) High Speed Memory Registers CPU store data temporarily in these location CPU process, store and transfer data from one
More information