Weikang Qian. Nomination for Best Student Paper Award,

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1 Weikang Qian Room 421, University of Michigan-Shanghai Jiao Tong University Joint Institute Shanghai Jiao Tong University 800 Dong Chuan Road, Shanghai, China Phone: Web: Employment: Associate Professor 02/2018-Present Assistant Professor 09/ /2018 University of Michigan-Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai, China Education: Ph.D., Electrical Engineering 07/2011 Department of Electrical and Computer Engineering, University of Minnesota, Twin Cities Advisor: Marc Riedel Dissertation Title: Digital yet Deliberately Random: Synthesizing Logical Computation on Stochastic Bit Streams Bachelor of Engineering, Automation 07/2006 Department of Automation, Tsinghua University, Beijing, China Awards & Honors: Nomination for Best Student Paper Award, 2016 International Workshop on Logic and Synthesis (IWLS) Mong Man-Wei International Exchange Award 2015 Doctoral Dissertation Fellowship, University of Minnesota 2010 Nomination for William J. McCalla Best Paper Award, 2009 International Conference on Computer-Aided Design (ICCAD) Best Poster Award, 2009 Center on Functional Engineered Nano Architectonics (FENA) First-Rank Scholarship for Academic Excellent Students, Tsinghua University 2005 First-Rank Scholarship for Academic Excellent Students, Tsinghua University 2004 First-Rank Scholarship for Academic Excellent Students, Tsinghua University 2003 Research Interests: Novel Paradigm for Computation Circuit Design for Emerging Technologies Logic Synthesis and Verification for VLSI Circuits Computer Architecture for Probabilistic Applications Fault-Tolerant and Probabilistic Techniques for Digital Circuits Teaching: VE451 Digital Signal Processing and Analysis Fall 2011 VE280 Programming and Elementary Data Structures Summer VE281 Data Structures and Algorithms Fall Page 1 of 9

2 VE527 Computer-Aided Design of Integrated Circuits Fall 2013, Summer , Fall 2013 Industrial Experience: Research Intern 05/ /2008 IBM T. J. Watson Research Center, Yorktown Heights, NY Professional Activities: Membership in Professional Organizations Member, IEEE Member, ACM Member, ACM Special Interest Group on Design Automation (SIGDA) Conference and Workshop Technical Program Committee Member 2017 International Conference on Computer-Aided Design (ICCAD) China Semiconductor Technology International Conference (CSTIC) International Workshop on Logic and Synthesis (IWLS) Design Automation Conference (DAC) Ph.D. Forum Conference and Workshop Session Chair 2012 International Workshop on Emerging Circuits and Systems China Semiconductor Technology International Conference (CSTIC) 2014 International Workshop on Emerging Technologies of Synthesis and Optimization 2015 International Symposium on Design Technologies for Internet of Things Great Lakes Symposium on VLSI (GLSVLSI) 2016 International Workshop on Logic and Synthesis (IWLS) 2017 Asia and South Pacific Design Automation Conference (ASPDAC) Paper Refereeing IEEE Transactions on Computers IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on Circuits and Systems I IEEE Transactions on Circuits and Systems II IEEE Transactions on Emerging Topics in Computing IEEE Transactions on Information Theory IEEE Transactions on Multimedia IEEE Transactions on Nanotechnology IEEE Transactions on Neural Networks and Learning Systems IEEE Transactions on VLSI IEEE Journal on Emerging and Selected Topics in Circuits and Systems IEEE Embedded System Letters ACM Transactions on Design Automation of Electronic Systems ACM Journal on Emerging Technologies in Computing Systems Microelectronics Journal Integration, the VLSI Journal International Journal of Approximate Reasoning Journal of Computer Science and Technology Design Automation Conference (DAC) Design, Automation, and Test in Europe (DATE) International Conference on Computer-Aided Design (ICCAD) Asia and South Pacific Design Automation Conference (ASPDAC) International Conference on Computer Design (ICCD) Page 2 of 9

3 Great Lakes Symposium on VLSI (GLSVLSI) International Symposium on Nanoscale Architectures (NANOARCH) International Symposium on Circuits and Systems (ISCAS) International Symposium on Physical Design (ISPD) International Workshop on Logic and Synthesis (IWLS) International Symposium on Multiple-Valued Logic (ISMVL) International Symposium on Integrated Circuits (ISIC) China Semiconductor Technology International Conference (CSTIC) Other Services Judge for ACM Student Research Competition at 2014 International Conference on Computer-Aided Design (ICCAD) Panelist of the special session on MOOC at 2014 International Conference on Field- Programmable Technology (ICFPT) Judge for Ph.D. forum at 2016 Design Automation Conference (DAC) Publications: (*/^ indicates the supervised graduate/ undergraduate students.) Book Chapters B1. Xuesong Peng* and Weikang Qian, A branch-and-bound-based minterm assignment algorithm for synthesizing stochastic circuit, to appear in Advanced Logic Synthesis, Andre Reis and Rolf Drechsler editors, Springer Publishing, B2. Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, Synthesizing combinational logic to generate probabilities: theories and algorithms, in Advanced Techniques in Logic Synthesis, Optimizations and Applications, Sunil Khatri and Kanupriya Gulati editors, Springer Publishing, Peer-Reviewed Journal Articles J1. Chen Wang*, Yanan Sun, Shiyan Hu, Li Jiang, and Weikang Qian, Variation-aware global placement for improving timing-yield of carbon-nanotube field effect transistor circuit, to appear in ACM Transactions on Design Automation of Electronic Systems, J2. Xuesong Peng* and Weikang Qian, Stochastic circuit synthesis by cube assignment, to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, J3. Armin Alaghi, Weikang Qian, and John Hayes, The promise and challenge of stochastic computing, to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, J4. Junjun Hu*, Zhijing Li^, Meng Yang*, Zixin Huang^, and Weikang Qian, A highaccuracy approximate adder with correct sign calculation, to appear in Integration, the VLSI Journal, J5. Yanbo Wang, Weikang Qian, and Bo Yuan, A graphical model of smoking-induced global instability in lung cancer, in IEEE/ACM Transactions on Computational Biology and Bioinformatics, vol. 15, no. 1, pp. 1-14, Page 3 of 9

4 J6. M. Hassan Najafi, Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc D. Riedel, A reconfigurable architecture with sequential logic-based stochastic computing, in ACM Journal on Emerging Technologies in Computing Systems, vol. 13, no. 4, pp. 57:1-57:28, J7. Yu Wang^, Weikang Qian, Shuchang Zhang, Xiaoyao Liang, and Bo Yuan, A learning algorithm for Bayesian networks and its efficient implementation on GPUs, in IEEE Transactions on Parallel and Distributed Systems, vol. 27, no. 1, pp , J8. Weikang Qian, Marc D. Riedel, and Ivo Rosenberg, Synthesizing cubes to satisfy a given intersection pattern, in Journal of Discrete Applied Mathematics, vol. 193, pp , J9. Peng Li, David J. Lilja, Weikang Qian, Marc D. Riedel, and Kia Bazargan, Logical computation on stochastic bit streams with linear finite state machines, in IEEE Transactions on Computers, vol. 63, no. 6, pp , J10. Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc. D. Riedel, Computation on stochastic bit streams: digital image processing case studies, in IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 22, no. 3, pp , J11. Weikang Qian, Marc D. Riedel, Hongchao Zhou, and Jehoshua Bruck, Transforming probabilities with combinational logic, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, no. 9, pp , J12. Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan, and David J. Lilja, An architecture for fault-tolerant computation with stochastic logic, in IEEE Transactions on Computers, vol. 60, no. 1, pp , J13. Weikang Qian, Marc D. Riedel, and Ivo Rosenberg, Uniform approximation and Bernstein polynomials with coefficients in the unit interval, in European Journal of Combinatorics, vol. 32, no. 3, pp , J14. Weikang Qian, John Backes, and Marc D. Riedel, The synthesis of stochastic circuits for nanoscale computation, in International Journal of Nanotechnology and Molecular Computation, vol. 1, no. 4, pp , Peer-Reviewed Conference Papers C1. Sanbao Su*, Yi Wu*, and Weikang Qian, Efficient batch statistical error estimation for iterative multi-level approximate logic synthesis, in Proceedings of the 2018 Design Automation Conference (DAC), San Francisco, CA, USA, C2. Menghui Xu, Shusen Jing, Jun Lin, Weikang Qian, Zaichen Zhang, Xiaohu You, and Chuan Zhang, Approximate belief propagation decoder for polar codes, in Proceedings of the 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Calgary, AB, Canada, C3. Meng Yang*, John Hayes, Deliang Fan, and Weikang Qian, Design of accurate Page 4 of 9

5 stochastic number generators with noisy emerging devices for stochastic computing, in Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Irvine, CA, USA, 2017, pp C4. Yue Yao^, Shuyang Huang^, Chen Wang*, Yi Wu*, and Weikang Qian, Approximate disjoint bi-decomposition and its application to approximate logic synthesis, in Proceedings of the 35th IEEE International Conference on Computer Design (ICCD), Boston, MA, USA, 2017, pp C5. Meng Yang* and Weikang Qian, Design of reliable stochastic number generators using emerging devices for stochastic computing, in Proceedings of the 2017 International Workshop on Logic and Synthesis (IWLS), Austin, TX, USA, 2017, pp C6. Yi Wu*, Chuyu Shen*, Yi Jia^, and Weikang Qian, Approximate logic synthesis for FPGA by wire removal and local function change, in Proceedings of the 2017 Asia and South Pacific Design Automation Conference (ASPDAC), Chiba, Japan, 2017, pp C7. Xuesong Peng* and Weikang Qian, A branch-and-bound-based minterm assignment algorithm for synthesizing stochastic circuit, in Proceedings of the 2016 International Workshop on Logic and Synthesis (IWLS), Austin, TX, USA, 2016, pp (Nominated for Best Student Paper Award). C8. Yi Wu* and Weikang Qian, An efficient method for multi-level approximate logic synthesis under error rate constraint, in Proceedings of the 2016 Design Automation Conference (DAC), Austin, TX, USA, 2016, pp. 128:1-128:6. C9. Rui Zhou^ and Weikang Qian, A general sign bit error correction scheme for approximate adders, in Proceedings of the 2016 Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, 2016, pp C10. Chuyu Shen*, Zili Lin*, Ping Fan, Xianglong Meng, and Weikang Qian, Parallelizing FPGA technology mapping through partitioning, in Proceedings of the 2016 International Symposium on Field-Programmable Custom Computing Machines (FCCM), Washington D.C., USA, 2016, pp C11. Lezhong Huang^, Guanhui Chen^, Peng Li, and Weikang Qian, Accelerating stochastic computation for binary classification applications, in Proceeding of the 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Shanghai, China, 2016, pp (Invited Paper). C12. Chen Zou^, Weikang Qian, and Jie Han, DPALS: A dynamic programming-based algorithm for two-level approximate logic synthesis, in Proceedings of the 11th International Conference on ASIC (ASICON), Chengdu, China, 2015, pp C13. Chen Wang*, Li Jiang, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, and Weikang Qian, Timing-driven placement for carbon nanotube circuits, in Proceedings of the 2015 IEEE International System-on-Chip Conference (SOCC), Beijing, China, 2015, pp (Invited Paper). C14. Tianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, and Li Jiang On Page 5 of 9

6 microarchitectural modeling for CNFET-based circuits, in Proceedings of the 2015 IEEE International System-on-Chip Conference (SOCC), Beijing, China, 2015, pp (Invited Paper). C15. Yi Wu*, Chen Wang*, and Weikang Qian, Minimizing error of stochastic computation through linear transformation, in Proceedings of the 2015 Great Lakes Symposium on VLSI (GLSVLSI), Pittsburgh, PA, USA, 2015, pp (Invited Paper). C16. Junjun Hu* and Weikang Qian, A new approximate adder with low relative error and correct sign calculation, in Proceedings of the 2015 Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, 2015, pp C17. Zheng Zhao* and Weikang Qian, A general design of stochastic circuit and its synthesis, in Proceedings of the 2015 Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, 2015, pp C18. Yili Ding^, Yi Wu*, and Weikang Qian, Generating multiple correlated probabilities for MUX-based stochastic computing architecture, in Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2014, pp C19. Zheng Zhao*, Chian-Wei Liu, Chun-Yao Wang, and Weikang Qian, BDD-based synthesis of reconfigurable single-electron transistor arrays, in Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2014, pp C20. Daran Cai^, Ang Wang^, Ge Song^, and Weikang Qian, An ultra-fast parallel architecture using sequential circuits computing on random bits, in Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013, pp C21. Chen Wang* and Weikang Qian, Optimizing multi-level combinational circuits for generating random bits, in Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, 2013, pp C22. Weikang Qian, Chen Wang*, Peng Li, David J. Lilja, Kia Bazargan, and Marc D. Riedel, An efficient implementation of numerical integration using logical computation on stochastic bit streams, in Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2012, pp (Invited Paper). C23. Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc D. Riedel, The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic, in Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2012, pp C24. Peng Li, Weikang Qian, and David J. Lilja, A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic, in Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), Montreal, QC, Canada, 2012, pp Page 6 of 9

7 C25. Peng Li, Weikang Qian, David Lilja, Kia Bazargan, and Marc Riedel, Case studies of logical computation on stochastic bit streams, in Proceedings of the 22nd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Newcastle upon Tyne, UK, (Invited Paper). C26. Peng Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, The synthesis of linear finite state machine-based stochastic computational elements, in Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASPDAC), Sydney, Australia, 2012, pp C27. Weikang Qian and Marc D. Riedel, Two-level logic synthesis for probabilistic computation, in Proceedings of the 19th International Workshop on Logic and Synthesis (IWLS), Irvine, CA, USA, 2010, pp C28. Weikang Qian and Marc D. Riedel, Synthesizing cubes to satisfy a given intersection pattern, in Proceedings of the 19th International Workshop on Logic and Synthesis (IWLS), Irvine, CA, USA, 2010, pp C29. Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, The synthesis of combinational logic to generate probabilities, in Proceedings of the 2009 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2009, pp (Nominated for Best Paper Award). C30. Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, A reconfigurable stochastic architecture for highly reliable computing, in Proceedings of the 19th IEEE Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, 2009, pp C31. Weikang Qian and Marc D. Riedel, The synthesis of robust polynomial arithmetic with stochastic logic, in Proceedings of the 45th ACM/IEEE Design Automation Conference (DAC), Anaheim, CA, USA, 2008, pp C32. Weikang Qian and Marc D. Riedel, The synthesis of stochastic logic to perform multivariate polynomial arithmetic, in Proceedings of the 17th International Workshop on Logic and Synthesis (IWLS), Lake Tahoe, CA, USA, 2008, pp Invited Talks: T1. Sequential optimization based on signal equivalence merging and its validation, IBM CMOS Forum, 08/27/2008. T2. The synthesis of combinational logic for probabilistic computation, Department of Electrical Engineering, California Institute of Technology, USA, 11/06/2009. Host: Prof. Jehoshua Bruck. T3. Digital yet deliberately random: synthesizing logical computation on stochastic bit streams, Department of Electrical Engineering, University of Southern California, USA, 02/28/2011, Host: Prof. Sandeep Gupta. T4. Digital yet deliberately random: synthesizing logical computation on stochastic bit streams, Department of Electrical Engineering, University of California, Riverside, USA, 03/02/2011, Host: Prof. Sheldon Tan. Page 7 of 9

8 T5. Digital yet deliberately random: synthesizing logical computation on stochastic bit streams, Department of Electrical and Computer Engineering, Missouri University of Science and Technology, USA, 03/18/2011, Host: Prof. Yiyu Shi. T6. Digital yet deliberately random: synthesizing logical computation on stochastic bit streams, University of Michigan-Shanghai Jiao Tong University Joint Institute, China, 03/31/2011, Host: Prof. Olivier Bauchau. T7. Digital yet deliberately random: synthesizing logical computation on stochastic bit streams, Cadence Design Systems, Inc., 04/19/2011, Host: Dr. Inki Hong. T8. Synthesizing logical computation on stochastic bit streams, Center for Energy- Efficient Computing and Applications, Peking University, China, 01/06/2012, Host: Prof. Guojie Luo. T9. Digital computation on stochastic bit streams: a pseudo-analog approach, International Workshop on Emerging Circuits and Systems, Shanghai, China, 08/09/2012. T10. The synthesis of digital computation on stochastic bit streams, China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 03/18/2013. T11. The synthesis of digital computation on stochastic bit streams, Fudan University, China, 06/28/2013. Host: Prof. Lingli Wang. T12. Digital computation on stochastic bit streams, ShanghaiTech University, China, 10/16/2013. Host: Prof. Pingqiang Zhou. T13. Accelerating digital computation on stochastic bit streams, China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 03/16/2014. T14. Digital design and synthesis for emerging computing paradigm and device technology, Cadence Design Systems, Inc., Shanghai, China, 11/26/2014. Host: Mr. Haobin Li. T15. BDD-based synthesis of reconfigurable single-electron transistor arrays, International Workshop on Emerging Technologies of Synthesis and Optimization (IWETSO), Shanghai, China, 12/13/2014. T16. BDD-based synthesis of reconfigurable single-electron transistor arrays, China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 03/16/2015. T17. Digital design and synthesis for emerging computing paradigm and device technology, Synopsys, Inc., Shanghai, China, 03/18/2015. Host: Dr. Jove Pan. T18. Approximate computing and approximate logic synthesis, Synopsys, Inc., Shanghai, China, 11/05/2015. Host: Dr. Jove Pan. T19. Approximate computing: think wrong, achieve great, Shanghai Jiao Tong Page 8 of 9

9 University-Microsoft Research Asia Joint Lab Workshop, Wuzhen, China, 06/04/2016. T20. Approximate computing: a novel energy-efficient design methodology for errortolerant applications, Advanced Computer Architecture Conference, Weihai, China, 08/22/2016. T21. Design and synthesis of approximate computing circuits, Zhejiang University, China, 12/22/2016. Host: Prof. Chen Zhuo. T22. Design and synthesis of approximate computing circuits, ShanghaiTech University, China, 12/27/2016. Host: Prof. Pingqiang Zhou. T23. Design and synthesis of approximate computing circuits, Meji University, Japan, 01/19/2017. Host: Prof. Tsutomu Sasao. T24. Logic synthesis for approximate computing, China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 03/12/2017. T25. Logic synthesis for approximate computing, Ningbo University, China, 07/29/2017. Host: Prof. Zhufei Chu. T26. Design and synthesis of approximate computing circuits, Southeast University, China, 08/30/2017. Host: Prof. Chuan Zhang. T27. Design and synthesis of approximate computing circuits, Fudan University, China, 09/04/2017. Host: Prof. Xuan Zeng. Student Advising: Doctoral Students Yi Wu ( ) Chen Wang (2014 ) Master Students Chen Wang ( ) Junjun Hu ( ) Zheng Zhao ( ) Chuyu Shen ( ) Zili Lin ( ) Xuesong Peng ( ) Sanbao Su (2016 ) Meng Yang (2016 ) Page 9 of 9