YOUNGMIN YI. B.S. in Computer Engineering, 2000 Seoul National University (SNU), Seoul, Korea

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1 YOUNGMIN YI Parallel Computing Lab Phone: +1 (925) Soda Hall Electrical Engineering and Computer Science Web: University of California, Berkeley, CA Research Interests Parallel Applications (Speech recognition, Natural language processing, Video, etc.) Parallel Programming, Parallel Embedded Software Work Experience 10/2007 present Post-doctoral researcher, University of California Berkeley (Supervisor: Prof. Kurt Keutzer) 03/ /2007 Research assistant professor, Embedded Software Institute, Korea University Education Ph.D. in Electrical Engineering and Computer Science, 2007 Dissertation: Fast and Accurate HW/SW Cosimulation of MPSoC Using Virtual Synchronization HW/SW Codesign and Parallel Processing Lab., (Advisor: Soonhoi Ha) M.S. in Electrical Engineering and Computer Science, 2002 HW/SW Codesign and Parallel Processing Lab.,(Advisor: Soonhoi Ha) B.S. in Computer Engineering, 2000

2 Publications Journals J1. Kisun You, Jike Chong, Youngmin Yi, Ekaterina Gonina, Christopher Hughes, Wonyong Sung, Kurt Keutzer, Scalable HMM based Inference Engine in Large Vocabulary Continuous Speech Recognition, under review, abstract accepted to IEEE Signal Processing Magazine, Special Issue on Signal Processing on Platforms with Multiple Cores J2. Youngmin Yi, Dohyung Kim, Soonhoi Ha, Fast and Accurate Cosimulation of MPSoC Using Trace-driven Virtual Synchronization, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 12 Dec J3. Soonhoi Ha, Sungchan Kim, Choonseung Lee, Youngmin Yi, Seongnam Kwon, and Young-Pyo Joo, "PeaCE: A Hardware-software Codesign Environment for Multimedia Embedded Systems", ACM Transactions on Design Automation of Electronic Systems, Vol.3, No.3 Aug J4. Youngmin Yi, Dohyung Kim, Soonhoi Ha, "Fast and Time-Accurate Cosimulation with OS Scheduler Modeling", Design Automation for Embedded Systems, Kluwer Academic Publishers Vol. 8, pp , Sep.2003 Conferences C1. Jike Chong, Ekaterina Gonina, Youngmin Yi, Kurt Keutzer, A Fully Data-parallel WFST-based Large Vocabulary Continuous Speech Recognition on Graphics Processor Unit, submitted to INTERSPEECH 2009 C2. Jike Chong, Kisun You, Youngmin Yi, Ekaterina Gonina, Christopher Hughes, Wonyong Sung, Kurt Keutzer, Scalable HMM based Inference Engine in Large Vocabulary Continuous Speech Recognition, to appear in Workshop on Multimedia Signal Processing and Novel Parallel Computing at International Conference on Multimedia and Expo (ICME), Jul (Invited talk version of J1) C3. Hoeseok Yang, Youngmin Yi, Soonhoi Ha, A Timed HW/SW Coemulation Technique for Fast Yet Accurate System Verification, to appear in International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS), Jul C4. Jike Chong, Youngmin Yi, Arlo Faria, Nadathur Satish, Kurt Keutzer, Data-Parallel Large Vocabulary Continuous Speech Recognition on Graphics Processors, International workshop on Emerging Applications and many-core architecture (EAMA) at International Symposium on Computer Architectures (ISCA), Jun C5. Taewook Oh, Youngmin Yi, Soonhoi Ha, Communication Architecture Simulation

3 on the Virtual Synchronization Framework, SAMOS Workshop, Jul C6. Soonhoi Ha, Choonseung Lee, Youngmin Yi, Seongnam Kwon, and Young-Pyo Joo, "Hardware-software Codesign of Multimedia Embedded Systems: the PeaCE Approach", International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Aug C7. Youngmin Yi, Dohyung Kim, Soonhoi Ha, I/O Modeling and Refinement for HW/SW Codesign of Embedded Systems, International SOC Design Conference, Oct C8. Dohyung Kim, Youngmin Yi and Soonhoi Ha, "Trace-Driven HW/SW Cosimulation Using Virtual Synchronization Technique", Design Automation Conference (DAC), Jun C9. Kiseun Kwon, Youngmin Yi, Dohyung Kim, Soonhoi Ha, "Embedded Software Generation from System Level Specification for Multi-Tasking Embedded Systems", Asia and South Pacific Design Automation Conference (ASP-DAC), Jan C10. Seongnam Kwon, Choonseung Lee, Sungchan Kim, Youngmin Yi and Soonhoi Ha, "Fast Design Space Exploration Framework with an Efficient Performance Estimation Technique", International Workshop on Embedded Systems for Real Time Multimedia (ESTIMedia), Sep C11. Youngmin Yi, Dohyung Kim, Soonhoi Ha, "Virtual Synchronization Technique with OS modeling for Fast and Time-accurate Cosimulation", International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct C12. Dohyung Kim, Chae-Eun Rhee, Sungchan Kim, Youngmin Yi, Hyunuk Jung and Soonhoi Ha, "Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs", International Symposium on Systems Synthesis (ISSS), Oct Selected Research Projects UPCRC ( 03/2009 Present, Parallelizing a Natural Language Parser on GPU We are currently analyzing and implementing a CKY parser on GPU using CUDA. A natural language parser is a memory-intensive application rather than a computeintensive one having order of tens of thousands of grammar rules to apply to get the best parser tree for a given sentence. We are exploring the ways to exploit the large memory bandwidth of GPU to accelerate this interesting application. 11/2007 Present, Data-parallel large vocabulary continuous speech recognition on GPU We explored trade-offs of different algorithmic styles in order to find an efficient

4 mapping of WFST (Weighted Finite State Transducer) decoding in speech recognition to GPU using CUDA. The algorithmic level design space exploration (DSE) tends to find a mapping that has a greater impact than compiler level DSE can do. We evaluated four algorithmic styles for parallel graph traversal of state transition graph of WFST, considering the effect of the algorithms on synchronization costs and load balancing. We development of large vocabulary (50,000+ words) speech recognition with Beam search algorithm on GPU(Graphics Processor Unit) using CUDA PeaCE ( 03/ /2007, HW/SW Cosimulation Technique for MPSoC 07/ /2006, Rapid Prototyping and Architecture Optimization for Embedded System by using HW/SW Codesign We proposed a new time synchronization method to accelerate system simulation speed (trace-driven virtual synchronization technique). As the number of cores increase in MPSoC or CMP, the system simulation speed decreases since not only the number of the simulators to execute increases but also the synchronization cost among them increases in conventional simulation approaches. The proposed technique employs virtual time so that each simulator can run with minimum number of synchronizations. We developed PeaCE cosimulation framework based on the trace-driven virtual synchronization technique. PeaCE cosimulation framework which was developed in C and C++ integrates third-party simulators like ARM simulators and ModelSim RTL simulators by implementing Virtual Synchronization technique in their callback functions and FLIs. HOPES ( 03/ /2007, Development of Embedded software design and verification techniques of MPSoC We developed a virtual prototyping system for HOPES framework. HOPES framework extends the capability of PeaCE framework by allowing designers to specify their application in other languages than SPDF (Synchronous Piggybacked Data Flow). Community Service Journal reviewing: TVLSI, TCAD, TODAES, Journal of Signal Processing Systems Conference reviewing: CODES+ISSS, ASP-DAC, DATE, CASES, SAMOS workshop

5 Teaching Experience 2007: Lecturer, Embedded Digital Signal Processing, Software Engineering 2002: T.A., Digital System Design Methodology