AN 022. E nd generation 4-branch FlexRay star coupler 1/18. E Application note MaY 23, 2011

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electrical physical layer specification v.

1 E98.56 Application note MaY, 0 AN 0 APPLICATION NOTE E98.56 nd generation -branch FlexRay star coupler Conform to FlexRay electrical physical layer specification v.0 FlexRay and are trademarks of Daimler AG ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

2 E98.56 Application note MaY, 0 AN 0 Introduction This document provides hints to software and hardware developers designing an ECU including the E98.56 FlexRay -branch active star device. Power supply. Simplified power supply distribution VBAT INH VBUF 5V Gen. VCC DCN RSTN I/O Central Logic Aux. circuits T0, circuit Transceiver_ Transceiver_ Transceiver_ Transceiver_ BP_ BM_ BP_ BM_ BP_ BM_ BP_ BM_ VCC VBUF derived from VBAT derived from VBUFx/VCC derived from GND related T0 T Figure : Power supply distribution ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

3 E98.56 Application note MaY, 0 AN 0 Functional description of the E98.56 pins. VCCx The E98.56 has two distributed VCC inputs VCC and VCC. Those pins supply the internal logic and the FlexRay bus interface. VCC is operated at typ. 5V.. is used as a reference voltage for I/O communication to the microcontroller. It can be operated at typ. 5V or typ..v.. VBAT The input pin VBAT is connected to the battery line behind the reverse battery protection. It supplies the internal VBUF voltage regulator and the internal supply in the AS_Sleep mode. It can be also operated at VCC level in case a permanent battery supply is not needed.. INH The pin INH is a high side switch which can be used for switching external power supplies. If more than one E98.56 are used the INH pins may be connected in parallel..5 VBUFx These pins are the output of a voltage regulator, which provides typ. 5V during AS_Sleep until VCC has ramped up after a wake-up event. The voltage at VBUF and VBUF is buffered by external capacitors. In the application VBUF and VBUF have to be connected to each other. An additional HF capacitor in the range of 00pF nf at each pin should be provided for better EMC performance. The capacitors should be placed as close as possible to the pin..6 is used for local a wake-up. It can be operated at typ..v, typ. 5V or VBAT level. The thresholds can be adapted via SPI. is a high -ohmic input. To prevent unwanted wake-ups during AS_Sleep the should be connected to a defined level using a pull-up/down resistor. In case is not used in the application it should be directly connected to GND. In case the is switched from outside of the ECU a series resistor of kω should be provided to avoid a damage caused by positive or negative current flows due to failure events. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

4 E98.56 Application note MaY, 0 AN 0.7 is a low active error-sum output (CMOS push/pull output). As soon as an error bit in the SPI register is set will change its state to low. is set to high after the error flags are reset by SPI access and no further errors are present. Signalization of a WUP in AS_Standby After recognition of the remote wake up changes from high to low state. The AS changes the operating mode to AS_Normal. Following timings of the E98.56 should be considered: > A stable logic level of the is reached typically 0µs after the end of the second Data_0 phase of the WUP > A stable logic level of the is reached typically 500µs after the start of receiving the WUP Until that time the logic level at that pin may toggle. Therefore from application point of view it s recommended to poll the pin instead of generating an interrupt. Signalization of VBAT undervoltage In case of VBAT undervoltage changes to low. As long as the VBAT undervoltage is present remains low. Therefore from application point of view it s recommended to poll the pin instead of generating an interrupt..8 T0 and T In case more than independent FlexRay branches are needed the network can be extended by further so called banked E98.56 and compatible ELMOS ICs. This intra-star connection is realized by T0 and T pins. Even if no further active stars are connected to extend the FlexRay network an external pull-up resistor of 0Ω at T0 and T to VBUF/ is mandatory. T0 and T are bidirectional pins and are connected in following manner: T0 of IC is connected to T0 of each additional banked star coupler IC. T of IC is connected to T of each additional banked star coupler IC. The number of used active stars is limited by the PCB layout constraints of the intra-star connection lines and the resulting signal integrity. TO/ lines should be as short as possible. The T0 and T PCB lines strongly influence the the FlexRay signal symmetry. The high to low edge timing at T0 and T is less critical. The low to high edge is determined by the external pull-up resistors and the parasitic capacitance at pins T0 and T. Therefore optimized layout with low parasitics, best possible symmetry and matching should be considered. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

5 E98.56 Application note MaY, 0 AN 0 The external resistors should have an overall value of 0Ω. Use of resistors with % tolerance or better is mandatory. One possibility to reduce the effect of the RC-combination of both lines is to split up the pull-up resistor and place them close to each IC. This method is strongly recommended. The value of each resistor is then calculated as follows:.9 DCN R splitup = [n IC ] 0Ω DCN has to be connected to..0 High level at enables the transmission signal path from CC to the entire network. Low level at the pin does not disable the routing function from branch to branch.. RSTN Low level at RSTN is used to reset the E98.56 to default values.. BPx and BMx BPx and BMx are bidirectional I/Os connected to the FlexRay bus. Using common mode chokes (CMC) is preferred to improve the susceptibility against high frequent bus disturbances. Use of 00µH CMC with low stray inductance is recommended... Layout considerations of BPx and BMx lines > Short connection between the ECU connector and the bus driver > Use of shortest ECU connector pins > Symmetry of the BP and BM lines > BP and BM lines and the bus driver on the same layer. No via crossing. > BP and BM as close as possible to each other > No other signal lines between BP and BM > Use of termination resistors with sufficient maximum power dissipation > BP and BM lines on the PCB must be able to provide the maximum short circuit current without thermal damage. > Refer to the OEM s FlexRay requirements ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 5/8

E98.56 Application note MaY, 0 AN 0.,, Pins, and are directly connected to the, and pins of the communication controller (CC). of the microcontroller is connected to of the E98.56. of the microcontroller is connected to of the E98.56. of the microcontroller is connected to of the E98.56. Due to possible additional signal asymmetries connection of those pins to additional parallel microcontroller input is not recommended.

6 E98.56 Application note MaY, 0 AN 0.,, Pins, and are directly connected to the, and pins of the communication controller (CC). of the microcontroller is connected to of the E of the microcontroller is connected to of the E of the microcontroller is connected to of the E Due to possible additional signal asymmetries connection of those pins to additional parallel microcontroller input is not recommended. In addition connection of those pins to RC-networks to improve the EMC beahavior as known from CAN applications is not recommended.. Exposed die pad The exposed die pad of the E98.56 package should be connected to GND. exposed die pad Use of the thermal vias with connection to a sufficient area of a copper plane is mandatory. Please contact helpdesk@elmos.eu for additional ELMOS QFN package application note. Host interface (SPI) A valid SPI command consists of bytes (6 clocks). To ensure correct SPI register read or write access a minimum time span between two SPI accesses of dspid must be granted. A minimum time span between the high Y low edge and the first clock edge (start of data transmission) must be at least dspis. The minimum time span between the last clock edge (end of data transmission) and the low Y high edge and must be at least dspih. The MSB is written first. After successful set up of all voltages entering AS_Normal and it s recommended to RESET the failure flags by setting the RESET bit to in the SPI register. In AS_Sleep mode SPI communication is enabled ( and VCC must be present). It s not possible to change the branch operation mode or the branch address in AS_Sleep mode. Error flags are not refreshed in AS_Sleep. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 6/8

7 E98.56 Application note MaY, 0 AN 0 5 FlexRay bus diagnosis The bus diagnosis implementation offers following failure detection capabilities for each branch independently: > BP shorted to BM > BP shorted to GND > BM shorted to GND > BP shorted to VSUP > BM shorted to VSUP Use of CMCs or different bus termination concepts as defined in the official EPL specification may have a negative influence on the accuracy of the diagnosis capability of the E Ignition powered applications In case > Permanent power connection to VBAT isn t needed, > Or remote wake-up is not used, > Or the ECU is powered by VCC= or VCC and, the VBAT pin can be connected to VCC. Y See ignition powered application example. Such a connection of VBAT would permanently indicate a VBAT undervoltage in the SPI register. Also the pin would permanently indicate a failure condition. Setting MASK_VBATUV bit in the SPI write register can mask this bit. Further the pins VCC, VCC, VBUF and VBUF can be connected to the same supply line. VBUF capacitors are not needed if the VCC line is buffered at the voltage regulator. Nevertheless a capacitor in range 00pF nf should be provided at every supply pin to improve the EMC behavior of the IC. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 7/8

8 E98.56 Application note MaY, 0 AN 0 6. Example for ignition powered applications with one E nF 7nF 7nF 7nF VBUF V_BUF E98.56 FLEXRAY STAR COUPLER T0 T HOST Interface CC Interface BP_ Inhibit Wake.V or 5V INH pF Star Transmitter Receiver BP_ BM_ BP_ BM_ BM_ BP_ BM_ >=K RSTN 0K 8 00pF 0R (%) 0R (%) 5 or 00µH.7nF.7nF.7nF.7nF * 7 7 VBAT VCC VCC DCN RSTN DIE_PAD GND GND GNDD V 5 or 00µH 5 or 00µH 5 or 00µH Figure : Application example with one E98.56 * In case leaves the ECU and is switched remotely. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 8/8

9 E98.56 Application note MaY, 0 AN 0 6. Example for ignition powered application with two banked E nF 7nF 7nF 7nF 5V.V or 5V VBUF V_BUF E98.56 FLEXRAY STAR COUPLER 0 VBUF V_BUF E98.56 FLEXRAY STAR COUPLER Star Transmitter Receiver HOST Interface T0 T BP_ BM_ BP_ BM_ 7nF 7nF 7nF 7nF CC Interface BP_ BM_ Inhibit Wake.V or 5V BP_ BM_ 6 70R 70R 00pF 00pF (%) (%) * >=K RSTN 0K 5 or 00µH.7nF.7nF.7nF.7nF 7 7 VBAT VCC VCC DIE_PAD GND GND GNDD DCN 5V 5 or 00µH 5 or 00µH 5 or 00µH INH 5 9 HOST Interface CC Interface Star Transmitter Receiver T0 T BP_ BM_ BP_ BM_ 5 INH 6 Inhibit Wake BP_ BM_ 70R 70R (%) (%) 5 or 00µH 00pF 00pF.7nF 5 RSTN DCN VCC VCC VBAT BP_ BM_ RSTN RSTN GNDD GND GND DIE_PAD or 00µH 5 or 00µH.7nF 5 or 00µH.7nF.7nF VCC VCC Figure : Application example with two E98.56 ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 9/8

10 E98.56 Application note MaY, 0 AN 0 6. Disabling branch remote wake-up circuits In case the FlexRay remote wake-up capability of the branch is not needed, the remote wake-up circuit for each branch can be switched off independently via SPI which minimizes the sleep current of the IC. 6. Estimation of VBUF capacitor s value (CBUF) The remote wake-up functionality of E98.56 needs a permanent connection to the battery line during AS_Sleep operation mode. The energy needed for immediate recognition and routing of the WUP is stored in the capacitors CBUF until the VCC has ramped up. The VBUF is regulated to typ. 5V. The equation for the needed capacitance of CBUF is as follows: C BUF = n WUS (I IDLE Δt IDLE + I DATA_0 Δt DATA_0 ) ΔV BUF with: C BUF : Capacitance at VBUF (Overall capacitance at the pins VBUF and VBUF) n WUS : Number of WUSs until VCC presence (response time of the external voltage regulator reffering to the number of needed WUS after enabling INH. One WUS means µs. 6µs Data_0 + 8µs IDLE) I IDLE : Overall current consumption of the E98.56 during IDLE phase Δt IDLE : Duration of IDLE phase I DATA_0 : Overall current consumption of the E98.56 during Data_0 phase Δt DATA_0 : Duration of Data_0 phase ΔV BUF : ΔV BUF = 0.V (Voltage drop at pin VBUF) The corresponding undervoltage threshold, idle and transmission currents can be gathered from the device specification. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 0/8

11 E98.56 Application note MaY, 0 AN Application example with one E nF 7nF 7nF 7nF VBAT VECU KL 0 (clamp 0) + 5 VBUF V_BUF 00pF E98.56 FLEXRAY STAR COUPLER T0 T Star Transmitter Receiver HOST Interface BP_ BM_ CC Interface.V or 5V 0 9 BP_ BM_ 7 6 BP_ Inhibit Wake INH BM_ BP_ BM_ >=K RSTN K 8 * 7 7 VBAT VCC VCC DCN + + 0R (%) 0R (%) 00µF 00pF 00µF 5 or 00µH RSTN DIE_PAD.7nF.7nF.7nF.7nF GND GND GNDD V 5 or 00µH 5 or 00µH 5 or 00µH Figure : Application example with one E98.56 * In case leaves the ECU and is switched remotely. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

12 E98.56 Application note MaY, 0 AN Application example with two banked E98.56 VBAT VECU 5V.V or 5V VCC VBAT 5 VBUF V_BUF E98.56 FLEXRAY STAR COUPLER T0 T BP_ BM_ Star Transmitter Receiver HOST Interface CC Interface Inhibit Wake * 7nF 7nF 7nF 7nF.V or 5V E98.56 FLEXRAY STAR COUPLER 5V VBUF V_BUF 0 0 BP_ 9 BM_ BP_ 6 BM_ 5 INH 6 0K BP_ BM_ RSTN >=K RSTN 5 or 00µH 5 9 HOST Interface CC Interface Star Transmitter Receiver T0 T BP_ BM_ BP_ BM_ 5 INH INHIBIT 6 Inhibit Wake BP_ BM_ 5 or 00µH nF DCN VCC VCC VBAT BP_ BM_ RSTN RSTN GNDD GND GND DIE_PAD or 00µH 5 or 00µH 5 or 00µH 5 or 00µH 5 or 00µH.7nF.7nF.7nF.7nF.7nF 5 or 00µH.7nF.7nF VBAT R (%) 70R (%) 00µF VCC 7nF 7nF 7nF 7nF 00µF 00pF 00pF 5 + KL 0 (clamp 0) 7 7 VBAT VCC VCC DCN 70R 70R (%) (%) 00pF 00pF 00µF 00µF DIE_PAD GND GND GNDD Figure 5: Application example with two banked E98.56 ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

13 E98.56 Application note MaY, 0 AN 0 7 Pin connection checklist Pin # Pin Name Connection If used in application Direct connection to microcontroller Optional external 0kΩ pull-up Direct connection to microcontroller and optional SPI slaves Optional external 0kΩ pull-up Direct connection to microcontroller and optional SPI slaves Optional external 0kΩ pull-down Direct connection to microcontroller and optional SPI slaves If not used in application Direct connection to Direct connection to Direct connection to digital GND Not connected 5 Direct connection to microcontroller Leave open 6 GNDD 7 Direct connection to digital GND of the ECU Direct connection to voltage.v or 5V Buffering with at least one 7nF capacitor close to the pin 8 Direct connection to microcontroller 9 0 TRDX0 TRDX Direct connection to microcontroller No additional RC combinations recommended due to signal asymmetries Optional external 0kΩ pull-down Direct connection to microcontroller No additional RC combinations recommended due to signal asymmetries Optional external 0kΩ pull-up Direct connection to microcontroller No additional RC combinations recommended due to signal asymmetries External n IC 0Ω pull-up resistor (% tolerance) to VBUF ) External n IC 0Ω pull-up resistor (% tolerance) to VBUF ) N/A Connect to VCC Buffering with at least one 7nF capacitor close to the pin Direct connection to digital GND if used as stand alone AS otherwise direct connection to if transmission control via is not needed. Direct connection to digital GND Direct connection to Not connected NC Direct connection to analog GND Direct connection to analog GND 5 INH Direct connection to voltage regulator s INHIBIT/ENABLE input Optional direct connection of more INH pins of further E98.56 N/A N/A Not connected ) For banking of more than one E98.56 or ignition powered applications see functional pin description ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

14 E98.56 Application note MaY, 0 AN 0 Pin # Pin Name Connection 6 7 VBAT If used in application Direct connection to trigger source e.g. microcontroller. External pull-down or pull-up depending on application s sleep idle level ) Connection to battery line (KL0/KL5) behind the reverse battery protection ) Buffering with at least 7nF cercap close to the pin If not used in application Direct connection to analog GND Connect to VCC 8 NC Direct connection to analog GND Direct connection to analog GND 9 GND Direct connection to analog GND N/A 0 NC Direct connection to analog GND Direct connection to analog GND VBUF Buffering with 00µF and 00pF...nF ) Direct connection with VBUF Connect to VCC VCC Direct connection to VCC = 5V Buffering with at least 7nF cercap N/A BM_ BP_ Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination 7Ω to BP_ or leave open and switch of branch via SPI 7Ω to BM_ or leave open and switch of branch via SPI 5 NC Direct connection to analog GND Direct connection with analog GND 6 BM_ 7 BP_ Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination 7Ω to BP_ or leave open and switch of branch via SPI 7Ω to BM_ or leave open and switch of branch via SPI 8 NC Direct connection with digital GND Direct connection with digital GND 9 BM_ 0 BP_ Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination 7Ω to BP_ or leave open and switch of branch via SPI 7Ω to BM_ or leave open and switch of branch via SPI NC Direct connection to analog GND Direct connection with analog GND BM_ BP_ VCC Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination Direct connection to CMC choke 5µH or 00µH and FlexRay bus termination Direct connection to VCC = 5V Buffering with at least 7nF cercap 7Ω to BP_ or leave open and switch of branch via SPI 7Ω to BM_ or leave open and switch of branch via SPI N/A ) In case of ECU external wake-up trigger a series resistor of kω should be connected to pin to avoid damage caused by possible GND-shift currents ) For ignition powered applications see section applications with no remote wake-up ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 /8

15 E98.56 Application note MaY, 0 AN 0 Pin # Pin Name Connection If used in application If not used in application 5 VBUF Buffering with 00µF and 00pF...nF ) Direct connection with VBUF Direct connection to analog GND 6 NC Direct connection with analog GND Direct connection to analog GND 7 GND Direct connection to analog GND N/A 8 NC Direct connection to analog GND Direct connection to analog GND 9 NC Direct connection to analog GND Direct connection to analog GND 0 NC Direct connection to analog GND Direct connection to analog GND NC Direct connection to analog GND Direct connection to analog GND NC Direct connection to analog GND Direct connection to analog GND DCN Direct connection to Direct connection to RSTN Direct connection to microcontroller Direct connection to ) For ignition powered applications see section applications with no remote wake-up ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 5/8

16 E98.56 Application note MaY, 0 AN 0 Abbreviations AS Active Star ASIC Application Specific Integrated Circuit ASSP Application Specific Standard Product BM Bus Minus BP Bus Plus CC Communication Controller CERCAP Ceramic Capacitor CMC Common Mode Choke ECU Electronic Control Unit ELCAP Electrolytic Capacitor ESR Equivalent Series Resistance IC Integrated Circuit KL5 Clamp 5 switched battery supply (German: Klemme 5), ignition powered applications KL0 Clamp 0 permanent battery supply (German: Klemme 0) Local Wake-up OEM Original Equipment Manufacturer (car maker) RWU Remote Wake-up WUS Wake-up Symbol WUP Wake-up Pattern SPI Serial Peripheral Interface TSS Transmission Start Sequence Contact In case of any application related or general technical questions please contact: helpdesk@elmos.eu In all other cases info@elmos.de Or ELMOS Semiconductor AG Heinrich-Hertz-Strasse 7 Dortmund Germany Phone: Fax: ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 6/8

17 AN 0 WARNING Life Support Applications Policy ELMOS Semiconductor AG is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing ELMOS Semiconductor AG products, to observe standards of safety, and to avoid situations in which malfunction or failure of an ELMOS Semiconductor AG Product could cause loss of human life, body injury or damage to property. In development your designs, please ensure that ELMOS Semiconductor AG products are used within specified operating ranges as set forth in the most recent product specifications. General Disclaimer Information furnished by ELMOS Semiconductor AG is believed to be accurate and reliable. However, no responsibility is assumed by ELMOS Semiconductor AG for its use, nor for any infringements of patents or other rights of third parties, which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of ELMOS Semiconductor AG. ELMOS Semiconductor AG reserves the right to make changes to this document or the products contained therein without prior notice, to improve performance, reliability, or manufacturability. Application Disclaimer Circuit diagrams may contain components not manufactured by ELMOS Semiconductor AG, which are included as means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. The information in the application examples has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, such information does not convey to the purchaser of the semiconductor devices described any license under the patent rights of ELMOS Semiconductor AG or others. Copyright 0 ELMOS Semiconductor AG Reproduction, in part or whole, without the prior written consent of ELMOS Semiconductor AG, is prohibited. ELMOS Semiconductor AG Application Note QM-No.: 5AN00E.00 7/8

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