Modulo L Series - P100/120/133 L

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1 Modulo L Series - P/0/ L CHARACTERISTICS Microprocessor Pentium ( MHz - MHz system) Pentium 0 (0 MHz - 0 MHz system) Pentium ( MHz - MHz system) Processor socket ZIF Processor Socket 7 (OverDrive for Socket ) Architecture ISA/PCI Case TIN BOX Memory Min. 8/ MB, max. 9 MB with MB increments. On the motherboard there are six sockets for the installation of EDO DRAM and Fast Page Mode SIMMs. The following SIMMs are listed in the P.d.G.: (EDO DRAM) EXM -8 Two MBx (8 MB) SIMMs EXM -0 Two MBx ( MB) SIMMs EXM -0 Two MBx ( MB) SIMMs EXM -0 Two 8 MBx ( MB) SIMMs EXM -8 Two MBx (8 MB) SIMMs EXM -0 Two MBx ( MB) SIMMs EXM -0 Two MBx ( MB) SIMMs EXM -0 Two 8 MBx ( MB) SIMMs Memory access rate EDO DRAM: 0 ns Fast Page Mode: 70 ns Memory cache st lev.: integrated in the processor nd lev.: KB (on CELP socket) Floppy Disk First floppy disk drive: Panasonic JU-7A. MB Mitsubishi MF-. MB Sony MP-F7W. MB Sony MPF0-. MB Epson SMD MB Mitsumi D9T. MB TEAC FDHF. MB Y-E DATA YD-70B/YD-70D. MB Second floppy disk drive (optional): Toshiba ND08 DE. MB Panasonic JU 7-//. MB IDE Hard Disk Fujitsu MTA GB Conner LAPAZ CFS 7 A. GB Quantum FR 80 AT. GB IBM DJAA-7. GB Seagate ST0A GB MOTHERBOARD LPX BA9 BIOS The ROM BIOS is a FLASH EPROM. The BIOS code can be updated from diskette. Supported features: Plug&Play, APM. Last level: Rev...0.CV Y POWER SUPPLY SA-90- (ASTEC) W / V 9 Modulo L Series - P/0/ L 9-

2 CD-ROM Streaming Tape Expansion slots on the Riser bus Video controller IDE PCI interface Keyboard and mouse Keyboard CD-ROM IDE: GOLDSTAR GCD-R80B 0 MB CD-ROM SCSI: SONY CDU 7 S 0 MB (with AHA90 SCSI controller) Floppy disk interface: CONNER CTM MB SCSI interface (AHA 90 controller): Wangtek 0HT -. GB DAT HP70A/80A.- GB PCI PCI/ISA shared ISA Full Size Integrated on the motherboard component ATI -VT with MB or MB of video memory and the DPMS, DDC features Two on board IDE PCI interfaces (max PIO Mode ) for the connection of up to four HDU and CD-ROM drives Standard PS/ interface Compact 0/0-key keyboard for Windows 9: ANK -0, ANK -0 MOTHERBOARD NAME LEVEL NOTES BA9 Lev. Nasc Motherboard with a nd level cache on the CELP socket and provided by the optional COAST module. 9- Modulo L Series - P/0/ L

3 ONBOARD CONTROLLERS MOTHERBOARD INTEGRATED CONTROLLERS BA9 Socket 7 (ZIF): The following processors can be installed in this socket - / MHz - Pentium 0/0 MHz - / MHz. nd level cache Implemented on the CELP socket for a COAST module. 89HX Chip set component integrating the following functions: - Cache and DRAM control - Bridging between the CPU and PCI buses - Data Path. 87SB (PIIX) Chip set component integrating the following functions: - Bridge between the PCI and ISA buses - IDE PCI interface for the connection of up to IDE devices - Interrupt and DMA control - Timer - System Power Management. Flash EEPROM The system BIOS is contained in a 8 KB 8FBX Flash EEPROM PC870B Super I/O controller. This component integrates the following functions: - Floppy disk control - Interface for two serial ports (with FIFO) - Interface for one parallel port - Real Time Clock - CMOS. ATI -VT Video controller POWER SUPPLY POWER SUPPLY LEVEL NOTES SP Lev. Nasc. W SP power supply. (ASTEC SA-90-) BIOS 9 LEVEL Rev...0.CV Y NOTES SOFTWARE DRIVERS NAME LEVEL NOTES EVD ATI -VT Ver..0 Video drivers or: Windows., Windows NT., Windows 9, OS/ Warp. RISER BUS EXPANSION BOARD NOME LEVEL NOTES IN0 Lev. Nasc. Allows the installation of optional AT or PCI boards. Modulo L Series - P/0/ L 9-

4 COMPONENTS AND JUMPERS ON MOTHERBOARD BA9 VIDEO PARALLEL ND SERIAL PORT ST SERIAL PORT MOUSE KEYBOARD VIDEO MEMORY RISER BUS VIDEO MEMORY EXPANSION MODULE CONN. (JL AND JL) AMC FEATURE (JH) VIDEO CONTROLLER JG JL BANK 0 MEMORY SOCKETS BANK FLOPPY DISK (J9K) PRIMARY POWER SUPPLY S (J9H AND JC) CELP CONN. FOR ND LEVEL CACHE COAST MODULE 89HX SYSTEM CONTR. CPU SOCKET 7 NATIONAL PC870 I/O CNTR. BANK JC SECONDARY IDE (JC) FLASH EPROM PRIMARY IDE (SYSTEM HARD DISK) - JC SPEAKER CONN. HDU LED CONN. POWER LED CONN. PIIX - PCI ISA/IDE XCELERATOR VOLTAGE REGULATOR COMPONENTS JG JC JL HYAA 9- Modulo L Series - P/0/ L

5 MOTHERBOARD JUMPERS Jumpers JLC and JLD - CPU and System Bus Clocks CPU CLOCK (MHz) HOST BUS CLOCK (MHz) JUMPER BLOCK JLC: HOST BUS CLOCK PINS PINS CPU CLOCK AND HOST BUS CLOCK RATIO (CLK RATIO) JUMPER BLOCK PCI JLD: CLK RATIO BUS PINS PINS - - / / / / / - - Reserved X X - The ISA bus clock is equivalent to / the PCI bus clock and is automatically determined by the system BIOS. Jumper JLA (Pins,, ) - System Password Cancellation Position - Normal operation (Default) Position - System password cancellation Jumper JLA (Pins,, ) - CMOS RAM Reset Position - Normal operation (Default) Position - CMOS RAM reset. Jumper JLB (Pins,, ) - Setup Utility Enable/Disable Position - Enables access to the Setup Utility (Default) Position - Disables access to the Setup Utility. Jumper JC (Pins,, ) - System BIOS Recovery Position - Normal operation (Default) Position - Enables the BIOS recovery procedure. Jumper JC (Pins,, ) - Processor Power Supply Voltage Position -. V - Standard voltage Position -. V - Non-standard voltage (Default). Jumper JG - Number of Riser PCI Slots Managed by the System This setting of this factory installed jumper must never be changed. Position - and - The system manages two Riser bus PCI slots Position - and - The system manages three Riser bus PCI slots (Default). CLK (MHz) 9 Modulo L Series - P/0/ L 9-

6 RISER BUS EXPANSION BOARD (IN0) AT BOARD SLOTS SHARED SLOTS (FOR AT OR PCI BOARDS) PCI BOARD SLOTS HPAA INTERRUPT LEVELS INTERRUPT NMI IRQ0 IRQ IRQ IRQ IRQ IRQ IRQ IRQ7 IRQ8 IRQ9 IRQ0 IRQ IRQ IRQ IRQ IRQ SYSTEM RESOURCE I/O Channel Check Reserved - Interval Timer Reserved - Keyboard buffer full Reserved - Cascade interrupt from the slave PIC Serial port (COM) Serial port (COM) Floppy Parallel port (LPT) Real Time Clock Onboard mouse port Reserved - Math coprocessor Primary IDE controller Secondary IDE controller DMA CHANNELS DMA CHANNEL 0 7 SYSTEM RESOURCE Floppy disk Parallel port (in ECP/EPP configuration) Reserved 9- Modulo L Series - P/0/ L

7 I/O ADDRESSES I/O PORT (h) 0 - F E - 0F B bit bit F 0A0-0A 0C0-0DE 0F F0 - F7 78-7B F8 - FF F BC - BF E8 - EF F0 - F F F7 (write only) F7 bit 7 F7 bit -0 F8 - FF LPT + h D0 - D CF8* CF9 CFC - CFF* FF - FF07 FFA0 - FFA7 FFA8 - FFAF DEVICE OR FUNCTION PIIX - DMA controller PIIX - Interrupt controller Ultra I/O configuration PIIX - System Timer PIIX - System Timer Keyboard controller PIIX - NMI controller, speaker controller Keyboard controller PIIX - NMI enable PIIX - Clock-calendar PIIX - Clock-calendar PIIX - DMA page registers PIIX - Interrupt controller PIIX - DMA controller RESET for numeric errors Secondary IDE channel Primary IDE channel Secondary LPT parallel port Onboard COM serial port Secondary IDE channel command port Secondary IDE channel status port Primary LPT parallel port Alternative LPT parallel port Alternative COM serial port Floppy disk controller Primary IDE channel command port Floppy disk controller Floppy disk controller Primary IDE channel status port Primary COM serial port ECP, LPT port Edge/Level PCI configuration Turbo & Reset PCI configuration data Bus Master IDE Primary IDE Secondary IDE 9 (*): Accessible through DWORD accesses only. I/O port 78 reserved for the BIOS. Port 79 is read-only and has the following bit definitions: BIT NO DESCRIPTION BIT= BIT=0 0 7 Reserved Power supply with deinsertion via software Onboard audio present CPU external clock CPU external clock SETUP disable CMOS cancellation Password cancellation No Yes Enables access Keeps values Keeps password Yes No Disables access Clears values Clears password Modulo L Series - P/0/ L 9-7

8 SYSTEM MEMORY MAP The ECSD area in the EA0-EBFFF range cannot be used by the memory managers as Upper Memory Block (UMB). The E-E7FFF is currently not used but can be used as UBM by the memory managers. Some parts of this area can be used by future BIOS versions to enhance system performance. ADDRESS RANGE SIZE DESCRIPTION Decimal Hexadecimal 0K-M 0-0 MB Exended memory 90K-0K F-FFFFF KB AMI system BIOS 9K-99K EC0-EFFFF KB Main BIOS recovery code 9K-9K EA0-EBFFF 8 KB ESCD (Plug & Play configuration area) 98-9K E80-E9FFF 8 KB OEM Logo (available as UBM) 89K-97K E-E7FFF KB Reserved for the BIOS (Currently available as UBM) 8-89K C80-DFFFF 9 KB High DOS memory available (open to the ISA and PCI buses) 0K-799K A-C7FFF 0 KB Off-board video memory and BIOS 9K 9FC-9FFFF KB BIOS data extended memory (transferred from QEMM, 8MAX) K-8K 8-9FBFF 7 KB Conventional extended memory 0K-K 0-7FFFF KB Conventional memory PCI CONFIGURATION AREA MAP The Triton II PCI chip set uses mechanism to access the PCI configuration area. The PCI configuration address register is a -bit register allocated in CF8h, while the PCI configuration data register is a -bit register allocated in CFCh. These registers can only be accessed through DWORD accesses. BUS N o (HEX) DEVICE N o (HEX) FUNCTION N o B (HEX) 0 DESCRIPTION Intel 89HX (TXC) Intel 87SB (PIIX) - PCI/ISA bridge Intel 87SB (PIIX) - IDE bus master PCI expansion slot PCI expansion slot PCI expansion slot 9-8 Modulo L Series - P/0/ L

PCS42. i MHz i MHz i MHz internal (25 MHz system) i MHz internal (33 MHz system) 25 MHz or 33 MHz

PCS42. i MHz i MHz i MHz internal (25 MHz system) i MHz internal (33 MHz system) 25 MHz or 33 MHz PCS42 CHARACTERISTICS Microprocessor Clock Architecture i486 SX @ 25 MHz i486 SX @ MHz i486 DX @ MHz i486 DX2 @ 50 MHz internal (25 MHz system) i486 DX2 @ 66 MHz internal ( MHz system) 25 MHz or MHz ISA