DEMO MANUAL DC1899A. LTC4228-1/LTC Dual Ideal Diode and Hot Swap Controller DESCRIPTION PERFORMANCE SUMMARY

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1 DEMO MANUAL DC899A DESCRIPTION Demonstration circuit 899A controls two independent power rail circuits each with Hot Swap and ideal diode functionality provided by the LTC48-/LTC48- dual ideal diode and Hot Swap controller. DC899A facilitates evaluation of LTC48 performance in different operation modes such as supply ramp-up, power supply switchover, steady state, and overcurrent faults. Power supply switchover mode can be realized as either an ideal diode or as a prioritizer. Each DC899A circuit is assembled to operate with a V supply and 9A maximum current load. The main components of the board are the LTC48 controller, two MOSFETs operating as ideal diodes, two MOSFETs operating as Hot Swap devices, two current sense resistors, two jumpers for independently enabling each rail, six LEDs to LTC48-/LTC48- Dual Ideal Diode and Hot Swap Controller indicate status, power good and fault conditions separately for each channel, and input voltage snubbers. There are pads for optional RC circuits for each Hot Swap MOSFET gate in order to adjust output voltage slew rate. In addition to this there are jumpers allowing monitoring of supply undervoltage conditions at either IN or SENSE+ pins. The standard configuration (as DC899A populated by default) places the ideal diode MOSFET ahead of the Hot Swap MOSFET. The board also has pads for an alternative configuration with the Hot Swap MOSFET located ahead of the ideal diode MOSFET. Design files for this circuit board are available at L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. PERFORMANCE SUMMARY Specifications are at T A = 5 C SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IN Input Supply Range.9 8 V V INTVCC(UVL) Internal V CC Undervoltage Lockout INTV CC Rising... V V INTVCC(HYST) Internal V CC Undervoltage Lockout Hysteresis mv Ideal Diode Control ΔV FWD(REG) Forward Regulation Voltage (V IN V OUT ) mv ΔV DGATE External N-Channel Gate Drive (V DGATE V IN ) ΔV FWD = 0.V IN < 7V IN = 7V to 8V I CPO(UP) CPO Pull-Up Current CPO = IN =.9V CPO = IN = 8V I DGATE(FPU) DGATE Fast Pull-Up Current ΔV FWD = 0.V, ΔV DGATE = 0V, CPO = 7V.5 A I DGATE(FPD) DGATEn Fast Pull-Down Current ΔV FWD = 0.V, ΔV DGATE = 5V.5 A Hot Swap Control ΔV SENSE(CB) Circuit Breaker Trip Sense Voltage mv (V + SENSEEn V SENSEEn ) ΔV SENSE(ACL) Active Current Limit Sense Voltage mv (V + SENSEEn V SENSEEn ) I HGATE(UP) External N-Channel Gate Pull-Up Current Gate Drive On, HGATE = 0V 7 0 μa I HGATE(DN) External N-Channel Gate Pull-Down Current Gate Drive Off, OUT = V, HGATE = OUT + 5V μa I HGATE(FPD) External N-Channel Gate Fast Pull-Down Current Fast Turn-Off, OUT = V, HGATE = OUT + 5V ma V V μa μa dc899af

2 DEMO MANUAL DC899A PERFORMANCE SUMMARY Specifications are at T A = 5 C SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input/Output Pin V ON(TH) ONn On Pin Threshold Voltage ON Rising..5.6 V V ON(RESET) ONn Pin Fault Reset Threshold Voltage ON Falling V V EN(TH) EN Pin Threshold Voltage EN Rising V V TMR(TH) TMRn Pin Threshold Voltage TMR Rising TMR Falling I TMR(UP) TMRn Pin Pull-Up Current TMR = V, In Fault Mode μa I TMR(DN) TMRn Pin Pull-Down Current TMR = V, No Faults.4.6 μa I TMR(RATIO) TMRn Current Ratio I TMR(DN) /I TMR(UP).4.7 % V V OPERATING PRINCINPLES The LTC48 functions as an ideal diode with inrush current limiting and overcurrent protection by controlling two external back-to-back N-channel MOSFETs in a power path. The LTC48 has two ideal diode and two Hot Swap controllers. Each ideal diode MOSFET is intended to operate with a defined Hot Swap MOSFET, because they are tied by common on/off control, and ideal diode controller sense voltage includes both MOSFETs and sense resistor voltage drop. Therefore, LTC48 provides independent control for the two input supplies. The LTC48 gate drive amplifiers monitor the voltage between the INn and OUTn pins and drive the DGATEn pins. The amplifier quickly pulls up the DGATE pin, turning on the MOSFET (Q or Q), for ideal diode control when it senses a large forward voltage drop. Pulling the ON pin high and EN pins low initiates a 00ms debounce timing cycle. After this timing cycle, a 0μA current source from the charge pump ramps up the HGATEn pin. When the Hot Swap MOSFET (Q or Q4) turns on, the inrush current is limited to a set level set by an external sense resistor placed between IN and SENSE pins. An active current limit amplifier servos the gate of the Hot Swap MOSFET to 65mV across the current sense resistor. Inrush current can be further reduced, if desired, by adding a capacitor from HGATE to. When the MOSFET s gate overdrive (HGATE to OUT voltage) exceeds 4.V, the PWRGD pin pulls low. When both MOSFETs (Q and Q or Q and Q4) are turned on, the gate drive amplifier controls DGATE to servo the forward voltage drop (V IN V OUT ) across the sense resistor and the back-to-back MOSFETs to 5mV. If the load current causes more than 5mV of voltage drop, the gate voltage rises to enhance the MOSFET used for ideal diode control. For large output currents the MOSFET s gate is driven fully on and the voltage drop is equal to the sum of the I LOAD R DS(ON) of the two MOS- FETs in series. In the case of an input supply short-circuit when the MOSFETs are conducting, a large reverse current starts flowing from the load towards the input. The gate drive amplifier detects this failure condition as soon as it appears and turns off the ideal diode MOSFET by pulling down the DGATE pin. dc899af

3 DEMO MANUAL DC899A QUICK START PROCEDURE Demonstration circuit 899A can be easily set up to evaluate the performance of the LTC48-/LTC48-. Refer to the Figure for proper measurement equipment setup and follow the procedure below. The DC899A test includes independent tests of the LTC48 Hot Swap functionality, ideal diode functionality and two power rails prioritizer functionality with the channel highest priority. HOT SWAP FUNCTIONALITY TEST This test is identical for each V rail and is performed in the three steps by the measuring of the transient s parameters in the different operation modes. Install the jumpers in the following positions: JP4, RON_SEL and JP5, RON_SEL in position OFF; JP, EN_SEL and JP, EN_SEL in position LOW. R L C L PSU SW SW R L C L PSU SW SW4 Figure. Measurement Equipment Setup for Hot Swap Functionality Test dc899af

4 DEMO MANUAL DC899A QUICK START PROCEDURE No-Load Rampup Connect a V power supply to the board input turrets IN (IN) and. Do not load the output. Place current probe on the V supply and voltage probes on the OUT (OUT) turret. Provide ON (ON) signal at the ON (ON) pin by moving the RON_SEL (RON_SEL) jumper from OFF position to the V position. Observe the transient. The output voltage rise time should be in the range of ms to 9ms. PWRGD (PWRGD) green LED should be lit. Turn off the rail using the RON_SEL (RON_SEL) jumper. Current Limit Initially adjust an electronic resistive load to 0Ω to Ω and connect it to the OUT (OUT) turret and. Turn on the rail and slowly increase load current up to the circuit breaker threshold level. The current limit range should be between 9A and.a. Turn off the rail using the RON_SEL (RON_SEL) jumper. V OUT INPUT CURRENT dn899a F0 Figure. Turn-On Output Transient Test CURRENT LIMIT AT 0A CURRENT A/DIV OUTPUT VOLTAGE DROPPING DUE TO SHUTDOWN dn899a F0 Figure. Current Limiting Test 4 dc899af

5 DEMO MANUAL DC899A QUICK START PROCEDURE Power-Up into Output Short Short the output to ground with a wire. Place the current probe on this wire. Turn on the rail and record the current shape. The maximum current should be in the.6a to 6.9A range. The LTC48- latches off after overcurrent condition, but the LTC48- automatically retries after 00ms to 450ms. IDEAL DIODE FUNCTIONALITY TEST Use an individual V power supply for each rail; connect the two outputs together at a common load. Adjust each input voltage to V with maximum possible accuracy. In this test, both rails are active and small variations in the input voltage will force one channel off and the other channel on. Place a voltmeter between IN and IN turrets to measure the difference between two input voltages. Activate both rails and keep a load around A to A. Adjust the input voltage level of one supply such that IN is 40mV more positive than IN. Verify that only channel is drawing current. Repeat this test with IN at 40mV with respect to IN. In this case channel only channel is drawing current. PRIORITIZER FUNCTIONALITY TEST The DC899A is assembled with components to implement a power prioritizer with channel having the higher priority. Place JP7 PPR_SEL (power priority select) jumper in position ON and JP5 RON_SEL (ON select) in position OFF. Apply independent supply voltages (V) to both inputs. Channel will be connected to load. Reduce channel input voltage until it reaches an undervoltage condition and D6 (PWRGD) lights. At the same time channel power supply will deliver power to the load. CURRENT PROFILE DURING SHORT-CIRCUIT TURN-ON dn899a F04 Figure 4. Short-Circuit Test (A/Div) dc899af 5

6 DEMO MANUAL DC899A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 7 C, C, C, C8, C9, C, C4 CAP., X7R, 0.μF,, 060 AVX, 0605C04KAT C4, C5 CAP., X7R, 47nF,, 060 AVX, 0605C47KAT C6, C7 CAP., X7R, 5nF,, 060 AVX, 0605C5KAT 4 0 C0, C, C, C5 CAP., ALUMINUM, 00μF, SANYO, 50CE00BS 5 D, D DIODE, VOLTAGE SUPP. 9V 5%, SMA-DIODE VISHAY, SMAJ7A-E 6 4 D, D5, D6, D8 LED, SMT GREEN, J TYPE, LED-LN5C-GREEN PANASONIC, LN5C-TR 7 D4, D7 LED, SMT RED, GW TYPE, LED-LN6C-RED PANASONIC, LN6C-TR 8 D9 DIODE, SWITCHING, SOD80 VISHAY, LS448-GS8 9 0 D0, D, D, D DIODE, CMHZ4706, SOD 0 8 E, E, E, E4, E5, E6, E7, E8 TP, 0.094" MILL-MAX, E9, E0, E, E-E6, E8-E TP, 0.064" MILL-MAX, JP, JP, JP, JP6, JP7 JMP, HDX, 0.079CC SAMTEC, TMM-0-0-L-S JP4, JP5 JMP, HDX4, 0.079CC SAMTEC, TMM-04-0-L-D 4 8 J, J, J, J4, J5, J6, J7, J8 JACK, BANANA KEYSTONE, Q, Q, Q, Q4 MOSFET, N-CH, 0-V, SO8-POWERPAK VISHAY, SiR58DP 6 0 Q5, Q6, Q7, Q8 MOSFET, N-CH, 0-V, SiR58DP, SO8-POWERPAK 7 RS, RS RES., CHIP, 0.005, /W, %, 00 VISHAY, WSL005L000FEA 8 0 RS, RS4 RES., CHIP, 0.005, /W, %, 00, VISHAY, WSL005L000FEA 9 4 R, R, R9, R0 RES., CHIP, 0Ω, %, 060 VISHAY, CRCW0600R0FKEA 0 R, R4 RES., CHIP, 47Ω, %, 060 VISHAY, CRCW06047R0FKEA 6 R5, R6, R7, R8, R9, R0 RES., CHIP, k, %, VISHAY, CRCWK00FKEA R, R5 RES., CHIP, 0k, %, 060 VISHAY, CRCW00600K0FKEA R, R6 RES., CHIP, 7k, %, 060 VISHAY, CRCW0607KFKEA 4 R, R7 RES., CHIP, 49.9k, %, 060 VISHAY, CRCW06049K9FKEA 5 R4, R8 RES., CHIP, 8k, %, 060 VISHAY, CRCW00608K0FKEA 6 0 R, R5 RES., CHIP, 0Ω, R, R6 RES., CHIP, 0Ω, R RES., CHIP, 470Ω, %, 060 VISHAY, CRCW060470RFKEA 9 R4 RES., CHIP, 4.k, %, 060 VISHAY, CRCW00604KFKEA DC899A-A Assembly U I.C. LTC48IUFD-, QFN8UFD LINEAR TECH., LTC48IUFD- DC899A-A Assembly U I.C. LTC48IUFD-, QFN8UFD LINEAR TECH., LTC48IUFD- 6 dc899af

7 DEMO MANUAL DC899A SCHEMATIC DIAGRAM REVISION HISTORY DG ECO REV DESCRIPTION APPROVED DATE HG ST PROTOTYPE VLADIMIR O R 0 Q5 D0 D Q6 SiR58DP CMHZ4706 CMHZ4706 SiR58DP D 00 RS D 0.5W E5 OUT IN IN R E OUT J5 THICK TRACE WIDTH > 500 MIL J IN OUT ADJ., 9A Q RS Q C +.9V - 8V + C0 D R9 SiR58DP SiR58DP 00uF J 00uF SMAJ7A 0 SENSE+ 0.5W 00 J6 C 0.uF R E DG 0 R C6 47 5nF E6 HG INTVCC ON SENSE+ R4 PPR_SEL C 4.k ON 0.uF OFF SENSE+ IN R5 R6 R7 R K JP7 VON_SEL K K 470 INTVCC HDX-079 RON_SEL VS+ V E4 5 4 EN 5V D D4 C VIN C4 D5 D9 6 C.V C 47nF 6V LN5C LN6C LN5C LS448 JP 7 8 OFF 0.uF 9 TMR GREEN RED GREEN EN_SEL JP4 E6 R4 R R INTVCC PWRGD EXT HDX k 49.9k 7k PWRGD LOW % E5 E8 % % ON ON U FAULT FAULT ON JP 6 E9 R C8 * STATUS STATUS E9 PROBE 0K 0.uF 0 % 9 EN EP 7 E E R5 C9 EN E0 EN 0K 0.uF STATUS STATUS E0 % ON 6 QFN8UFD-4X5 5 E ON ON FAULT FAULT EN_SEL 4 E EXT SENSE+ IN PWRGD R6 R7 R8 PWRGD VON_SEL RON_SEL 7k 49.9k 8k 8 LOW % % TMR VS+ V 5 4 % JP C5 5V VIN 47nF 6V D6 D7 D8 6.V LN5C LN6C LN5C JP6 7 8 OFF GREEN RED GREEN C JP5 0.uF HDX4-079 R8 R9 R0 K K K IN DG SENSE+ HG OUT IN DG SENSE+ HG OUT B B IN + C 00uF THICK TRACE WIDTH > 500 MIL SENSE+ SENSE+ OUT J E4 OUT ADJ., 9A NOTE: UNLESS OTHERWISE SPECIFIED. ALL RESISTORS ARE IN OHMS, 060. ALL CAPACITORS ARE IN MICROFARADS, 060. * ASSY -A -B U LTC48IUFD- LTC48IUFD- R5 60 McCarthy Blvd. 0 A HG CUSTOMER NOTICE APPROVALS Milpitas, CA 9505 A LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A Phone: (408) DG CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; TECHNOLOGY Fax: (408) HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. KIM T. LTC Confidential-For Customer Use Only VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APP ENG. VLADIMIR O. TITLE: SCHEMATIC CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR DUAL IDEAL DIODE AND HOT SWAP CONTROLLER TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. SIZE IC NO. REV. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE B LTC48IUFD-/- DEMO CIRCUIT 899A DATE: 0/5/0, 04:8 PM SHEET OF R0 0 C4 0.uF HG DG C5 + 00uF HGATE 5 J7 IN.9V - 8V E CPO IN DGATE SENSE+ HGATE OUT 7 CPO IN 8 DGATE SENSE+ SENSE- SENSE- SENSE- SENSE- OUT 4 D SMAJ7A R4 47 R 0 J4 RS W RS4 0.5W Q4 SiR58DP D CMHZ J8 Q SiR58DP R6 D CMHZ4706 Q8 SiR58DP E OUT 0 IN E7 Q7 SiR58DP C7 5nF Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dc899af 7

8 DEMO MANUAL DC899A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 0 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 60 McCarthy Blvd. Milpitas, CA 9505 Copyright 004, Linear Technology Corporation 8 LT 08 PRINTED IN USA Linear Technology Corporation 60 McCarthy Blvd., Milpitas, CA (408) FAX: (408) LINEAR TECHNOLOGY CORPORATION 0 dc899af