DESCRIPTIO FEATURES APPLICATIO S. LTC1422 Hot Swap Controller TYPICAL APPLICATIO

Transcription

1 LTC Hot Swap Controller FEATURES Allows Safe Board Insertion and Removal from a Live Backplane System Reset Output with Programmable Delay Programmable Electronic Circuit Breaker User-Programmable Supply Voltage Power-Up Rate High Side Driver for an External N-Channel FET Controls Supply Voltages from.v to V Undervoltage Lockout Soft Reset Input Glitch Filter on Available in -Pin Narrow PDIP and SO Packages APPLICATIO S U Hot Board Insertion Electronic Circuit Breaker DESCRIPTIO U The LTC is an -pin Hot Swap TM controller that allows a board to be safely inserted and removed from a live backplane. Using an external N-channel pass transistor, the board supply voltage can be ramped up at a programmable rate. A high side switch driver controls the N-channel gate for supply voltages ranging from.v to V. A programmable electronic circuit breaker protects against shorts. The output can be used to generate a system reset when the supply voltage falls below a programmable voltage. The pin can be used to cycle the board power or to generate a soft reset. The LTC is available in -pin PDIP and SO packages., LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. TYPICAL APPLICATIO U V Hot Swap / GND CNECTOR CNECTOR R 0.00Ω MTB0N0V LTC GND C 0.µF R 0Ω SENSE C 0.µF.k % R.k % µp V BACKPLANE PLUG-IN CARD TA0 fb

2 LTC ABSOLUTE MAXIMUM RATINGS (Note ) W W W Supply Voltage ( )....V Input Voltage (, SENSE)... 0.V to ( 0.V) Input Voltage (, )... 0.V to.v Output Voltage ()... 0.V to 0V Output Voltage ()... 0.V to 0V Operating Temperature Range LTCC... 0 C to 0 C LTCI... 0 C to C Storage Temperature Range... C to 0 C Lead Temperature (Soldering, 0 sec) C U PACKAGE/ORDER I FOR GND N PACKAGE -LEAD PDIP TOP VIEW SENSE S PACKAGE -LEAD PLASTIC SO T JMAX = 0 C, θ JA = 0 C/W (N) T JMAX = 0 C, θ JA = 0 C/W (S) W U ATIO ORDER PART NUMBER LTCCN LTCCS LTCIN LTCIS U S PART MARKING I Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. = V unless otherwise noted. SYMBOL PARAMETER CDITIS MIN TYP MAX UNITS DC Characteristics I CC Supply Current = ma V LKO Undervoltage Lockout.0.. V V LKH Undervoltage Lockout Hysteresis 0 mv V Pin Voltage Threshold.0.. V V Pin Threshold Line Regulation V V 0.. mv V HST Pin Voltage Threshold Hysteresis.0 mv V TM Pin Voltage Threshold.0.. V V TM Pin Threshold Line Regulation V V mv V TMHST Pin Voltage Threshold Hystersis mv I TM Pin Current Timer On, GND V.V..0. µa Timer Off, V =.V 0 ma V CB Circuit Breaker Trip Voltage V CB = ( V SENSE ) 0 mv I CP Pin Output Current Charge Pump On, V = GND 0 µa Charge Pump Off, V = 0 ma V External N-Channel Gate Drive V 0 V V HI Pin Threshold High..0. V V LO Pin Threshold Low.0.. V V HYST Pin Hysteresis 0 mv V OL Output Low Voltage, I O = ma V I PU Logic Output Pull-Up Current = GND µa t RST Soft Reset Time 0 µs Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. fb

3 LTC TYPICAL PERFORMANCE CHARACTERISTICS U W SUPPLY CURRENT (µa) Supply Current vs Supply Voltage 00 T A = C 000 SUPPLY CURRENT (µa) Supply Current vs Temperature = V VOLTAGE (V) Gate Voltage (V ) vs Supply Voltage T A = C I G = 0A 0 0 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) G0 G0 G0..0. Gate Voltage (V ) vs Temperature = V I G = 0A Gate Current vs Supply Voltage T A = C V G = 0V Gate Current vs Temperature = V V G = 0V VOLTAGE (V)....0 CURRENT (µa) 0 CURRENT (µa) SUPPLY VOLTAGE (V). 0 G0 G0 G0 FEEDBACK THRESHOLD VOLTAGE (V) Feedback Threshold Voltage vs Supply Voltage T A = C HIGH THRESHOLD LOW THRESHOLD FEEDBACK THRESHOLD VOLTAGE (V) Feedback Threshold Voltage vs Temperature HIGH THRESHOLD LOW THRESHOLD GLITCH FILTER TIME (µs) Glitch Filter Time vs Feedback Transient T A = C.0 0 SUPPLY VOLTAGE (V) FEEDBACK TRANSIENT (mv) G0 G0 G09 fb

4 LTC TYPICAL PERFORMANCE CHARACTERISTICS U W THRESHOLD VOLTAGE (V) Threshold Voltage vs Supply Voltage T A = C THRESHOLD VOLTAGE (V) Threshold Voltage vs Temperature = V = V = V CURRENT (µa) Current vs Supply Voltage. T A = C SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) G0 G G CURRENT (µa) Current vs Temperature = V PIN THRESHOLD VOLTAGE (V) Pin Threshold Voltage vs Supply Voltage HIGH THRESHOLD LOW THRESHOLD T A = C PIN THRESHOLD VOLTAGE (V) Pin Threshold Voltage vs Temperature = V INPUT HIGH INPUT LOW SUPPLY VOLTAGE (V).0 0 G G G CURRENT LIMIT THRESHOLD (mv) Current Limit Threshold vs Temperature = V PULL-UP CURRENT (µa) 0 0 Pull-Up Current vs Temperature = V G G fb

5 LTC TYPICAL PERFORMANCE CHARACTERISTICS U W Voltage vs Temperature = V ma PULL-UP 0 Pin Pulse (Soft Reset) Time vs Temperature VOLTAGE (V) PIN PULSE TIME (µs) = V = V = V G9 0 0 G0 PIN FUNCTIS U U U (Pin ) : Open drain output to GND with a µa pull-up to. This pin is pulled low when the voltage at the (Pin ) goes below the pin threshold. The pin will go high one timing cycle after the voltage at the pin goes above the pin threshold. An external pull-up resistor can be used to speed up the rising edge on the pin or pull the pin to a voltage higher or lower than. (Pin ): Analog Input Pin. The threshold is set at.0v with 0mV hysteresis. When the pin is pulled high, the timer turns on for one cycle, then the charge pump turns on. When the pin is pulled low longer than 0µs, the pin will be pulled low and remain off until the pin is pulled high. If the pin is pulled low for less than µs a soft reset will occur. The charge pump remains on, and the pin is pulled low for one timing cycle starting 0µs from the falling edge of the pin. The pin is also used to reset the electronic circuit breaker. If the pin is cycled low and high following the trip of the circuit breaker, the circuit breaker is reset and a normal power-up sequence will occur. (Pin ): Analog system timing generator pin. This pin is used to set the delay before the charge pump turns on after the pin goes high. It also sets the delay before the pin goes high, after the output supply voltage is good, as sensed by the pin. When the timer is off, an internal N-channel shorts the pin to ground. When the timer is turned on, a µa current from is connected to the pin and the voltage starts to ramp up with a slope given by: dv/dt = µa/c. When the voltage reaches the trip point (.V), the timer will be reset by pulling the pin back to ground. The timer period is given by: (.V C )/µa. GND (Pin ): Chip Ground. (Pin ): Analog comparator input used to monitor the output supply voltage with an external resistive divider. When the voltage on the pin is lower than the.v, the pin will be pulled low. An internal filter helps prevent negative voltage glitches from triggering a reset. When the voltage on the pin rises above the trip point, the pin will go high after one timing cycle. fb

6 LTC PIN FUNCTIS U U U (Pin ): The high side gate drive for the external N-Channel. An internal charge pump guarantees at least 0V of gate drive when is V. The slope of the voltage rise or fall at the is set by an external capacitor connected between and GND, and the 0µA charge pump output current. When the circuit breaker trips, the undervoltage lockout circuit monitoring trips, or the pin is pulled low for more than 0µs, the pin is immediately pulled to GND. SENSE (Pin ) : Circuit Breaker Set Pin. With a sense resistor placed in the supply path between and SENSE, the circuit breaker will trip when the voltage across the resistor exceeds 0mV for more than 0µs. If the circuit breaker trip current is set to twice the normal operating current, only mv is dropped across the sense resistor during normal operation. To disable the circuit breaker, and SENSE can be shorted together. (Pin ): The positive supply input, ranging from.v to.v for normal operation. I CC is typically 0.mA. An undervoltage lockout circuit disables the chip until the voltage at is greater than.v. BLOCK DIAGRA W SENSE 0mV Q CHARGE PUMP COMP REF COMP.V UVL 0µs FILTER.V REFERENCE REF µa LOGIC 0µs GLITCH FILTER COMP REF COMP µa Q GND BD fb

7 LTC APPLICATIS INFORMATI Hot Circuit Insertion When circuit boards are inserted into a live backplane, the supply bypass capacitors on the board can draw huge transient currents from the backplane power bus as they charge up. The transient currents can cause permanent damage to the connector pins and cause glitches on the system supply, causing other boards in the system to reset. The LTC is designed to turn a board s supply voltage on and off in a controlled manner, allowing the board to be safely inserted or removed from a live backplane. The chip also provides a system reset signal to indicate when board supply voltage drops below a programmable voltage. Power Supply Ramping The onboard power supply is controlled by placing an external N-channel pass transistor in the power path (Figure ). R provides current fault detection and R prevents high frequency oscillation. By ramping up the gate of the pass transistor at a controlled rate, the transient surge current (I = C dv/dt) drawn from the main backplane supply can be limited to a safe value when the board makes connection. 0V SLOPE = 0µA/C t t Figure. Supply Turn-On F0 equal to 0µA/C (Figure ), where C is the external capacitor connected between the pin and GND. The ramp time for the supply is equal to: t = ( C)/ 0µA. After the pin has been pulled low for more than 0µs, the is immediately pulled to GND. Voltage Monitor The LTC uses a.v bandgap reference, precision voltage comparator and a resistive divider to monitor the output supply voltage (Figure ). VCC R R 0Ω R R C SENSE LTC R GND C Figure. Supply Control Circuitry F0 LTC LOGIC SENSE COMP.V REFERENCE C µa Q R µp When power is first applied to the chip, the gate of the N-channel (Pin ) is pulled low. After the pin is held high for at least one timing cycle, the charge pump is turned on. The voltage at begins to rise with a slope C Figure. Supply Monitor Block Diagram F0 fb

8 LTC APPLICATIS INFORMATI V V V V V.V.V 0µs 0µs (typ) µs F0 Figure. Supply Monitor Waveforms When the voltage at the pin rises above its reset threshold (.V), the comparator COMP output goes high, and a timing cycle starts (Figure, time points and ). After a complete timing cycle, is pulled high. The µa pull-up current source to on has a series diode so the pin can be pulled above by an external pull-up resistor without forcing current back into supply. When the supply voltage at the pin drops below its reset threshold, the comparator Comp output goes low. After passing through a glitch filter, is pulled low (time point ). If the pin rises above the reset threshold for less than a timing cycle, the output will remain low (time point ). Glitch Filter The LTC has a glitch filter to prevent from generating a system reset when there are transients on the pin. The filter is 0µs for large transients (greater than 0mV) and up to 0µs for small transients. The relationship between glitch filter time and the transient voltage is shown in Typical Performance curve: Glitch Filter Time vs Feedback Transient. Soft Reset In some cases a system reset is desired without a power down. The pin can signal the pin to go low without turning off the external N-channel (a soft reset). This is accomplished by holding the pin low for only µs or less (Figure, time point ). At about 0µs from the falling edge of the pin (time point ) the pin goes low and stays low for one timing cycle. Figure. Soft Reset Waveforms 0µs F0 If the pin is held low for longer than 0µs (typ), the gate will turn off and the pin will eventually go low (time points, and ). Timer The system timing for the LTC is generated by the circuitry shown in Figure. The timer is used to set the turn-on delay after the pin goes high and the delay before the pin goes high after the output supply voltage is good as sensed by the pin. LTC µa.v R SENSE COMP LOGIC Q R C C SUPPLY MITOR R F0 Figure. System Timing Block Diagram fb

9 LTC APPLICATIS INFORMATI When the timer is off, the internal N-channel shorts the pin to ground. When the timer is turned on, a µa current from is connected to the pin and the voltage on the external capacitor C starts to ramp up with a slope given by: dv/dt = µa/c. When the voltage reaches the trip point (.V), the timer will be reset by pulling the pin back to ground. The timer period is given by: (.V C)/µA. For a 00ms delay, use a 0.µF capacitor. Electronic Circuit Breaker The LTC features an electronic circuit breaker function that protects against short circuits or excessive currents on the supply. By placing a sense resistor between the supply input and SENSE pin, the circuit breaker will be tripped whenever the voltage across the sense resistor is greater than 0mV for more than 0µs. When the circuit breaker trips, the pin is immediately pulled to ground and the external N-channel is quickly turned off. When the pin is cycled off for greater than 0µs and then on as shown in Figure, time point, the circuit breaker is reset and another timing cycle is started. At the end of the timer cycle (time point ), the charge pump will turn on again. If the circuit breaker feature is not required, the SENSE pin should be shorted to. If more than 0µs of response time is needed to reject supply noise, an external resistor and capacitor can be added to the sense circuit as shown in Figure. Connection Sense with Pin The pin can be used to sense board connection to the backplane as shown in Figure 9. Using staggered connection pins, ground mates first to discharge any static build up on the board, followed by the connection and all other pins. When makes connection, the bases of transistors Q and Q are pulled high turning them on and pulling the pin to ground. When the base connector pins of Q and Q finally mate to the backplane, the bases are shorted to ground. This turns off Q and Q and allows the pin to pull high and start a power-up cycle. The base connection pins of Q and Q should be located at opposite ends of the connector V SENSE 9 0 Figure. Current Fault Timing R CF R F SENSE LTC C F0 Figure. Extending the Short-Circuit Protection Delay F0 because most people will rock the board back and forth to get it seated properly. A software-initiated power-down cycle can be started by momentarily turning on transistor Q, which will pull the pin to ground. If the pin is held low for greater than 0µs, the pin is pulled to ground. If the low pulse on the pin is less than µs, a soft reset is generated. Hot Swapping Two Supplies With two external pass transistors, the LTC can switch two supplies. In some cases, it is necessary to bring up the dominant supply first during power-up and ramp it down last during the power-down phase. The circuit in Figure 0 shows how to program two different delays for the pass transistors. The V supply is powered up first. R R fb 9

10 LTC APPLICATIS INFORMATI R R / CNECTOR CNECTOR 0k 0k Q Q 0k Q REF C SENSE LOGIC COMP LTC C R F09 Q: N00LT Q, Q: MMBT90LT Figure 9. Pin Circuitry V IN.V V IN V CURRENT LIMIT: A C 0.µF V. LTC SENSE GND R 0.0Ω / Si9 0Ω R 0k C 0.0µF V D N R M Q / Si99 R 0Ω C 0.0µF V.V V R.k % TRIP POINT:.V R k % F0 Figure 0. Switching V and.v and C are used to set the rise and fall delays on the V supply. Next, the.v supply ramps up with a 0ms delay set by R and C. On the falling edge, the.v supply ramps down first because R is bypassed by the diode D. Using the LTC as a Linear Regulator The LTC can be used to Hot Swap the primary supply and generate a secondary low dropout regulated supply. Figure shows how to switch a V supply and create a.v supply using the reset comparator and one additional transistor. The pin is used to monitor the.v output. When the voltage on the gate of Q increases, the.v increases. At the.v threshold, the reset comparator will trip. The pin goes high which turns on Q. This lowers the voltage on the gate of Q. This feedback loop is compensated by the capacitor C and the resistors R and R. 0 Hot Swapping V DC/DC Module with Active Low On/Off Control Signal Using a.v Zener and a resistor, the LTC can switch supplies much greater than the V pin rating. As shown in Figure, the switching FET is connected as a common source driver rather than the usual source follower used in previous applications. This allows the ground of the LTC to sit at the negative terminal of the V input. The clamp circuit of R and D provides power to the LTC. The resistive divider R and R at the pin monitors the input supply. The switching FET is prevented from turning on until the input supply is at least V. Using the reset comparator to monitor the gate voltage allows the module to be turned on after the gate has reached a minimum level plus one timing cycle. A high voltage transistor Q is used to translate the signal to the module On/Off input. fb

11 LTC APPLICATIS INFORMATI Since the pass transistor is in a common source configuration, care must be taken to limit the inrush current into capacitor C. One way is to precharge C using resistor R. As the input supply is ramping up, current is flowing through R and charging the capacitor C. Once the input supply crosses V, there is a timing cycle followed by the ramp-up of the pin. By this time the capacitor C is sufficiently charged, thereby limiting the inrush current. Another method to limit the inrush current is to slow down the ramp-up rate of the pin. Hot Swapping V DC/DC Module with Active High On/Off Control Signal This application is identical to the previous except for the polarity of the module s on/off signal. The polarity reversal is accomplished by transistor Q in Figure. Hot Swapping Redundant V In critical situations, redundant input supplies are necessary. In Figure a redundant V input is switched to a power module. Supplies and are wire OR ed using two diodes D and D. This results in the most negative of these two supplies being used to drive the power module. If one of the supplies is disconnected or a fuse opens, the fault signal will be activated via diodes D and D and the reset comparator at the pin. The IN signal on the Vicor module is controlled using the high voltage PNP Q. Once the module s minus input pin is more negative than the base of Q plus a diode drop, Q will turn off and the module will turn on. This occurs when the source of plus a Zener voltage (D) is more positive than the drain of (in other words, when the switching FET has only.v across its drain source). Hot Swapping V Module with Isolated Controller A power supervisory controller will sometimes reside on an isolated supply with responsibility for other supplies. Figure shows how to Hot Swap a controller s V supply and a V module using two LTCs. Assuming the V supply comes up first, the controller waits for a power good signal from the V circuit. Once it receives the right signals the controller activates the IN pin of the Vicor power module. Power Supply Sequencer A circuit that forces two supply voltages to power up together is shown in Figure. The input supply voltages may power up in any sequence, but both input voltages must be within tolerance before and Q turn on. Backto-back transistors and Q ensure isolation between the two supplies. When the V input powers up before.v, and Q remain off and the V output remains off until the.v input is within tolerance as sensed by resistors R and R. When the.v input powers up before V, the diode D will pull up the V supply output with it. Once the V input powers up and is within tolerance as sensed by R and R, and Q will turn on in about ms and pull the V output up to its final voltage. V IN V CURRENT LIMIT:.A LTC GND SENSE R 0.0Ω MMFTN0ELT Q MMFTN0ELT 0Ω R.M C 0.µF V R 0Ω C 0.00µF V R 0k Q PN R.k % R.k %.V V C 0.µF V F Figure. Switching V and Generating.V fb

12 LTC APPLICATIS INFORMATI Power N-Channel and Sense Resistor Selection The decision of which external power N-Channel to use is dependent on its maximum current rating and the maximum allowed current times R DS() drop across the transistor. Table lists some transistors that are available. Table lists some current sense resistors that can be used with the circuit breaker. Since this information is subject to change, please verify the part numbers with the manufacturer. Table lists the web sites of several manufacturers. Table. N-Channel Selection Guide CURRENT LEVEL (A) PART NUMBER DESCRIPTI MANUFACTURER 0 to MMDFN0HD Dual N-Channel SO- Semiconductor R DS() = 0.Ω to MMSFN0HD Single N-Channel SO- Semiconductor R DS() = 0.0Ω to 0 MTB0N0V Single N-Channel DD Pak Semiconductor R DS() = 0.0Ω 0 to 0 MTBN0HD Single N-Channel DD Pak Semiconductor R DS() = 0.009Ω Table. Sense Resistor Selection Guide CURRENT LIMIT VALUE PART NUMBER DESCRIPTI MANUFACTURER A LR00R00 0.0Ω 0.W % Resistor IRC-TT A LR00R0 0.0Ω 0.W % Resistor IRC-TT.A LR00R00 0.0Ω 0.W % Resistor IRC-TT.A WSLR0F 0.0Ω W % Resistor Vishay-Dale A LR00R00 0.0Ω 0.W % Resistor IRC-TT 0A WSRR00F 0.00Ω W % Resistor Vishay-Dale Table. Manufacturers Web Sites MANUFACTURER TEMIC Semiconductor International Rectifier Semiconductor Harris Semiconductor IRC-TT Vishay-Dale WEB SITE fb

13 LTC APPLICATIS INFORMATI AT&T JW00A-E 0W R k R 0k C 00µF 00V V IN V IN SENSE SENSE /OFF V V FUSE Q MMBTLT R.k C 0.µF V LTC SENSE GND D.V NA CIRCUIT TURNS WHEN V IN > V CIRCUIT FOR ACTIVE LOW TURN- MODULES C µf V R M R 0k C 0.µF V IRF0 R 0Ω 0Ω OPTIAL PRECHARGE RESISTOR F Figure. Switching V to an AT&T Module V FUSE R k Q MMBTLT R.k C 0.µF V LTC SENSE GND R 0k D.V NA C µf V R M R 0k C 0.µF V C 00µF 00V 0Ω _ R.k VICOR VI-J0-CY IN _ V Q MMBTLT CIRCUIT TURNS WHEN V IN > V CIRCUIT FOR ACTIVE HIGH TURN- MODULES IRF0 R 0Ω OPTIAL PRECHARGE RESISTOR F Figure. Switching V to a Vicor Module fb

14 LTC APPLICATIS INFORMATI COMM RETURN V V FUSE FUSE R 0k R 0k D N D N D MUR D MUR R k R.k N FAULT R0.k C 0.µF V LTC GND SENSE R9 k R 0k TURNS WHEN V IN > V FAULT GOES LOW WHEN EITHER SUPPLY FAILS D.V NA Figure. Hot Swapping Redundant V Supplies C 00µF 00V C µf V R 0k C 0.µF V _ IRF0 R 0Ω VICOR VI-J0-CY IN 0Ω OPTIAL PRECHARGE RESISTOR _ Q MPSA V F V C 0.µF V LTC SENSE GND R9 0.Ω Q R0 0Ω C 0.0µF V k % R 0k % C µf V µp PWRGD GND R.k R.k R k R.k C 00µF 00V _ VICOR VI-J0-CY IN _ V V FUSE R.k N R.k C 0.µF V LTC GND SENSE D.V NA CIRCUIT TURNS WHEN V IN > V CIRCUIT FOR ACTIVE HIGH TURN- MODULES C µf V R M R 0k C 0.µF V 0Ω IRF0 R 0Ω N F OPTIAL PRECHARGE RESISTOR Figure. Switching V to a Vicor Module with Isolated Controller fb

15 LTC APPLICATIS INFORMATI V IN.V V IN V R.k % R k % R 0k SENSE LTC GND R.k % R k % / MMDF N0E 0Ω C 0.0µF V / MMDF N0E.V D MBRS0T V F Figure. Power Supply Sequencer PACKAGE DESCRIPTI.00. (.0.) U N Package -Lead PDIP (Narrow.00 Inch) (Reference LTC DWG # 0-0-0).0.0 (..).0 ±.00 (.0 ± 0.).00* (0.0) MAX.00.0 (0.0 0.) ( ).0 (.) TYP.00 (.) BSC NOTE: INCHES. DIMENSIS ARE MILLIMETERS *THESE DIMENSIS DO NOT INCLUDE MOLD FLASH OR PROTRUSIS. MOLD FLASH OR PROTRUSIS SHALL NOT EXCEED.00 INCH (0.mm). ±.0* (. ± 0.).0 (.0) MIN.00 (0.0).0 ±.00 (0. ± 0.0) MIN N 00. MIN.00 BSC.00 ±.00 TYP.0 ±.00 RECOMMENDED SOLDER PAD LAYOUT.0 ± (0.0 0.) (0. 0.0) S Package -Lead Plastic Small Outline (Narrow.0 Inch) (Reference LTC DWG # 0-0-0) 0 TYP.0.09 (..) (0.0.0) (0. 0.) NOTE: INCHES TYP. DIMENSIS IN (MILLIMETERS). DRAWING NOT TO SCALE. THESE DIMENSIS DO NOT INCLUDE MOLD FLASH OR PROTRUSIS. MOLD FLASH OR PROTRUSIS SHALL NOT EXCEED.00" (0.mm) (0.0 0.).00 (.0) BSC.. (.9.9).9.9 (.0.00) NOTE.0. (.0.9) NOTE SO 00 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. fb

16 LTC TYPICAL APPLICATI Current Sensing with V Applications In the LTC, the SENSE pin threshold is 0mV below the pin. Typically, the current sense resistor is connected to the pin, but in V applications the sense resistor is connected to the negative terminal of the V supply. The circuit in Figure translates the current in the sense resistor to a resistor connected to the LTC SENSE pin. U The mirror current can be described as: I MIRROR = I LOAD R SENSE /R MIRROR. The mirror current flows through the trip resistor R TRIP. When the mirror current generates 0mV across R TRIP, the LTC will latch the pin low (0mV = I MIRROR R TRIP = I LOAD R SENSE /R MIRROR R TRIP ). This example uses a V input but this translation circuit can be used anywhere the current sense resistor is not tied to. The voltage drop across the current sense resistor R SENSE is proportional to the load current I LOAD. The voltage drop across R SENSE is buffered by the op amp follower and is forced on R MIRROR. V R k R.k C 0.µF V LTC GND SENSE D.V NA R k I MIRROR Q VNL R TRIP 0Ω C µf V LT00 R M R 0k R 0k C 0.µF V C 0.µF 00V 0Ω C 00µF 00V IRF0 R SENSE 0.0Ω LOAD OPAMP FUSE I MIRROR R MIRROR 9Ω I LOAD F Figure. Switching V with Current Sensing RELATED PARTS PART NUMBER DESCRIPTI COMMENTS LTC Hot Swap Controller -Pin Multiple Supplies LT0L/LT0H Negative Voltage Hot Swap Controller in SO- Operates from 0V to 0V LT High Voltage Hot Swap Controller in SO- Operates from 9V to 0V LT Fault Protected Hot Swap Controller Operates Up to.v, Protected to V LTCL/LTCH PCI-Bus Hot Swap Controller.V, V and ±V in Narrow -Pin SSOP LT -Channel Hot Swap Controller Operates from.v to V, Power Sequencing LTC Dual Hot Swap Controller in SO- or SSOP- Two Pins, Operates from.v to.v Linear Technology Corporation 0 McCarthy Blvd., Milpitas, CA 90- (0) -900 FAX: (0) fb LT/TP 00 K REV B PRINTED IN USA LINEAR TECHNOLOGY CORPORATI 99