FEATURES APPLICATIO S TYPICAL APPLICATIO. LTC1470/LTC1471 Single and Dual PCMCIA Protected 3.3V/5V V CC Switches DESCRIPTIO

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1 FEATRES Single / Switch in 8-Pin SO Package Dual / Switch in 6-Pin SO Package Built-In Current Limit and Thermal Shutdown Built-In Charge Pumps (No V Required) Extremely Low R DS(ON) MOSFET Switches Output Current Capability: A Inrush Current Limited (Drives 5µF Loads) Quiescent Current in Standby: µa No Parasitic Body Diodes Built-In XOR Function Eliminates Glue Logic Break-Before-Make Switching Controlled Rise and Fall Times Available in 8-Pin and 6-Pin SO Packages APPLICATIO S Set Top Box/Open Cable Notebook Computers Palmtop Computers Pen-Based Computers Handi-Terminals / Power Supply Switch TYPICAL APPLICATIO Dual Slot / Switch DESCRIPTIO LTC47/LTC47 Single and Dual Protected / Switches The LTC 47 switches the pins of a Personal Computer Memory Card International Association () card slot between three operating states: OFF, and. Two low R DS(ON) N-channel power MOSFETs are driven by a built-in charge pump which generates a voltage higher than the supply voltage to fully enhance each switch when selected by the input control logic. The LTC47 inputs are compatible with industry standard controllers. A built-in XOR ensures that both switches are never on at the same time. This function also makes the LTC47 compatible with both active-low and active-high controllers (see Applications Information section). The switch rise times are controlled to eliminate power supply glitching. The LTC47 features built-in SafeSlot TM current limit and thermal shutdown. The output is limited to A during short circuit to ground but A of peak operating current is allowed. The LTC47 is a dual version of the LTC47 and is available in a 6-pin SO package., LTC and LT are registered trademarks of Linear Technology Corporation. SafeSlot is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Linear Technology Product Family.. CONTROLLER IN LTC47 AOT AEN AEN BEN BEN (Hi-Z//) (Hi-Z//) k k DEVICE DESCRIPTION PACKAGE LT 3 Single VPP Driver/Regulator 8-Pin SO LT33 Dual VPP Driver/Regulator 6-Pin SO* LTC34 Single Switch Matrix 4-Pin SO LTC35 Dual Switch Matrix 4-Pin SSOP LTC47 Single Protected / Switch Matrix 8-Pin SO LTC47 Dual Protected / Switch Matrix 6-Pin SO* LTC47 Protected and VPP Switch Matrix 6-Pin SO* *Narrow Body 47/7 TA 47fa

2 LTC47/LTC47 ABSOLTE MAXIMM RATINGS W W W Supply Voltage ( ) (Note )... 7V Supply Voltage ( IN ) (Note )... 7V Enable Input Voltage... IN to (.3V) Output Voltage (OFF) (Note )... 7V to (.3V) Output Short-Circuit Duration... Indefinite (Note ) Operating Temperature LTC47C... C to 7 C LTC47E (Note 7)... 4 C to 85 C Junction Temperature... C Storage Temperature Range C to 5 C Lead Temperature (Soldering, sec)... 3 C PACKAGE/ORDER INFORMATION OT IN EN 3 EN 4 TOP VIEW S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = C, θ JA = 5 C/W OT W ORDER PART NMBER LTC47CS8 LTC47ES8 S8 PART MARKING 47 47E Consult LTC Marketing for parts specified with wider operating temperature ranges. AOT A IN AEN 3 AEN 4 5 B 6 B 7 8 TOP VIEW 6 AOT 5 A 4 A 3 BEN BEN B IN 9 S PACKAGE 6-LEAD PLASTIC SO T JMAX = C, θ JA = C/W ORDER PART NMBER LTC47CS ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 5 C. =, IN = (Note 3), unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS Supply Voltage Range V IN Supply Voltage Range V I 3VIN Supply Current Program to Hi-Z (Note 4). µa Program to, No Load (Note 4) 4 8 µa Program to, No Load (Note 4). µa I IN Supply Current Program to Hi-Z (Note 4). µa Program to (Note 4) 6 µa Program to (Note 4) 4 µa R ON Switch ON Resistance Program to, I OT = 5mA..6 Ω Switch ON Resistance Program to, I OT = 5mA.4.8 Ω I LKG Output Leakage Current OFF Program to Hi-Z, V V OT (Note 4) ± µa I LIM3V Current Limit Program to, V OT = V (Note 5) A I LIM Current Limit Program to, V OT = V (Note 5) A V ENH Enable Input High Voltage. V V ENL Enable Input Low Voltage.8 V I EN Enable Input Current V V EN ± µa 47fa

3 LTC47/LTC47 ELECTRICAL CHARACTERISTICS =, IN = (Note 3), T A = 5 C, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS t to t 3 Delay and Rise Time (Note 6) Transition from V to, R OT = Ω, C OT =..3. ms t 3 to t 5 Delay and Rise Time (Note 6) Transition from to, R OT = Ω, C OT =..5. ms t to t 5 Delay and Rise Time (Note 6) Transition from V to, R OT = Ω, C OT =..38. ms Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : For the LTC47, the two output pins (, 8) must be connected together and the two supply input pins (6, 7) must be connected together. For the LTC47, the two AOT pins (, 6) must be connected together, the two pins (8, 9) must be connected together, the two A supply input pins (4, 5) must be connected together, the two B supply pins (6, 7) must be connected together and the two pins (5, 3) must be connected together. Note 3: Power for the input logic and charge pump circuitry is derived from the IN supply pin(s) which must be continuously powered. Note 4: Measured current is per channel with the other channel programmed off for the LTC47. Note 5: The output is protected with foldback current limit which reduces the short-circuit (V) currents below peak permissible current levels at higher output voltages. Note 6: To 9% of final value. Note 7: The LTC47 is guaranteed to meet performance specifications from C to 7 C. Specifications over the 4 C to 85 C operating temperature range are assured by design, characterization and correlation with statistical process controls. TYPICAL PERFORMANCE CHARACTERISTICS W (LTC47 or / LTC47) SPPLY CRRENT (µa) Supply Current (OFF) T A = 5 C PROGRAMMED TO OFF 3VIN SPPLY CRRENT (µa) Supply Current ( ON) T A = 5 C PROGRAMMED TO, NO LOAD IN SPPLY CRRENT (µa) IN Supply Current (OFF) T A = 5 C PROGRAMMED TO OFF 3 4 SPPLY VOLTAGE (V) 3 4 SPPLY VOLTAGE (V) 3 4 IN SPPLY VOLTAGE (V) /7 G4 47/7 G5 47/7 G IN SPPLY CRRENT (µa) IN Supply Current ( ON) T A = 5 C PROGRAMMED TO, NO LOAD IN SPPLY CRRENT (µa) IN Supply Current ( ON) T A = 5 C PROGRAMMED TO, NO LOAD SWITCH RESISTANCE (Ω) Switch Resistance PROGRAMMED TO 3 4 IN SPPLY VOLTAGE (V) IN SPPLY VOLTAGE (V) JNCTION TEMPERATRE ( C) 5 47/7 G3 47/7 G 47/7 G7 47fa 3

4 LTC47/LTC47 TYPICAL PERFORMANCE CHARACTERISTICS W (LTC47 or / LTC47) SWITCH RESISTANCE (Ω) Switch Resistance PROGRAMMED TO JNCTION TEMPERATRE ( C) 5 INRSH CRRENT (A) OTPT VOLTAGE (V) Inrush Current ( Switch). T J = 5 C TIME (ms) C OT = 5µF R OT = 6.6Ω C OT = 5µF R OT = 6.6Ω C OT = 5µF R OT = 6.6Ω INRSH CRRENT (A) OTPT VOLTAGE (V) Inrush Current ( Switch). CRRENT LIMITED C OT = 5µF R OT = Ω T J = 5 C C OT = 5µF R OT = Ω TIME (ms).4 47/7 G6 47/7 G9 47/7 G8 PIN FNCTIONS LTC47 OT (Pins, 8): Output Pins. The outputs of the LTC47 are switched between three operating states: OFF, and. These pins are protected against accidental short circuits to ground by SafeSlot current limit circuitry which protects the socket, the card, and the system power supplies against damage. A second level of protection is provided by thermal shutdown circuitry which protects both switches against over-temperature conditions. IN (Pin ): Input Supply Pin. The IN supply pin serves two purposes. The first purpose is as the power supply input for the NMOS switch. The second purpose is to provide power for the input, gate drive, and protection circuitry for both the and switches. This pin must therefore be continuously powered. EN, EN (Pins 3, 4): Enable Inputs. The two Enable inputs are designed to interface directly with industry standard controllers and are high impedance CMOS gates with ESD protection diodes to ground, and should not be forced above IN or below ground. Both inputs have about mv of built-in hysteresis to ensure clean switching between operating modes. The LTC47 is designed to operate without V power. The gates of the NMOS switches are powered by charge pumps from the IN supply pins (see Applications Information section for more detail). The Enable inputs should be turned off (both asserted high or both asserted low) at least µs before the IN power is removed to ensure that both NMOS switch gates are fully discharged and both switches are in the high impedance mode. (Pin 5): Ground Connection. (Pins 6, 7): 3V Input Supply Pins. The supply pins serve as the power supply input for the switches. These pins do not provide any power to the internal control circuitry and therefore do not consume any power when unloaded or turned off. 4 47fa

5 LTC47/LTC47 PIN FNCTIONS LTC47 AOT, (Pins, 6, 8, 9): Output Pins. The outputs of the LTC47 are switched between three operating states: OFF, and. These pins are protected against accidental short circuits to ground by SafeSlot current limit circuitry which protects the socket, the card, and the system power supplies against damage. A second level of protection is provided by thermal shutdown circuitry. IN (Pins, ): Input Supply Pins. The IN supply pins serve two purposes. The first purpose is as the power supply input for the NMOS switches. The second purpose is to provide power for the input, gate drive, and protection circuitry. These pins must therefore be continuously powered. EN, EN (Pins 3, 4,, ): Enable Inputs. The enable inputs are designed to interface directly with industry standard controllers and are high impedance CMOS gates with ESD protection diodes to ground, and should not be forced above IN or below ground. All four inputs have about mv of built-in hysteresis to ensure clean switching between operating modes. The LTC47 is designed to operate without V power. The gates of the NMOS switches are powered by charge pumps from the IN supply pins (see Applications Information section for more detail). The enable inputs should be turned off at least µs before the IN power is removed to ensure that all NMOS switch gates are fully discharged and are in the high impedance mode. (Pins 5, 3): Ground Connections. (Pins 6, 7, 4, 5): 3V Input Supply Pins. The supply pins serve as the power supply input for the switches. These pins do not not provide any power to the internal control circuitry, and therefore, do not consume any power when unloaded or turned off. BLOCK DIAGRAM W (LTC47 or / LTC47) IN GATE CHARGE AND DISCHARGE CONTROL LOGIC.4Ω EN TTL-TO-CMOS CONVERTER BREAK-BEFORE- MAKE SWITCH AND CONTROL OSCILLATOR AND BIAS CHARGE PMP CRRENT LIMIT AND THERMAL SHTDOWN OTPT EN TTL-TO-CMOS CONVERTER GATE CHARGE AND DISCHARGE CONTROL LOGIC.Ω LTC47-BD 47fa 5

6 LTC47/LTC47 OPERATION The LTC47 (or / of the LTC47) consists of the following functional blocks: Input TTL/CMOS Converters The enable inputs are designed to accommodate a wide range of 3V and logic families. The input threshold voltage is approximately.4v with approximately mv of hysteresis. The inputs enable the bias generator, the gate charge pumps and the protection circuity which are powered from the supply. Therefore, when the inputs are turned off, the entire circuit is powered down and the supply current drops below µa. XOR Input Circuitry By employing an XOR function, which locks out the switch when the switch is turned on and locks out the switch when the switch is turned on, there is no danger of both switches being on at the same time. This XOR function also makes it possible to work with either active -low or active-high switch control logic (see Applications Information section for further details). Break-Before-Make Switch Control Built-in delays are provided to ensure that the and switches are non-overlapping. Further, the gate charge pump includes circuitry which ramps the NMOS switches on slowly (4µs typical rise time) but turns them off much more quickly (typically µs). Bias, Oscillator and Gate Charge Pump When either the or switch is enabled, a bias current generator and high frequency oscillator are turned on. The on-chip capacitive charge pump generates approximately V of gate drive for the internal low R DS(ON) NMOS switches from the IN power supply. Therefore, an external V supply is not required to switch the output. The IN supply current drops below µa when both switches are turned off. Gate Charge and Discharge Control All switches are designed to ramp on slowly (4µs typical rise time). Turn-off time is much quicker (typically µs). To ensure that both NMOS switch gates are fully discharged, program the switch to the high impedance mode at least µs before turning off the power supply. Switch Protection Both switches are protected against accidental short circuits with SafeSlot foldback current limit circuits which limit the output current to typically A when the output is shorted to ground. Both switches also have thermal shutdown which limits the power dissipation to safe levels. APPLICATIONS INFORMATION 6 W The LTC47/LTC47 are designed to interface directly with industry standard card controllers. Interfacing with the CL-PD67 Figure is a schematic diagram showing the LTC47 interfaced with a standard slot controller. The LTC47 accepts logic control directly from the CL-PD67. The XOR input function allows the LTC47 to interface directly to the active-low control outputs of the CL- PD67 for / voltage selection (see the following Switch Truth Table). Therefore, no glue logic is required to interface to this compatible card controller. CL-PD67 _3 _5.. IN LTC47 EN OT EN OT (OFF//) Figure. Direct Interface to CL-PD67 Controller k TO CARD PINS 47/7 F 47fa

7 LTC47/LTC47 APPLICATIONS INFORMATION W Truth Table for CL-PD67 Controller A 3 A 5 EN EN OT Hi-Z Hi-Z Interfacing with 365 Type Controllers The LTC47 also interfaces directly with 365 type controllers as shown in Figure. Note that the Enable inputs are connected differently than to the CL-PD67 controller because the 365 type controllers use activehigh logic control of the switches (see the following Switch Truth Table). No glue logic is required to interface to this type of compatible controller. 365 TYPE CONTROLLER A EN A EN.. IN LTC47 EN OT EN OT (OFF//) k TO CARD PINS Figure. Direct Interface with 365 Type Controller Truth Table for 365 Type Controller A EN A EN EN EN OT Hi-Z Hi-Z 47/7 F Supply Bypassing For best results bypass the supply input pins with capacitors as close as possible to the LTC47. Sometimes much larger capacitors are already available at the outputs of the and power supply. In this case it is still good practice to use. capacitors as close as possible to the device, especially if the power supply output capacitors are more than " away on the printed circuit board. Output Capacitors and Pull-Down Resistor The output pin is designed to ramp on slowly, typically 4µs rise time. Therefore, capacitors as large as 5µF can be driven without producing voltage spikes on the or IN supply pins (see graphs in Typical Performance Characteristics section). The output pin should have a. to capacitor for noise reduction and smoothing. A k pull-down resistor is recommended at the output to ensure that the output capacitor is fully discharged when the output is switched OFF. This resistor also ensures that the output is discharged between the and transition. Supply Sequencing Because the supply is the source of power for both of the switch control circuits, it is best to sequence the power supplies such that the supply is powered before, or simultaneous to, the application of. It is interesting to note, however, that the switches are NMOS transistors which require charge pumps to generate gate voltages higher than the supply rails for full enhancement. Because the gate voltages start at V when the supplies are first activated, the switches always start in the off state and do not produce glitches at the outputs when powered. If the supply must be turned off, it is important to program all switches to the Hi-Z or V state at least µs before the power is removed to ensure that the NMOS switch gates are fully discharged to V. Whenever possible, however, it is best to leave the IN pin(s) continuously powered. The LTC47/LTC47 quiescent current drops to <µa with all the switches turned off and therefore no power is consumed in the standby mode. 47fa 7

8 LTC47/LTC47 APPLICATIONS INFORMATION W TOTAL SYSTEM COST CONSIDERATIONS The cost of an additional step-up switching regulator, inductor, rectifier and capacitors to produce V for VPP can be eliminated by using an auxiliary winding on either the or output of the system switching regulator to produce an auxiliary supply for VPP power. And, because the LTC47/LTC47 do not require V power to operate (only ), the V VPP regulation and switching may be operated separately from the / switching. This increases system configuration flexibility and reduces total system cost by eliminating the need for a third regulator for V power. LTC4HV Auxiliary Winding Power Supply Figure 3 is a schematic diagram which describes how a loosely regulated power supply is created by adding an auxiliary winding to the inductor in a split / LTC4HV power supply system. An LT33, dual VPP regulator/driver with SafeSlot protection, produces clean, and V power from this loosely regulated output for the PC card slot VPP pins. (See LT3 and LT33 data sheets for further detail.) A turns ratio of :.8 is used for transformer T to ensure that the input voltage to the LT33 falls between 3V and V under all load conditions. The 9V output from this additional / LTC4HV ( REG) V IN PDRIVE NDRIVE SENSE SENSE V IN 6. TO 8V Q Q C pf R Ω R3 8k C 68µF D3 MBRS3T3 R Ω T* 3µH R5.33Ω R4 Ω.8: C3 µf D MBRS4 C4 pf D MBRS4 C5 µf OTPT () AVPPEN AVPPEN AVALID BVPPEN BVPPEN BVALID V S V S AEN AVPP OT AEN AVALID LT33 BEN ASENSE BEN BVPP OT BVALID BSENSE TO A SLOT VPP PINS FROM A PINS TO B SLOT VPP PINS FROM B PINS Q3 N7 Q4 N7 AVPPEN BVPPEN. A A B B * LPE-656-A6 DALE (65) A EN A IN B IN AEN LTC47 k TO A SLOT PINS A EN AEN B EN B EN BEN BEN AOT AOT k TO B SLOT PINS 47/7 F3 8 Figure 3. Cost Effective Complete SafeSlot Dual Power Management System (with Auxiliary Supply from LTC4HV Regulator Inductor) 47fa

9 LTC47/LTC47 APPLICATIONS INFORMATION W winding is rectified by diode D, added to the main output and applied to the input of the LT33. (Note that the auxiliary winding must be phased properly as shown in Figure 3.) When the V output is activated by a TTL high on either VPP enable lines, the section of the LTC4HV is forced into continuous mode operation. A resistor divider composed of R, R3 and switch Q3 forces an offset which is subtracted from the internal offset at the Sense input (pin 4) of the LTC4HV. When this external offset cancels the built-in 5mV offset, Burst Mode TM operation is inhibited and the LTC4HV is forced into continuous mode operation. (See LTC4HV data sheet for further detail.) In this mode, the auxiliary supply can be loaded without regard to the loading on the output of the LTC4HV. Continuous mode operation is only invoked when the LT33 is programmed to V. If the LT33 is programmed to V, or, power is obtained directly from the main power source (battery pack) through diode D. Again, the LT33 output can be loaded without regard to the loading of the main output. R4 and C4 absorb transient voltage spikes associated with the leakage inductance inherent in T s secondary winding and ensure that the auxiliary supply does not exceed V. Auxiliary Power from the LTC4 Output For low-battery count applications (<6.) it is necessary to modify the circuit of Figure 3. As the input voltage falls, the duty cycle increases to the point where there is simply not enough time to transfer energy from the primary winding to the auxiliary winding. For applications where V load currents exist in conjunction with these low input voltages, use the circuit shown in Figure 4. In this circuit, the auxiliary supply is generated from an overwinding on the inductor of the LTC4 regulator output. In Figure 3, power is drawn directly from the batteries through D when the regulator is in Burst Mode operation and the VPP pins require or. In this circuit, however, Q3 and Q4 force the LTC4 regulator into continuous mode operation whenever, or V is programmed at the VPP OT pins of the LT33. (See the LT3 and LT33 data sheets for further detail.) Burst Mode is a trademark of Linear Technology Corporation. / LTC4 ( REG) AENVPP AENVPP V IN PDRIVE NDRIVE SENSE SENSE HC V IN 5.4V TO V Q Q C pf R3 k Q3 N7 C 68µF D3 MBRS3T3 R Ω R Ω T* 5µH R4.33Ω C3 µf D MBRS 3.37: D4 8V AX SPPLY C5 68µF OTPT BENVPP BENVPP HC86 Q4 N7 *CTX-753 COILTRONICS (47) /7 F4 Figure 4. Deriving from the Output of the LTC4 for VPP Power 47fa 9

10 LTC47/LTC47 TYPICAL APPLICATIONS Dual Slot / Controller with SafeSlot Current Limit (Systems with No V Power Requirements). CL-PD67 A 3. A A B B A IN B IN LTC47 AEN (OFF//) k A 5 B 3 B 5 AEN BEN BEN AOT AOT (OFF//) k 47/7 TA Single Slot Controller with SafeSlot Current Limit Protection sing LT3 Single VPP Regulator/Driver V LOGIC 3V TO V* VPP_PGM VPP_ 5k EN EN V S VPP OT LT3 VPP VPP VPP_VALID VALID SENSE CIRRS LOGIC CL-PD67.. IN k _5 LTC47 EN T _3 EN T * FROM OVERWINDING ON OR INDCTOR IN SYSTEM POWER SPPLY. SEE FIGRES 3, 4 FOR FRTHER DETAIL 47/7 TA3 47fa

11 LTC47/LTC47 PACKAGE DESCRIPTION S8 Package 8-Lead Plastic Small Outline (Narrow.5 Inch) (Reference LTC DWG # 5-8-6).5 BSC.45 ± ( ) NOTE MIN.6 ± ( ).5.57 ( ) NOTE 3.3 ±.5 TYP RECOMMENDED SOLDER PAD LAYOT (.3.54).. (.54.58) 45 8 TYP ( ).4. (..54) (.46.7) ( ) NOTE: INCHES TYP. DIMENSIONS IN (MILLIMETERS). DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.6" (.5mm).5 (.7) BSC SO8 33 S Package 6-Lead Plastic Small Outline (Narrow.5 Inch) (Reference LTC DWG # 5-8-6) N.5 BSC.45 ± (9.84.8) NOTE MIN 3 N/.6 ± ( ) N N/.5.57 ( ) NOTE 3.3 ±.5 TYP.8. (.3.54) RECOMMENDED SOLDER PAD LAYOT.. (.54.58) 45 8 TYP ( ) (..54).6.5 (.46.7) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS).4.9 ( ) TYP. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.6" (.5mm).5 (.7) BSC Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights. S6 5 47fa

12 LTC47/LTC47 TYPICAL APPLICATIONS V LOGIC 3V TO V* A_VPP_PGM A_VPP_ 5k AV S AEN AEN BV S AVPP OT. VPP VPP # AVALID ASENSE LT33 VPP B_VPP_PGM B_VPP_ BEN BEN BVPP OT VPP # VPP_VALID BVALID BSENSE CL-PD67. A A B B A 3V. A IN B IN AEN LTC47 (OFF//) k A AEN B 3V B BEN BEN AOT AOT (OFF//) k * FROM OVERWINDING ON OR INDCTOR IN SYSTEM POWER SPPLY. SEE FIGRES 3, 4 FOR FRTHER DETAILS 47/7 TA4 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC345/LTC345A 3mA (I OT ),.5MHz, Synchronous Step-Down 95% Efficiency, V IN =.7V to 6V, V OT =.8V, I Q = µa LTC345A-.5 DC/DC Converters I SD = <µa, ThinSOT Package LTC345A-.8 LTC346/LTC346B 6mA (I OT ).5MHz, Synchronous Step-Down 95% Efficiency, V IN =. to 5., V OT =.6V, I Q = µa DC/DC Converter I SD = <µa, ThinSOT Package LTC34.5A (I OT ), 4MHz, Synchronous Step-Down 95% Efficiency, V IN =. to 5., V OT =.8V, I Q = 6µA DC/DC Converter I SD = <µa, MS Package LTC34.5A (I OT ), 4MHz, Synchronous Step-Down 95% Efficiency, V IN =. to 5., V OT =.8V, I Q = 6µA DC/DC Converter I SD = <µa, TSSOP6E Package LTC343 3A (I OT ), Sink/Source, MHz, Monolithic Synchronous 9% Efficiency, V IN =. to 5., V OT = V REF/, I Q = 8µA Regulator for DDR/QDR Memory Termination I SD = <µa, TSSOP6E Package LT343 6V,.75A (I OT ), khz, High Efficiency Step-Down 9% Efficiency, V IN = 5. to 6V, V OT =.V, I Q =.5mA DC/DC Converter I SD = 5µA, TSSOP6E Package LTC344 6mA (I OT ), MHz, Synchronous Buck-Boost 95% Efficiency, V IN =. to 5., V OT =., I Q = 5µA DC/DC Converter I SD = <µa, MS Package Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA (48) 43-9 FAX: (48) fa LT/LT 75 REV A PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 995