Wearable Directional Sound Amplifier

Transcription

1 Wearable Directional Sound Amplifier By Daehyun Han Micheal Westfall Patrick Zhou Final Report for ECE 445, Senior Design, Spring 2017 TA : Michael Fatina 03 May 2017 Project No. 86

2 Abstract This paper describes the microphone array project that our team chose for Senior Design. The project is an array of eight microphones in a specific arrangement, worn on a person s body, that would sample audio and then send the audio data to a processor. This audio data would then be manipulated in real time using a process known as beamforming which would amplify the sound from certain directions relative to the array and attenuate sounds from other directions. The final result is an array that allows the user to pick which sound sources he wants to hear, based on their location relative to the array. While we were unable to successfully build the array, the research and design portions of our project can be used to give another team a significant head start in building a similar device. ii

3 Contents 1. Introduction Section head 1 2 Design Hardware Design Microphone Array Microphone Circuit Microcontroller Output Digital to Analog Converter Audio Jack SD Card Power Battery Pack Voltage Regulator Software Design FPGA Module I 2 S Communication Protocol SPI Communication Protocol Altera Cyclone II DE2 FPGA Development and Education board Microcontroller Design Verification Beamforming Costs Parts Labor Grand Total Conclusion Accomplishments Uncertainties 19 iii

4 6.3 Ethical considerations Future work 20 References 21 Appendix A Requirement and Verification Table 22 iv

5 1. Introduction There are two main scientific motivations behind doing this project. The first is to create a device that would allow researchers to study the effects that the human body has on the sound received by a microphone array worn on the person. Modern day device that utilize microphone arrays are generally placed on a flat surface such as on a table or a wall. Wearing a microphone array will add many other factors such as how sound reflects off of human skin and having many sound waves blocked by the body as well. The second scientific motivation is to acquire audio data from an array with more microphones than a typical array contains. This data will be used in future research to determine the cost benefit analysis on number of microphones used and quality of data obtained. 1

6 2 Design 2.1 Hardware Design Our design consists of five main modules as can be seen in Figure 2 below. The first module, the microphone array, contains the microphones that sample incoming sound, turning them into digital data. The data is then sent to the second module, the FPGA, which takes the eight parallel data inputs and serializes them for the microcontroller. The third module contains the microcontroller that takes serial data from the FPGA and can either send the raw data to an SD card or apply a beamforming algorithm on it and send the digital data to a DAC and then an audio jack so that the wearer can hear the altered sound in real time. The SD card and audio jack together form the output of the device and the fourth module. For power, the fifth module, we simply purchased a battery pack that holds three AA batteries and outputs 4.5 volts. This is sent to a voltage regulator that lowered the voltage to 3.3 volts, the required voltage for the microcontroller and each microphone. The Altera FPGA development board comes with its own power supply that is plugged into the wall. Figure 1. Modules in our Device 2

7 2.1.1 Microphone Array The microphone array is supposed to consist of eight Knowles SPH0645LM4H-B digital microphones arranged in the order shown below in Figure 2. The order of the microphones is not that important as long as it meet two criteria; one, do they form a straight line and two, do they have even spacing between the microphones in the x and y directions. A straight line is not allowed for two reasons: it has been done before and heavily studied and two it destroys the 2 dimensional spatial resolution, in other words can t tell where the sound is coming from in terms of two angles, left or right, up or down. When even spacing is talked about, it means that if all the microphones were shifted into a straight horizontal or vertical line, the microphones would be evenly spaced. This is so the array can attenuated sound at high frequencies. The array also needed to handle the smallest frequency possible, so it needed the largest aperture; to make it the largest possible size, the average size of human torso was used, which is about 46 cm [2]. Figure 2. Microphone array: The circles represent each microphone while the rectangle represents the board they sit on Other than that, the array was supposed to be researched as to see its strengths and weakness when it comes to real signals, not just pure tones Microphone Circuit A digital microphone was chosen over an analog microphone because it meant less oversight, since then a ADC would need to be chosen and all the things that come with it, like proper inputs. It means more error could occur as it would be an additional piece to solder on and to design on a pcb. After that a high sampling, and high bit precision was needed. The overall loudness the microphone could handle was less important. The noise ratio of the microphone was important as well, since a noisy signal collection destroys the original signal. Since humans can hear frequencies from 20 Hz to 20 khz, a microphone was needed that can sample at rate of somewhere close to 40 khz which nyquist sampling rate for 20 khz. SPH0645LM4H-B was chosen because it can handle loud sounds ( db) which is around the loudness that starts to hurt [3]. It also had a high signal to noise ratio of 65 db at a sound pressure level (spl) of 94 db. It had an 18-bit precision level, which is two more than a 16 bit microphone which is already very good. It could sample at rate of 32 to 64 khz allowing for maximum frequency of 16 to 32 3

8 khz, which is well above what is needed for human hearing. The microphone was a very good pick for the project; the only problem with it is that it drew 600 μa which was more than 300 μa for a typical analog microphone of comparable sizes. Vendors sold breakout boards with microphone circuit on it, but it was decided not to get any as they were more expensive than making them. Figure 3 shows a circuit of the microphone. Figure 3: Circuit Schematic of Single Microphone The values were suggested by the producer of the microphones and were subject to change after testing. The resistors in series with BCLK, DOUT, and WS (R1, R2, R3) are for dampening purposes, so as to improve signal integrity by reducing overshoot and ringing caused by wire inductances and capacitance. C1 is a decoupling capacitor and is meant to ensure stable input and are most effective when trace is minimized which is already wanted since that reduces costs. C2 is a RF filter capacitor which is used to get rid of unwanted frequencies in voltage signal, thus improving voltage input signal Microcontroller Figures 4 and 5 show the microcontroller DSPIC33FJ128GP802 which was chosen because of it high cpu speeds (40 MIPS), it had a operating voltage similar to the microphones. Which is good since multiple voltage regulators of the same kind could be bought and used to power all the circuitry. It has multiple I/O pins which allows for add-ons and has a 16 bit DAC on it which allows quality real time listening. A tank capacitor is suggested for circuits with long traces and acts a local power supply and is subject to change according to the trace resistance and the acceptable voltage sag. 4

9 Figure 4. Left side of microcontroller Figure 5. Right Side of microcontroller 5

10 Figure 6 shows that holes are drilled into the pcb for easier debugging. Figure 6. holes to all the inputs and outputs of the main unit Output On the main unit, there are additional outputs on it. It has an audio jack as well as an SD card Digital to Analog Converter In order for the audio jack to work it needs a DAC to convert a digital signal to an analog one. It was first decided that an external DAC would be used but then we found a microcontroller with its own DAC on it. Not to mention that the DAC we chose was an 8-bit DAC without really how poor the sound quality would be Audio Jack The audio jack is of the standard size 3.5 mm. We chose a mono jack first and planned to upgrade it to a stereo once circuit and software was working and tested. Figure 7 shows that the audio jack is on the main unit and is at the edge of the unit so the the headphone wire doesn t get in the way. Figure 7. Audio Jack 6

11 SD Card The SD card AF4GSD3A-OEM was chosen because it is very fast, class 10, which has a minimum speed of 10 MB/s and has storage size of 4 GB, which is well over what is needed, which is fine since the sponsors wanted as much storage as possible. The only problem is that it uses a lot of current (30mA) and the amount of current that the microcontroller is unknown until testing so they get separate voltage regulators. (calculate how many hours of data can be stored, 32 khz clock rate with 18 bit precision, number of microphones) Figure 8 shows the SD card wired to the main unit. Figure 8: SD Card Socket Schematic Power The main focus of this project was not ideal battery usage, so not much focus was put here Battery Pack The project started out using a 3.7 V li-ion battery which would mean that a voltage regulator would still be needed and it would be cool to have a rechargeable battery. That idea has scrapped since it would include safety hazards. Instead a reusable battery pack was chosen. It would could contain 3 AA batteries each with a voltage of 1.5 volts, all connected in series to give a 4.5 V battery pack Voltage Regulator The TPS72033QDRVRQ1 voltage regulator was chosen mainly because it can handle a 4.5 V intake and output 3.3 V to the various items. It also had a current output rated for 350 ma, which should be enough for the microcontroller. We were still worried so a voltage regulator was added for each power consumption item, one for the microcontroller, one for the SD card, and one for the microphone array. As shown in figure 9 and in the figure below, they were all on the pcb. 7

12 Figure 9. Voltage Regulator PCB Schematic 8

13 2.2 Software Design FPGA Module I 2 S Communication Protocol I 2 S is the communication protocol that the digital microphones use to communicate with the FPGA. A diagram of the protocol can be seen in Figure 10 below. There is a master device and a slave device; in our project the FPGA acted as the master and the microphones as the slaves. Each I 2 S line can have two microphones attached to the data line (SD). The master sends a clock signal (SCLK) and word select (WS) line to the slave. The WS determines which of the two microphones on the line sends data to the master; when the WS is high, one predetermined microphone sends data to the data line and the other does not and vice versa. This is determined by a separate SEL input on each microphone; if the SEL line is high then the microphone will output data when the WS is high and if the SEL line is low, the microphone will output data when WS is low as well. It is also important to note that the WS line changes on the falling edge of the clock while the data is transmitted on the rising edge as can be seen in Figure 11. We were able to program an I 2 S module in SystemVerilog but were unable to test it as we were unable to learn enough about using the FPGA development board in time to fully utilize it. Figure 10. I 2 S Diagram Figure 11. Microphone Waveforms of CLK, WS, Data signals 9

14 SPI Communication Protocol The SPI Communication Protocol is the method by which the FPGA in our device is designed to serially transmit data to the microcontroller. A diagram of the communication protocol can be seen below in Figure 12. Like with I 2 S, there is a master and slave device, however in this case there are four wires connecting them. The FPGA is the master and the microcontroller is the slave. There is a Clock (SCLK), Master In Slave Out (MISO), Master Out Slave In (MOSI), and Slave Select (SS) line. This is a two way communication protocol and can have multiple slaves connected to the master; the slave sending and receiving data is determined by a digital zero being sent to the SS line. Every clock cycle the master sends one bit out through the MOSI line and the slave also sends out bit out through the MISO line. We were able to build a SPI module in SystemVerilog but were unable to test it for the same reason we were unable to test the I 2 S module. Figure 12. SPI Communication Protocol Diagram Altera Cyclone II DE2 FPGA Development and Education board The FPGA was chosen due the need to sample the microphones simultaneously in order to obtain accurate data. However due to the nature of I 2 S, the communication protocol the microphones use, the FPGA would only be able to sample the array in two sets of four microphones. This offset in sampling times can be accounted for in the microcontroller. The circuit configured by the FPGA can be seen below in Figure

15 Figure 13. FPGA Circuit Configuration Diagram The microphones send data serially to the FPGA through an I 2 S bus, two microphones per bus, to the FPGA. As mentioned earlier, half of the time one microphone is sending data along the data line while the other is waiting. The FPGA stores the data into a 24 bit register corresponding to the microphone. In the next clock cycle, the data is loaded in parallel to a buffer register, allowing new data to be read into the first register if needed later. At the same time, the second microphone on the I 2 S bus begins serially transmitting its data. When the eight buffer registers have all been loaded with data, they will in parallel load the data to a final 192 bit register used to transmit data to the microcontroller along the SPI bus. Shifting from the microphone to the FPGA register happens based on the clock cycle; each clock cycle one bit is shifted in. Due to the nature of the microphone waveforms as shown in Figure 4 a counter counts 24 clock cycles and then tells the register to stop accepting new data for eight cycles, thus ignoring the data output when the microphone is in tri-state mode. After the 24 bits have been shifted into the A registers, the counter also signals this register to load its contents into the B registers. When the B register receives data, a B register ready bit is changed to high. Once all eight register ready bits are high, then they will load their data into the SPI register, with register 1B loading into bit positions 0-23, register 2B loading into bit positions 24-47, and so on. This will only happen if the SPI register ready bit is high, this bit is only high after the register has already shifted its previous 192 bits into the microcontroller. This is kept track of using a counter going from 0 to

16 2.2.2 Microcontroller The microcontroller was supposed to be coded using a pickit 3 coder which activates the coding mode for the microcontroller and then instructions are read in serial and saved on the programming memory the chip has. The pickit 3 allows for c programming and then compiles it in way that is acceptable for the microcontroller. Unfortunately, there are no great tutorials for initializing the things that are needed, so the code was never completed. What was completed was the abstraction that was needed for the system to work seen in the figure 14. Figure 14: Microcontroller modules. The things that need to be code for the microcontroller was two SPI modules, a slave and a master. It needed a processor for the data coming in. The DAC needed to initialized, and a bunch of registers for processing. 12

17 3. Design Verification Figure 15: Example of plane wave assumption with microphones of even spacing, where R >> h Figure 15 above shows a plane wave assumption with two microphones that are spaced in the same x- axis. We assumed that the distance from the sound source to microphone 1 is much longer than the distance from the plane wave to microphone 2. The following variables are given : x= 0.46m/(8 microphones), speed of sound= m/s, clock frequency= 32 khz, T= 1/32kHz Using trigonometry, we get : h= V/T= m (1) x²+r²=(r+h)² (2) R = (x²-h²)/2h (3) R = 0.151m Therefore, the ideal beamforming will occur when the sound source is 0.151m or farther away from the microphone. 13

18 5 Beamforming For the project, many factors played a part in the design; but the main one was the need for signal processing. Beamforming refers to the pattern created by the signals when they are added together, each one weighted and time delayed according to what pattern the user is looking. Figure 16 shows a beam pattern, it is power vs angle of incident of incoming sound. Plane wave assumption is used for sound source otherwise more processes are needed. Power is in decibels as it is comparing the power output of the modified signal in comparison to original signal. Notice the large hump in the middle of figure 16 and the smaller humps on the side. These are called the mainlobe and sidelobes respectively. The mainlobe is what is referred to when the beam width is talked about and width of a lobe can be thought of as the length of lobe from the height of the lobe to the two points of height minus 3 db which is the half power point. It is not an actual length since it is in angle but a cone of sound that attenuates sound more and more as the signal approaches the sides of the cone. The sidelobes are already attenuated at can not be heard well unless the signals are amplified; but these are additional cones of sounds and should not be overlooked. Figure 16: Simple Beamforming Pattern For simple beamforming an even weighting and equal time delay is on each microphone input. There are more complicated beamforming algorithms can be be used to change attenuation levels of sidelobes and the number of sidelobes as well. This is accomplished by weighting and time delaying each microphone signal according to certain algorithms. [1] Beamforming is dependent on the spacing between the microphones, the number of microphones, the frequency of the sound source, the rate at which of sound is sampled and the bit precision of the analog to digital converter (ADC). 14

19 The frequency affects the beam pattern a lot, with attenuation decreasing as frequency decreases, as well as reducing the number of sidelobes. The number of sidelobes are less important for this project, versus the attenuation levels which are very important since if sound is not getting attenuated, then can t quiet sounds coming from the sides. This effect can be seen from figures (three beam patterns with 8 microphones, 0.46m/8 even spacing, frequency 1 khz, 500 Hz, 100 Hz). This problem can not be fixed by adding more microphones since their spacing decreases since the overall spacing is limited by the array. This can be seen from figures (4 beam patterns with 16, 24 microphones, 0.46m/(16,24) even spacing, frequency, 500 Hz, 100 Hz) This problem can only be solved by increasing the spacing between microphones as seen in figures (4 beam patterns with 8 microphones, (0.92m, 1.38m)/8 even spacing, frequency, 500 Hz, 100 Hz). This can be thought of more accurately by looking at the actual signal rather than the beam pattern. Figures(three figures, sinusoidal, frequency 1 khz, 500 Hz, 100 Hz, two signals separated by some time delay T) shows this effect. It is only during this time period T that the signals add destructively which is how basic attenuation happens. The more time the signal spend in this time versus the rest of the time, the more attenuation happens. As frequency decreases, the overall time spent in the area of destructive addition versus the time spent in adding constructively decreases. So adding more signals without changing the width of the entire array (aperture) the doesn t help because the max time spent adding doesn t increase as seen in figure(100 Hz, sinusoidal, 10 signals). To increase the delay between the signal spacing needs to increase, since max time delay is at angle of incident 90 o, it is determined by the speed of sound and distance between microphones. As frequency increases, the number of sidelobes increases, which again isn t a bad thing but the fact that the height of the sidelobes increases as frequency increase is a problem since their height will reach 0 db, the same as the height of the mainlobe which means that sound coming from certain directions there will be no attenuation. The beam patterns can be seen in figures (three beam patterns with 8 microphones, 0.46m/8 even spacing, frequency 1 khz, 8 khz, 16 khz). This problem can be fixed by adding more microphones rather than increasing the spacing between them this can be seen in figures (4 beam patterns with 16, 24 microphones, 0.46m/(16,24) even spacing, frequency, 8 khz, 16 khz) which shows increase in microphones and figures (4 beam patterns with 8 microphones, (0.92m, 1.38m)/8 even spacing, frequency, 8 khz, 16 khz), which shows increase in spacing. This effect can be better seen by looking at high frequency signals of figure (two, 8 khz sinusoidal signals, with the same time delay T). The time delay between the signals goes from 0 to Tmax as angle of incident goes from 0 to 90 o. That means at a frequency of 1 T TTT, the signals will overlap perfectly at an angle of 90 o. As frequency of the sound increases past 1 T TTT, the signals will overlap more times at various angles. As the number of microphones increases, the aperture of the array doesn t change but the spacing between the microphones decrease which decreases the max time delay between two microphones that are next to each other since Tmax is dependent of the spacing between microphones. As Tmax decreases higher frequency can be handle before the signals adds purely constructively at 90 o. Sampling rates and bit precision of the ADC are also relevant for the beam pattern. If the frequency of the sound of the is above the nyquist limit, then the beam pattern will not reflect what the pattern should look like. The nyquist limit is half the sampling rate of the ADC. The same thing goes for the 15

20 precision of the ADC, which can be seen if there is only 1-bit precision either high or low which would make a square wave which would definitely not make the correct beam pattern. Alongside with bit precision is what the the bits represent meaning max sound input (bit level). So if sound is greater than what the microphone can handle, the peaks and troughs will be truncated, again giving false beam patterns. While these things affect the beam pattern, it mainly affects the signal that is saved and what can be restored when listening to, because again high frequencies get deleted, loud sounds get truncated, turning any information there into a square wave wave information, and not enough bit precision truncate small changes in the signal, think of adding a quiet sound whose peak value doesn t change the bit value and add that to a detectable signal, the ADC couldn t record the small changes, its signal would look the same as the detectable signal. The advantages and disadvantages are listed below in table 1. Table 1. Advantages and Disadvantages of Various Aspects of Design Design Aspect Advantages Disadvantages Aperture length Increase Better pattern at lower frequencies More space is needed, becomes less ergonomic Aperture length Decrease Number of Microphones Increase Number of Microphones Decrease Sampling Rate Increase Less space is needed and can wear it anywhere on the body, more ergonomic Better beam pattern at higher frequencies Less storage is needed and faster processing Higher frequencies can be recorded, better signal recovery Worse beam patterns at lower frequencies More storage needed and slower processing Worse beam pattern at higher frequencies More data needs to be stored, slower processing Sampling Rate Decrease Less storage is needed Worse signal recovery Bit Precision Increase More subtle changes can be detected, better signal recovery More data needs to be stored, slower processing, processing units needs to be faster Bit Precision Decrease Less storage is needed Worse signal recovery Bit Level Increase Capable of recovery louder sounds Quieter sounds can t be recovered Bit Level Decrease Capable of recovery quieter Loud sound get truncated 16

21 sounds 5. Costs 5.1 Parts Part DSPIC33FJ128GP80 2-I/SO (DSC) Manufacturer Table 1 Parts Cost Retail Cost ($) Bulk Purchase Cost ($) Actual Cost ($) Microchip $6.46 $6.46 $19.29 SPH0645LM4H-B (Microphone) Knowles $3.12 $2.49 $49.8 Arduino Uno Arduino $24.95 $24.95 $24.95 Chip Resistor Yageo $0.1 $0.011 $ uf Ceramic Capacitor Taiyo Yuden $0.12 $0.085 $ uf Murata Electronics Ceramic Capacitor North America $0.1 $0.037 $ uf Ceramic Capacitor Yageo $0.1 $0.02 $ pf Murata Electronics Ceramic Capacitor North America $0.13 $0.093 $ pf Ceramic Capacitor AVX Corporation $0.1 $0.019 $0.19 Memory Card ATP Electronics $16.23 $16.23 $16.23 Memory Connector Amphenol FCI $2.83 $2.83 $2.83 Digital to Analog Converter Texas Instruments $1.53 $1.53 $4.59 Audio Connector CUI Inc. $1.29 $1.29 $2.58 Voltage Regulator Texas Instruments $1.34 $1.34 $6.70 Battery Holder Adafruit Industries LLC $3.95 $3.95 $3.95 Solder Paste - $18.6 $18.6 $18.6 Tweezer ECE Store $6 $6 $12 Jumper Wire ECE store $0.3 $0.3 $4.5 Total $

22 5.2 Labor Table 2 Labor Cost Student Hourly Rate Total Hours Invested Total*2.5 Patrick Zhou $ $14400 Daehyun Han $ $14400 Micheal Westfall $ $14400 Total $ Grand Total Section Total Labor $43,200 Parts $ Grand Total $

23 6. Conclusion 6.1 Accomplishments Throughout this semester, we successfully designed PCB boards with the functions that we wanted from original design and soldered all the parts that were necessary. Although we did not had the chance to test beamforming algorithm, we have a solid understanding of the process and how to perform beamforming from the in depth research we did. We all realized that it is crucial to have high level understanding of both hardware and software in order to build any kinds of electrical engineering product. Finally, we did not spend huge money when ordering the parts, which is a very important factor for engineers because we should always consider making the product better but cheaper. 6.2 Uncertainties We faced lots of challenges to finish our original goal. Our biggest uncertainty was the difficulty of programming both the FPGA and microcontroller. The failure of our programming made it extremely difficult for us to verify our hardware components. Another challenge was the time management. Many of our tasks such as designing the PCB board, coding the FPGA, and coding the microcontroller ended up taking significantly more time than expected. As we worked on each section, new challenges continued to appear despite the progress we made. If we were given a chance to work on this project again, we would allocate more time for these parts of the project as well as choose an approach that would have been less complicated given the time frame we have. 6.3 Ethical considerations Regarding the device that we have been able to build, there are no ethical issues associated with it. This is because the device was unable to accurately capture any audio and so the issue of spying associated with a working device can be ignored. If the device was built to include all of the features originally planned, then their would be a concern about the device being used to spy on others. The original plan was to be able to amplify sound from specific directions while attenuating sound from other directions; this would allow a user to amplify conversations that they want to listen in on from distances that they would not be expected to hear from. While this is an ethical concern, we do not expect this to be a large issue. The original design called for the FPGA development board to be the Altera Cyclone II DE2 FPGA Development and Education board. This device is quite large, making it difficult to direct this device at someone without being noticed and thus defeating the entire purpose of spying. As a result, spying is not a major concern right now. However, it is important to keep the possibility of spying in mind because if in the future the device were to be improved with smaller and more powerful components, then spying may become a serious 19

24 concern. 6.4 Future work The two major scientific motivations for building this device are the effect of the human body on sound received on a wearable microphone array and the cost benefit analysis of number of microphones versus data quality. Our microphone array is designed to be worn on a person s chest and so only obtains the effects of the human body on a chest worn device. Future arrays could be built to be worn on different parts of the body to obtain a more complete and accurate understanding of the human body s effect. Additionally, increasing the number of microphones would provide researchers with much more data regarding the benefits of larger arrays. In order to make arrays the most efficient that they can be, it is important to know when adding microphones is or is not worth the tradeoffs of extra cost, space, and complexity. Lastly, we can develop augmented listening headphones, which is a hot emerging product category that adds hearing aid-like features and augmented reality content to traditional headphones. This product will definitely help people hear better. 20

25 References [1] Dolph-Chebyshev Weights, web page. Available at: [2] Anthropometric Data, datasheet, UNIVERSITY OF RHODE ISLAND Department of Electrical, Computer and Biomedical Engineering., 2017, Available at: [3] Table chart sound pressure levels, datasheet, 1/29/2011, Available at: 21

26 Appendix A Requirement and Verification Table 1. Dummy Data can be stored in the SD card in wav. Format from the microcontroller [10 pts] a. Upload audio data to FPGA using its usb cable. b. Send data to microcontroller using SPI c. Microcontroller formats audio into wav. Format d. Saves data onto SD card e. Check SD card to compare the file to the original data 2. Microphones correctly pick up sound and send audio to the FPGA using I 2 S protocol [15 pts] a. Have a known source send audio to microphones b. Check using oscilloscope to see if SCK and WS. c. Data can be saved using the microcontroller SD card or FPGA SD card d. Compare audio data with known source to see if serial data line was working 3. Data can be sent from the FPGA to microcontroller through SPI protocol [10 pts] a. Having dummy data loaded and send it to the microcontroller b. Have an oscilloscope show that Clk and WS signals are working c. Check SD card to see if data line was working 22

27 4. Audio can be amplified or attenuated [10 pts] 5. Microphones are sampled within 10% of sampling frequency (32 khz) [5 pts] a. Have a known source send audio to microphones in different directions b. Check audio data to see if it has higher or lower amplitudes according to which direction the sound source was coming from a. Send audio data to microphones for 10 seconds b. Check to see if audio is correct c. Check the number of samples collected and divide by the number of microphones and 10 seconds. There should be 28,800 to 35,200 samples 23