Multilevel Paging. Multilevel Paging Translation. Paging Hardware With TLB 11/13/2014. CS341: Operating System

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1 CS341: Operating System Lect31: 21 st Oct 2014 Dr A Sahu Dept o Comp Sc & Engg Inian Institute o Technology Guwahati ain Contiguous Allocation, Segmentation, Paging Page Table an TLB Paging : Larger Page Table Virtual Placement, Deman Paging CPU Paging Harware With TLB p TLB miss pagetlb TLB hit Page Table In E O R Y Large Aress Spaces Typical logical aress spaces: 4 Gbytes=> 2 32 aress bits (4 byte aress) Typical page size: 4 Kbytes = 2 12 bits Page table may have: /2 12 = 2 20 = 1million entries ti Each entry 4 bytes => 4B per process! Do not want that all in RA Solution? Page the Page table (ultilevel paging), Hashing, an Inverte Page Table Virtual : Deman Paging page number p1 p2 10 ultilevel Paging page oset page number p1 p2 ultilevel Paging Translation page oset Page0 Logical Outer Page Table p1 outer page table p2 inner page table esire page Page Table 1

2 Hashe Page Tables Common in aress spaces > 32 bits The virtual page number is hashe into a page table This page table contains a chain o elementshashingtothesamelocation to the same location Each element contains The virtual page number The value o the mappe rame A pointer to the next element Hashe Page Tables Virtual page numbers are compare in this chain searching or a match I a match is oun, the corresponing physical rame is extracte Variation or 64 bit aresses isclusterepage tables Similar to hashe but each entry reers to several pages (such as 16) rather than 1 Especially useul or sparsearess spaces (where reerences are non contiguous an scattere) CPU p Hashe Page Table Hash Function q s p r r E O R Y Inverte Page Table Rather than each process having a page table an keeping track o all possible logical pages, track all physical pages One entry or each real page o Entry consists o the virtual aress o the page store in that real location, with inormation about the process that owns that page Hash table Inverte Page Table Suppose 4GB virtual space per process 4K rame or page size, 10 6 entry in page table per process 10process:10x10 10x10 6 entry 4KB page size, 4GB o RA Total 10 6 rames Inverte page table storing require 10 6 entry but to store 10 page table require 10x10 6 entry Inverte Page Table Decreases neee to store each page table, but increases time neee to search the table when a page reerence occurs Use hash table to limit the search to one or at most a ew page table tbl entries ti TLB can accelerate access But how to implement share? One mapping o a virtual aress to the share physical aress 2

3 Inverte Page Table Page table maps to physical aresses CPU pi p search pi p i i Physical Virtual Still nee page per process > backing store accesses longer! (search + swap) Virtual Backgroun Coe nees to be in to execute, but entire program rarely use Error coe, unusual routines, large ata structures Entire program coe not neee at same time Virtual Backgroun Consier ability to execute partially loae program Program no longer constraine by limits o physical Each programtakes less while running > > more programs run at the same time Increase CPU utilization an throughput with no increase in response time or turnaroun time Less I/O neee to loa or swap programs into > each user program runs aster Virtual Separation o user logical rom physical Only part o the program nees to be in or execution Logical aress space can thereore be much larger than physical aress space Allows aress spaces to be share by several processes Allows or more eicient process creation ore programs running concurrently Less I/O neee to loa or swap processes Virtual Virtual aress space logical view o how process is store in Usually start at aress 0, contiguous aresses until en o space eanwhile, physical organize in page rames U must map logical to physical Virtual can be implemente via: Deman paging (ostly we will stuy) Deman segmentation 3

4 Virtual That is Larger Than Physical Page 0 Page 1 Page 2 Page v Virtual ap Physical HDD Virtual aress Space Usually esign logical aress space ax or stack to start at ax logical aress an grow own while heap grows up aximizes aress space use Unuse aress space between the two is hole Key: No physical neee until heap or stack grows to a given new page 0 Coe Virtual aress Space Enables sparse aress spaces with holes let or growth, ynamically linke libraries, etc System libraries share via mapping into virtual aress space Share by mapping pages rea write into virtual aress space Pages can be share uring ork(), speeing process creation Share Library Using Virtual Share Library Coe Share pages Share Library Coe Deman Paging Coul bring entire process into at loa time Or bring a page into only when it is neee Less I/O neee, no unnecessary I/O Less neee Faster response ore users Deman Paging Similar to paging system with swapping Page is neee reerence to it invali reerence abort not in bring to Lazyswapper neverswapsapageinto swaps a page unless page will be neee Swapper that eals with pages is a pager 4

5 Program A Program B Deman Paging ain Swap out Swap in Basic Concepts With swapping, pager guesses which pages will be use beore swapping out again Instea, pager brings in only those pages into How to etermine that set o pages? Nee new U unctionality to implement eman paging Basic Concepts I pages neee are alreay resient No ierence rom non eman paging I page neee an not resient Nee to etect an loa the page into rom storage IPortant: Without changing program behavior IPortant: Without programmer neeing to change coe 5