BALLUFF Identification System. CC-Link interface

Transcription

1 Issue : August 31, 2005 No. T704301E C BALLUFF Identification System Technical Manual for Processor : BIS C-489-1_AA CC-Link interface Safety instructions Read this section thoroughly before using the device Before using the controller, read this manual carefully. During installation and operation pay close attention to the safety aspect. Planning the System Design the system to work safety if the processor should be damaged or the power unit malfunction. Do not exceed the specifications for supply voltage, conditions for use, etc. as indicated in this manual. Handling the System Observe the rated voltage that is indicated in the specifications. Misuse may cause excessive heat leading to possible to fire. Take care when connecting the system, as incorrect wiring may cause unexpected malfunction of the machine. Ensure the power is switched off during installation or maintenance operations. Do not dismantle or modify the devices. This could cause malfunction or overheating.

2 Contents 1. Description 1.1 Description Construction of the System Construction of the components and applicable units Specifications 2.1 Specifications Efficiency Dimension Function 3.1 List of Function Description of Function Input-Output Signals for master unit List of Input-Output Signal Details of Input-Output Signal Allocation of Remote Register List of Remote Register Details of Remote Register Memory address of Code tag and Allocation of Block Data processing time Implementation and Installation 4.1 Installation Mounting Positioning Wiring Cable for CC-Link Wiring with each Unit Each Part and Setting Instructions for Programming 5.1 Connecting the System and Processing Data Construction of Data Processing unit Memory of Code tag Interlock Faulty Condition of Data Link Communication with Code Tag 6.1 Instruction for Programming List of Instructions and commands Used System in this Chapter Sequence Program for ACPU Basic Format of Program Processing Program in Fault Initial Setting Reading Data Instruction Reading Instruction RD, CR Sequence Reading Instruction AR, SR Writing Data Instruction Writing Instruction WD, CW Sequence Writing Instruction AW, SW Batch Writing Instruction FI Compare Instruction CM Clear Instruction CL... 60

3 6.11 Stop Command of Sequence Instruction Error Cancellation Instruction Life Expectancy of Code Tag Information Reading Instruction of Life Expectancy of Code Tag Information Trouble Shooting 7.1 List of Error Code Trouble Shooting Confirmation Procedure on LED indicator Procedure for Fault of Data Link NOTE 1 The contents and the specification are subject to change without notice. 2 Please inform us know if there is any mistake or notice in this manual.

4 1. Description 1.1 Description "Balluff Identification System / BIS series" is an identification system for factory automation that executes reading and writing data by electromagnetic induction principle. Processor BIS C-489 is connected to CC-Link as a remote device station, and it communicates with sequencer CPU of master / local station. There can be 2 read/write heads connected to the processor, and it executes read/write communication with code tag per each channel separately. It is possible to read or write data to code tag from sequencer CPU with programming an easy sequence program. 1.2 Construction of the System CC-Link Master Local Station Processor Read/write Code BIS C-489 Head tag Sequencer CPU Master unit CH1 CH2 CC-Link Cable for Head External power unit DC24V Function of each Component Component Function Code tag A data medium that stores and retains information data. Read/write Head A Head that reads and writes information data in code tag without physical contact. Supplies power for code tag. Processor CC-Link Master/Local Station A Processor that executes reading or writing data to or from code tag when it receives instructions from sequencer CPU. It can be connected to 1 or 2 read/write heads. A sequencer CPU unit that instructs for CC-link and a master unit station that controls CC-Link system. Attention for Constructing of System The occupied stations of Processor BIS C-489 are 4 stations. Therefore, plural processors can be connected to a master unit if the number of processors are not exceeding the connectable quantities. Decide the number of processors to connect a master unit with regarding to following points. 1 Connectable station numbers for master unit. Maximum 16 stations. occupied 4 stations 2 Occupied station numbers of units input/output card etc. except processors, and Input/Output occupied numbers. 3 Processing time or effect to tact time in programming ladder. -1-

5 1.3 Construction of the Components and applicable units The construction of components of CC-Link system that can be used by the processor BIS C-489 and applicable units are indicated by the following. The Processor cannot be connected to other units. CC-Link master / Local unit Sequencer CPU unit Sequencer Type ACPU A1SHCPU, A1SJHCPU, A2SHCPU CPU unit number A2UCPU, A2UCPU-S1, A3UCPU, A4UCPU On and after software version Q. On and afer version K, available only RRPA* function A2USCPU, A2USCPU-S1 On and after software version E. On and afer version A, available only RRPA* function A2USHCPU-S1 On and after software version L. On and afer version G, available only RRPA* function QnACPU QCPUA mode QCPUQ mode Q02CPU, Q2ACPU-S1, Q3ACPU, Q4ACPU, Q2ASCPU, Q2ASCPU-S1, Q2ASHCPU, Q2ASHCPU-S1 On and after function version B Q02CPU-A, Q02HCPU-A, Q06HCPU-A Q02CPU, Q02HCPU-A, Q06HCPU, Q12HCPU, Q25HCPU Master unit Type AJ61BT11,A1SJ61BT11,AJ61QBT11,A1SJ61QBT11 Number On and after 9707B is indicated in DATE QJ61BT11 * Instruction RRPA Auto reflesh CC-Link Processor External Power Unit DC24V BIS C-489-1_AA Read/write Head BIS C-3**-** Identification communication Code tag BIS C-1**-** -2-

6 2. Specification 2.1 Specification The followings are specifications of Processor BIS C-489. Operating temperature humidity degree C, %RH without dew condensation Storage temperature humidity degree C, %RH without dew condensation Vibration rating Frequency Acceleration Amplitude Sweeping time per JIS C Hz mm 10 times Hz 1G - 1 octave/ 1min.* Shock rating per JIS C G, 3 times to each axis XYZ Noise durability Not to cause malfunction with noise simulator that has noise voltage 800V P-P, noise width 1 micro S to external power unit DC24V noise frequency Hz. Operating atmosphere Without corrosive gas, heavy dust * 1 octave indicates increasing 2 times or decreasing 1/2 times of frequency. ex. Each variation of frequency is indicated 1 octave such as, from 10Hz to 20 Hz, from 20Hz to 40Hz, from 20Hz to 10Hz 2.2 Efficiency Following are Efficiency of Processor BIS C-489. Applicable read/write head BIS C-3**-** Connecting procedure for head D-sub 9 pin connector Connectable quantities of head 2 heads Applicable code tag BIS C-1**-** Using channel for r/w head Using only CH1 Using CH1, CH2 Number of RWr RWw each 16 words 8 words per each channel total 16 Communicating data Communicating data words words per 1 communicating with master unit Communicating data words words per 1 communicating withheadandcodetag CC-Link version Ver Sort of CC-Link station Remote device station Occupied station 4 stations RX/RY each 128, RWr / RWw each 16 Connecting terminal 7-screw terminal M3.5 x 7 screws Suitable cable outer diameter mm Suitable RAV1.25-3,RAV2-3.5 JIS C 2805 Mounting screw for unit = M4 x 0.7mm x 16mm tightening torqe : Ncm Supply voltage DC24V+-10% Current consumption 0.8A Cooling system Self cooling Weight approx. 800g Size 174W x 100H x 45D -3-

7 2.3 Dimension -4-

8 3. Functions 3.1 List of Function The following function can be executed with the processor BIS C-489. Functions Instructions/ Instruction code Process Reference Commands ASCII Hex. Reading Reading RD 4452H Reads data from code tag CR 5243H Compares data to check. Sequence AR 5241H Executes reading in sequence until code tag gets into Reading SR 5253H communication area, and then executes reading. After that, compares data to check. Writing Writing WD 4457H Writes data to code tag CW 5743H Compares data to check. Sequence AW 5741H Executes writing in sequence until code tag gets into Writing SW 5753H communication area, and then executes writing. After that, compares data to check. Batch FI 4946H Writes specified data to specified area in code tag writing simultaneously. Check Comparing CM 4D43H Compares data of processor with data in code tag. 6.9 Clearance Clearing CL 4C43H Clears specified area in code tag with "0" 6.10 Command Sequence Cancels sequence instruction compulsively instruction Cancellation Error Executes error cancelling process cancellation Clearing error LED, resetting error detected signal, Clearing executing result store area in remote resister Life Reading Reads life "expectancy information" of code tag that written in expectancy life expectancy LR 524CH code tag 6.13 of code tag -5-

9 3.1.1 Description of Function Description of the function of the processor BIS C-489 is explained in this chapter. Refer to "6. Communication procedure with Code tag" further details on function. (1) Reading Reads data in code tag. <Reading Instruction (RD,CR)> Reads data in code tag <Sequence Reading Instruction (AR,SR)> Reads data in code tag after waiting for the code tag to get into communication area of read/write head. (2) Writing Writes data to code tag. <Writing Instruction (WD,CW)> Writes data to code tag. <Sequence Writing Instruction (AW,SW)> Reads data in the code tag after waiting for code tag to get into communication area of read/write head. <Batch Writing Instruction (FI)> Writes specified 1-word data from specified address to specified area simultaneously. (3) Check<Comparing (CM)> Comparesdatainaprocessorwithreaddataincodetag. (4) Clearance <Clearing (CL)> Can be "0" data of specified area from specified address. (5) Sequence Instruction Cancellation Cancels sequence instruction (AR,SR,AW,SW) compulsively while instruction is executing. (6) Error Cancellation Cancels error condition after an error has occurred. (7) Reading Life Expectancy of Code Tag <(LR)> Reads "life expectancy of code tag information" that is written in code tag. -6-

10 3.2 Input-Output Signals for Master Unit Input-output signal RX, RY to the master unit is explained in this chapter. Device RX is the input signal from the processor to the master unit. Device RY is the output signal from the master unit to the processor List of Input-Output Signal Input-output signals of processor BIS C-489 are indicated in the following table. Signal direction : from processor to master unit Signal direction : from master unit to processor Device No. (input) Device No. (output) CH1 Signals Signals RXn0 RXn8 RYn0 Selecting initial setting RXn1 RXn9 Comparing result signal RYn1 Selecting processing unit RXn2 RXnA Inzone RYn2 Selecting number of channel RXn3 RXnB ID-BUSY RYn3 RYnB RXn4 RXnC Finish identification instruction RYn4 RYnC Require executing identification instruction RXn5 RXnD Error detection RYn5 RYnD Unused RXn6 RXnE Unused RYn6 RYnE Unused RXn7 RXnF Require divided data RYn7 RYnF Finish divided data RYn8...RYnA Unavailable RX(n+1)0 RX(n+4) Unused RY(n+1)0 RY(n+4)0 RX(n+3)F RX(n+6)F Unused RY(n+3)F RY(n+6)F RX(n+7)0...RX(n+7)7 Unavailable RY(n+7)0...RY(n+7)7 Unavailable RX(n+7)8 Flag for requiring to RY(n+7)8 Flag for finishing to process initial data process initial data RX(n+7)9 Flag for finishing to RY(n+7)9 Flag for requiring to set initial data set initial data RX(n+7)A Unavailable RX(n+7)B Remote READY RY(n+7)A...RY(n+7)F Unavailable RX(n+7)C...RX(n+7)F Unavailable n : Address that was allocated to the master station with setting station number. <Attention> The devices that indicated "Unavailable" should not be used by user because they are used in the system. If any "Unavailable" device is used by the user, normal operation would not be warranted. -7-

11 3.2.2 Details of Input-Output Signal Details of Input-Output signals of processor BIS C-489 are indicated in the following table. (1) Remote Input (RX) Device No. Signals Contents Comparing result when comparing result is in agreement after reading, writing signal or comparing CR,SR,CW,SW,CM. It will be cleared with resetting of RYn4,RYnC, latch the other setting with SET instruction when the comparing result is needed to retain. Inzone while inzone has been detected in executing sequence instruction (AR,SR,AW,SW). ID-BUSY when instruction is executing, and OFF when the instruction is finished excuting. Finish identification instruction after instruction is executed, and finished executing instruction normally. It remains OFF when executing instruction is stopped with sequence instruction cancellation while executing sequence instruction (AR,SR,AW,SW). When error is occurred, it won't be, and error detection signal (Xn5,XnD) will be. Require executing identification instruction or special instruction Finish identification instruction Error detection OFF when require executing identification instruction RYn4,RYnC or special instructionryn5,rynd is OFF. Error cancel instruction Require executing identification instruction or special instruction Error detection Executing error cancel Error occur Executing error cancel Unused Unused Require divided data flag for requiring divided data to require next data when treating data exceeds certain quantity using 1 channel : 12 words, 2 channel : 5 words. Executes reading or writing when require divided data flag is. finish divided data flag when executing read or write data. After that, require divided data flag will be OFF, then finish divided data flag. Require divided data Finish divided data Executing read and write -8-

12 Device No. CH1 CH2 Signal Contents RX(n+1)0 RX(n+4)0 Unused Unused RX(n+3)F RX(n+6)F RX(n+7)8 Flag for requiring, OFF timing of requiring to process initial data, finishing to to process initial process, finishing to set, and requiring to set are indicated as data follows. Flag for requiring to process initial data RX(n 7)8 Flag for finishing to process initial data RY(n 7)8 Flag for finishing to set RX(n+7)9 Flag for finishing initial data RX(n 7)9 to set initial data Flag for requiring to set initial data RY(n 7)9 Remote READY RX(n 7)B Execute initializing Executed by sequence program Executed by processor RX(n+7)B Remote READY when processor finished setting of initial data and became ready after power is on or resetting of hardware. -9-

13 (2) Remote output (RY) Device No. CH1 CH2 Signals Contents RYn0 Selecting initial Specify processing unit or number of channel to use with "user setting setting" or "factory setting". By selecting "user setting", processing unit, number of using channel could be selected by user. OFF : User setting : Factory setting (Setting contents : word unit, both of CH1,CH2 are used) RYn1 Selecting Specify processing unit of processing data. Setting is effective processing when select initial setting (RYn0) is OFF (user setting). unit It is only word unit setting. OFF : word unit : unused (to set, it will be word unit.) RYn2 Selecting number Specify number of channel to use. Setting is effective when of channel selecting initial setting (RYn0) is OFF (user setting). OFF : both of CH1,CH2 are used : only CH1 is used RYn4 RYnC Require executing Executes instruction when require executing identification ID instruction instruction is. RYn5 RYnD Unused Unused RYn6 RYnE Unused Unused RYn7 RYnF Finish divided data Refer to RXn7, RXnF. RY(n+1)0 Unused Unused... RY(n+6)F RY(n+7)8 Flag for finishing to Refer to RX(n+7)8, RX(n+7)9. process initial data RY(n+7)9 Flag for requiring to set initial data -10-

14 3.3 Allocation of Remote Register Allocation remote resistor of processor (BIS C-489) is explained in this chapter. The remote resistor is set initial digit when power is supplied or sequencer CPU is reset List of Remote Resistor Remote resistor of processor (BIS C-489) is indicated in the following table. Using Direction of Address Initial channel receiving Contents digit Reference Writing area Specifying area for instruction (1) master station Specifying area for first address (2) Specifying area for processing number (3) Using both Processor Specifying area for writing data (4) CH1&CH2 Specifying area for writing data 5 Processor Storing area for instruction code result Storing area for executing result (5) (6) Unused Reading area Storing area for reading data (7) master station Storing area for reading data 5 Writing area master station Unavailable Specifying area for instruction code (1) Specifying area for first address (2) Specifying area for processing number (3) Processor Specifying area for writing data 1 Using (4) Specifying area for writing data 12 only CH1 Unavailable Initial setting Processor Storing area for instruction code result (5) Storing area for executing result (6) Unused Reading area Storing area for reading data 1 master station (7) Storing area for reading data 12 Writing area master Processor station Specifying area for retry count Specifying area for inzone detecting time Specifying area for interval of executing sequence instruction Unavailable... Unavailable (8) (9) (10) m,n : Address that was allocated to master station with station number setting <Attention> The remote register that indicated "Unavailable" should not be used by the user because they are used in the system. If unavailable remote resistor is used by the user, normal operation would not be warranted. -11-

15 3.3.2 Details of Remote Resistor (1) Specifying area for instruction code Specifies instruction to code tag. [ex.] Specifying reading instruction (RD) (in using 2 channels) Replaces upper byte and lower byte, and converts it to ASCII code then stores the code. Initial digit : 4452H Replaces upper byte and lower byte D R D Instruction code R ASCII code Specify ASCII code directly Specify 4452H(RD) TOP Hn H4452 K1 Change with ASC instruction Store into specifying area for instruction code Head I/O number of master unit Store 4452H ASC RD D0 TOP Hn D0 K1 Store into specifying area for instruction code Head I/O number of master unit (2) Specifying area for the first address Specify the first address of code tag memory to read or write data. Specifying range Initial digit :0 : (0H...FFFH) [ex.] Specify address 120 First address TOP Hn K120 K1 Store into specifying area for first address Head I/O number of master unit <Attention> Specify in the following range. First address + Processing numbers =< 4096 (1000H) Specify in the range of memory capacity of the code tag. -12-

16 (3) Specifying area for processing number Specify processing number of data to be read or written. Specifying range Initial digit :1 : (1H...200H) [ex.] Specify processing number to be 32 Processing number read/write TOP Hn K32 K1 Store into specifying area for processing number Head I/O number of master unit <Attention> Specify in the following range. First address + Processing numbers =< 4096 (1000H) Specify in the range of memory capacity of the code tag. (4) Specifying area for writing data Specify data to be written into code tag. [ex.] Specify contents of D100...D104 to writing data (selected 2 channels). First address of writing data TOP Hn D100 K5 Store into specifying area for writing data Head I/O number of master unit (5) Storing area for instruction code result Stores instruction code that executed to processor BIS C-489. (6) Storing area for executing result Stores error code. (7) Storing area for reading data Stores reading data from code tag. -13-

17 (8)Specifyingareaforretrycount(effectiveininitialsettingonly) Specify retry time that processor BIS C-489 executes instruction when error occurs in data communication. Specifying range : ( times)... If the specified number is over 32767, the retry time would be times. Initial digit :3 [ex.]specifyretrytimetobe5 Retry time TOP Hn K5 K1 Store into specifying area for retry time Head I/O number of master unit (9) Specifying area for inzone detecting time (valid in initial setting only) Specifies standby time per 10ms when the code tag gets into communication area to inzone detection starting communication in executing sequence instruction. Specifying range : ( ms)... if the specified number is over 32767, inzone detection time would be ms Initial digit :0 [ex.] Specify inzone detectingtimetobe2sec. inzone detecting time TOP Hn K200 K1 Store specifying area for inzone detecting time Head I/O number of master unit Inzone detecting time is; Standby time since code tag getting into communication area until starting communication. By specifying this setting, it can communicate with avoiding unstable range. -14-

18 (10) Specifying area for interval of executing sequence instruction (effective in initial setting only) Specify executing instruction interval of sequence instruction per 100ms. Specifying range : (0ms ms)... if the specified number is over 32767, executing interval would be ms Initial digit :0 [ex.] Specify execution interval of sequence instruction to be 5 sec. (5000ms) Set interval Executing interval of sequence instruction Store into specifying area for interval of executing sequence instruction Head I/O number of master unit Executing sequence instruction! (AR,SR,AW,SW) Finish communicating with code tag! Read/write head Read/write head Code tag This interval is executing interval. Executes the next sequence instruction after passing interval of executing sequence instruction. Start executing next sequence instruction! Read/write head -15-

19 3.4 Memory Address of Code tag and Allocation of Block Memory addressing of the code tag is per byte 8 bits, and there are "64 or 32 bytes" per page. Data communication identification communicationbetween processor and code tag is executed per "page". Data process between sequencer and processor is executed per "word". (1) Address construction of code tag "memory" 511 byte / code tag address Processor : BIS C AA Code tag address Hex. Page byte address word address START END START END 0 0 1F 0 0F F 10 1F F 20 2F F 30 3F F 40 4F 5 A0 BF 50 5F 6 C0 DF 60 6F 7 E0 FF 70 7F F 80 8F F 90 9F A F A0 AF B F B0 BF C F C0 CF D 1A0 1BF D0 DF E 1C0 1DF E0 EF F 1E0 1FF F0 FF 1 page = 32 bytes = 16 words Attention Data process of the processor is executed per words. The amount of communication data is up to 512 words. -16-

20 1023 byte / code tag address Processor : BIS C AA Code tag address Hex. page byte address word address START END START END 0 0 1F 0 0F F 10 1F F 20 2F F 30 3F F 40 4F 5 A0 BF 50 5F 6 C0 DF 60 6F 7 E0 FF 70 7F F 80 8F F 90 9F A F A0 AF B F B0 BF C F C0 CF D 1A0 1BF D0 DF E 1C0 1DF E0 EF F 1E0 1FF F0 FF F F F F F F F F F F 15 2A0 2BF F 16 2C0 2DF F 17 2E0 2FF F F F F F 1A F 1A0 1AF 1B F 1B0 1BF 1C F 1C0 1CF 1D 3A0 3BF 1D0 1DF 1E 3C0 3DF 1E0 1EF 1F 3E0 3FF 1F0 1FF 1 page = 32 bytes = 16 words Attention Data process of the processor is executed per words. The amount of communication data is up to 512 bytes. -17-

21 2K, 2047byte / code tag address Processor : BIS C AA Code tag address Hex. page byte address word address START END START END 0 0 3F 0 1F F 20 3F 2 80 BF 40 5F 3 C0 FF 60 7F F 80 9F F A0 BF BF C0 DF 7 1C0 1FF E0 FF F F F F A 280 2BF F B 2C0 2FF F C F F D F 1A0 1BF omission F F F 2A0 2BF BF 2C0 2DF 17 5C0 5FF 2E0 2FF F F F F 1A 680 6BF F 1B 6C0 6FF F 1C F F 1D F 3A0 3BF 1E 780 7BF 3C0 3DF 1F 7C0 7FF 3E0 3FF 1 page = 64 bytes = 32 words Attention Data process of the processor is executed per words. The amount of communication data is up to 512 bytes. -18-

22 8K byte / code tag address Processor : BIS-C489-15AA Code tag address Hex. page byte address word address START END START END 0 0 3F 0 1F F 20 3F 2 80 BF 40 5F 3 C0 FF 60 7F F 80 9F F A0 BF BF C0 DF 7 1C0 1FF E0 FF F F F F A 280 2BF F B 2C0 2FF F C F F D F 1A0 1BF E 380 3BF 1C0 1DF F 3C0 3FF 1E0 1FF F F F F BF F 13 4C0 4FF F F F F 2A0 2BF BF 2C0 2DF 17 5C0 5FF 2E0 2FF F F omission 77 1DC0 1DFF EE0 EFF 78 1E00 1E3F F00 F1F 79 1E40 1E7F F20 F3F 7A 1E80 1EBF F40 F5F 7B 1EC0 1EFF F60 F7F 7C 1F00 1F3F F80 F9F 7D 1F40 1F7F FA0 FBF 7E 1F80 1FBF FC0 FDF 7F 1FC0 1FFF FE0 FFF 1 page = 64 bytes = 32 words Attention Data process of the processor is executed per words. The amount of communication data is up to 512 bytes. -19-

23 (2) Data store format of code tag "memory" Writing data Code tag "memory" Word address 0H Word data Write to word address 0H byte address 0H 1H (3) Setting of block Set block No. with dip switch. Refer to "4.3 Each part and setting" for setting. 3.5Dataprocessingtime Processing time for read and write data is indicated in following table. Code tag 32 byte Code tag 64 byte Data number Processing time Data number Processing time word byte reading writing word byte reading writing sec 0.35sec sec 0.65sec sec 2.3sec sec 2.3sec sec 4.3sec sec 4.3sec sec 6.2sec sec 6.2sec sec 8.6sec sec 8.6sec sec 11.0sec sec 11.0sec sec 12.1sec sec 12.1sec sec 14.2sec sec 14.2sec sec 17.3sec sec 17.3sec sec 19.5sec sec 19.5sec sec 21.5sec sec 21.5sec sec 21.9sec sec 21.9sec (note 1) (note 2) (note 3) Processing time is the time that processing takes for each data consecutively. Processing time is the time since "request communication" turns "" until "finish ID instruction" turns "". The condition of measurement : connect 1 processor (occupied 4 stations) to master unit, with read/write heads on 2 channels. It is including link scan time-and time delay of transmission. Refer to user's manual for master local unit on the detail of link scan time, time delay of transmission. -20-

24 4. Implementation and Installation Attention for handling Processor BIS C-489 and installing environment are explained in this chapter. 4.1 Installation Mounting When installing processor BIS C-489, pay close attention to the following points. (1) Tightening torque for terminal screws on units, and fixing screws Refer to the tightening torque in the following table to tighten terminal screws on units and fixing screws. Points of screws Mounting screws for unit (M4) Terminal screws on terminal block (M3.5) Mounting screws for terminal block (M3.5) Range of tightening torque Ncm Ncm Ncm Positioning The following positions are not appropriate for installing processor BIS C-489. a. Where operating temperature exceeds the range of degrees C. b. Where temperature varies extremely with dew condensation. c. Where relative humidity exceeds the range of % d. Where has corrosive gas, inflammable gas. e. Where conveys vibration or shock directly. f. Where water, oil or chemical is splashed. Attentions In installing the processor in a panel, pay close attention to the following points. *Keep adequate ventilation space around the processor. *Processor should be kept apart from radiate heating machine heater, trance, resistor etc.. *Installing a fan or cooler is recommended in the case of temperature is higher than 55 degrees C. -21-

25 4.2 Wiring Cable for CC-Link Use exclusive cable for CC-Link system. The efficiency of CC-Link system is not warranted in applications with any other cable. Refer to brochure CC-Link regarding the specification of cable for CC-Link and inquiry Wiring with Each Unit (1) Wiring Master Unit and Remote Unit Refer to following wiring diagram for wiring master unit and remote unit with cable for CC-Link. Master unit Processor Remote unit Terminal resistor DA DA DA DB DB DB DG DG DG SLD SLD SLD FG 24V 24V Terminal resistor 24G FG 24G FG Attention "Terminal resistor" should be connected with DA-DB on both unit at the end of CC-Link. In connecting terminal resistor with DA-DB, use the terminal resistor that attached with master unit. Refer to the user's manual for CC-Link system master and local unit. (2) Wiring of External Power Unit and Frame Ground Refer to the above wiring diagram to connect external power unit 24V DC and frame ground. Connect 24V side of 24V DC power unit to the terminal indicated 24V, and - side to 24G. Connect frame ground to FG terminal. The following figure shows terminals of Processor for CC-Link interface DA DG +24V 24G DB SLD FG -22-

26 (3) Wiring of Read/write Head Reference the following diagram, when wiring the read/write head cable to the processor. There are two connectors CH1 and CH2 for connecting two heads. Wiring diagram Processor Cable of head Read/write Head Connector Color CH1 BK BK/WH GN GN/WH RD RD/WH Shield Connector Color CH2 BK BK/WH GN GN/WH RD RD/WH -23- S OUT1 SOUT2 SIN1 SIN2 24V+ 24V- S OUT1 SOUT2 SIN1 SIN2 24V+ 24V- Shield Appropriate connector D sub 9 pin Type number : HDEB9P Attention Cable of read/write head should be kept apart from other power cable and high voltage machines. When installing read/write heads on a metal frame, the frame should be grounded to the protective ground conductor.

27 4.3 Each Part and Setting Each part of processor BIS C-489and setting procedure are indicated in the following table. Parts Description Setting switch for station STATI NO. The second digit of station Switch No. 0 OFF OFF OFF 10 OFF OFF 20 OFF OFF 30 OFF 40 OFF OFF 50 OFF 60 OFF The first digit of Switch No. station OFF OFF OFF OFF 1 OFF OFF OFF 2 OFF OFF OFF 3 OFF OFF 4 OFF OFF OFF 5 OFF OFF 6 OFF OFF 7 OFF 8 OFF OFF OFF 9 OFF OFF Setting switch for transmitting rate of data link Transmission rate of data link Switch No. BRATE kbps OFF OFF OFF 625kbps OFF OFF 2.5Mbps OFF OFF 5Mbps OFF 10Mbps OFF OFF Setting switch for write protection Setting Switch No. BLOCK NO for CH1, CH2 OFF OFF OFF OFF OFF 0 OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF all OFF When a write command includes the area that is write protected, a write protection error occures. Write protection can be set per "page" nil :no write protection 0 :settingonpage :setting on page :setting on page :setting on page all :setting on all pages -24-

28 Parts Description LED PW Light on : Power indication Light off : Power OFF RUN L RUN SD RD L ERR. Light on : Operating normally Light off : Cut off power 24V DC,or WDT error Light on : Communicating normally Light off : Cut off communicating ( time over error ) Light on while sending data Light on while receiving data Light on : Communicating data error (CRC error), station number, setting switch for transmitting rate of data link error Blinking fixed interval : when setting switch for station number or transmitting rate of data link is changed while power is supplied. Blinking unsettled interval : terminal resistor is not connected, or unit or cable for CC-Link is influenced by noise. Light off : Communicating normally CH1 CH2 SD RD ID- ERR. IN-Z SD RD ID- ERR. IN-Z Light on : while sending read/write head CH1 Light on : while receiving read/write head CH1 Light on : wrong condition read/write head CH1 when setting switch for block no. is out of set range Blinking : when setting switch for block no. is changed in set range Light off : normal condition Light on : when detects inzone Light off : cable breakage of read/write head Light on : while sending read/write head CH2 Light on : while receiving read/write head CH2 Light on : wrong condition read/write head CH2 when setting switch for block no. is out of set range Blinking : when setting switch for block no. is changed in set range Light off : normal condition Light on : when detects inzone Light off : cable breakage of read/write head Reset RST Reset switch for hardware Operation after resetting Initialize remote register Request of processing initial data will be Renewal setting data of each setting switch Connector for read/write head Terminal block for power supply and data link Connector for read/write head (for CH1, CH2) Terminal block for power supply and data link -25-

29 5. Instructions for Programming 5.1 Connecting the System and Processing Data Processor BIS C-489 reads and writes data of device in sequencer. The processing unit of data when communicating with the code tag is a one word unit 16 bits, 2 bytes. To keep data interchangeability, the processing unit should be a unified word unit in a host system if the sequencer and personal computer are intermingled. General-purpose computer Connect with MELSECNET, Ethernet etc. CC-Link master local station Read/write Code Head tag CH1 Sequencer Master Processor CPU unit BIS C-488 CH2 Cable for read/write head Processor Word unit BIS C-489 Read/write Code head tag CH1 CH2 CC-Link Cable for read/write head External power unitdc24v 5.2 Construction of Data Processing unit Processing data of identification system is carried out with word unit. Note Selecting a processing unit for a Initializing instruction RYn1 should be OFF in this system. (1)Dataflowchartwithwordunit Buffer memory Data carrier Buffer memory Writing Reading -26-

30 5.3 Memory of Code Tag The following memory of the code tag can communicate with processor BIS C-489. Construction of memory in code tag BIS-C AA BIS-C AA words words words words *1 : Life expectancy of Code Tag Information 2 words BIS-C AA BIS-C AA word word words words *1 : Life expectancy of Code Tag Information 2 words <Note> Life expectancy of Code Tag Information is written in the last 2 words. Nothing can be written in this area. -27-

31 5.4 Interlock Matching of the input-output signals are dependent on instructions in the following table. Set interlock to match input output signal dependent on instruction. RXn3/RXnB... ID-BUSY RXn4/RXnC... Finish ID instruction RXn5/RXnD... Error detection RX(n+7)8... Flag for requiring to process initial data RX(n+7)B... Remote READY RYn4/RYnC... Require executing identification instruction RYn5/RYnD... Require executing special instruction... Signal for CH2 Codes Input-output signal (Interlock signal) Instructions ASCII Hex. RXn3 RXn4 RXn5 RYn4 RYn5 RXnB RXnC RXnD RX(n+7)8 RX(n+7)B RYnC RYnD Reading RD 4452H CR 5243H Sequence reading AR 5241H SR 5253H Writing WD 4457H Comparison writing CW 5743H Sequence reading AW 5741H Sequence SW 5753H Comparison writing Batch writing FI 4946H Comparison CM 4D43H Clear CL 4C43H Reading life LR 524CH expectancy of code tag Specifying stop sequence instruction Specifying error cancel Specifying interval for executing sequence instruction Specifying retry count Specifying processing unit Specifying inzone detection time Select channel number Interlock is required. Interlock is not required. -28-

32 5.5 Faulty Condition of Data Link The following table shows condition of processor BIS C-489 and communication with code tag when the data link is in a fault condition. (1) Condition of Processor Condition of Processor Condition of data link Remote input Remote output Remote resistor Remote resistor (RX) (RY) (RWw) (RWr) When sequencer CPU of master station has been Continuation All OFF Continuation Continuation stopped (Data link continuation) When sequencer CPU is reset When sequencer CPU Continuation All OFF Hold Continuation occurs error When processor released data link Data link stop The data cannot be transmitted to master station because data link has been stopped. (2) Condition of communication with code tag Condition of communication with code tag Condition of data link Uncommunicating Executing Divided sending or communication receiving condition Normal Sequence Normal Sequence Normal Sequence instruction Instruction instruction Instruction instruction Instruction When sequencer CPU of master station has been Stop Stop Stop Stop stopped (Data link continuation) When sequencer CPU is reset When sequencer CPU occurs error Stop Stop Stop Stop When processor released data link Data link stop 2 Stop after communication with code tag is finished. 3 Stop after outzone is detected. -29-

33 6. Communication Procedure with Code Tag Programming procedure to communicate with code tag is explained per function (instruction) in this chapter. Attention "Initial setting of master unit" program is not written after 6.7 in this chapter. Therefore, program 6.5 1should be written to the first part of the program in executing program after Instruction for programming Refer to following notes in using this processor to communicate with code tag before creating programs. (1) Input-output signals for handshake with sequencer CPU Signal to execute identification instruction from sequence program, or signal that finished identification instruction are called Input-output signals for handshake, and the signals are necessary to communicate with code tag. Handshake signals should be inserted. Refer to 5.4 on signals for handshake. (2) Reading and writing of remote register Sequence program to read or write of remote register is necessary to communicate with code tag. Create a sequence program for needed part. Default digit is written when processor is standing. 1. Remote register is not taken battery back up It needs to write set or changed data every time because all data return to default digit when power is supplied, operated reset, or changed mode. 2. Changing default digit of remote resistor It needs to create sequence program to change default digit to communicate with code tag. (3) Condition of retaining data in code tag when error occurred Data is rewritten per 32 words (or 16 words) with new data and old data mixed when error occurred while communicating with code tag. Execute instruction again after error cancellation as measure to this condition when error occurred while executing writing instruction (WD,CW,AW,SW,FI,WP). -30-

34 (4) Notes for divided reading and writing It should be done per 5 words using both of CH1, CH2or 12 words using only 1CH in storing divided data to data register in using instruction indicated below. When unused register does not store communication data occurred in allocated data register at this time, the register would be unsettled in reading, unused in writing. Objective instruction : RD,CR,AR,SR,WD,CW,AW,SW,CM [ex.] using both of CH 1, CH 2 The first address for reading and writing to code tag 0 Number of words for reading and writing to code tag 7 Allocation data of sequencer CPU to resistor D0...D9 Divided 1 Divided 2 DO D1 D2 D3 D4 D5 D6 D7 D8 D9 Data Sequencer CPU A B C D E F G Data resistor Data D7...D9 are ignoredinwriting. Writing Ignored K7 Data Code tag memory Reading Divided 1 Divided 2 Unstable Sequencer CPU Data resistor Data D7...D9 are unstable in reading. -31-

35 6.2 List of Instructions and Commands The following instructions and commands can be executed with the processor BIS C-489. Functions Instructions/ Instruction code Process Reference Commands ASCII Hex. Reading Reading RD 4452H Reads data from code tag CR 5243H Compares data to check. Sequence AR 5241H Executes reading in sequence until code tag gets into Reading SR 5253H communication area, and executes reading when code tag got into communication After that, compares data to check. Writing Writing WD 4457H Writesdatatocodetag CW 5743H Compares data to check. Sequence AW 5741H Executes writing in sequence until code tag gets into Writing SW 5753H communication area, and executes writing when code tag got into communication After that, compares data to check. Batch FI 4946H Writes specified data to specified area in code tag writing simultaneously. Check Comparing CM 4D43H Compares data of processor with data in code tag. 6.9 Clearance Clearing CL 4C43H Clears specifiedareaincodetagwith"0" 6.10 Command Sequence Cancels sequence instruction compulsively instruction Cancellation Error Executes error cancelling process cancellation Clearing error LED, resetting error detected signal, Clearing executing result store area in remote resister Life Reading Reads life "expectancy information" of code tag that written in expectancy life LR 524CH code tag expectancy of code tag -32-

36 6.3UsedSysteminthisChapter The example of the sequence program that is explained in this chapter applies to the following system. Refer to user's manual for CC-Link master unit (details) on sequence program of whole CC-Link system. (1) Construction of system in programming example CC-Link master / local Processor Station : 1 station Read/write Code station (BIS C-489) Occupied : 4 stations head tag using both of CH1,CH2 CH1 Sequencer Master CPU unit CH2 CC-Link Cable for head External power unit (DC24V) (2) Relation of sequencer CPU, buffer memory of master unit and remote device station Remote device Sequencer CPU Master unit Processor Remote Input (RX) Remote Input (RX) Address M208...M223 E0H RX00...RX0F RX00...RX0F M224...M239 E1H RX10...RX1F RX10...RX1F M240...M255 E2H RX20...RX2F RX20...RX2F M256...M271 E3H RX30...RX3F RX30...RX3F M272...M287 E4H RX40...RX4F RX40...RX4F M288...M303 E5H RX50...RX5F RX50...RX5F M304...M319 E6H RX60...RX6F RX60...RX6F M320...M335 E7H RX70...RX7F RX70...RX7F Remote output (RY) Remote output (RY) M336...M H RY00...RY0F RY00...RY0F M352...M H RY10...RY1F RY10...RY1F M368...M H RY20...RY2F RY20...RY2F M384...M H RY30...RY3F RY30...RY3F M400...M H RY40...RY4F RY40...RY4F M416...M H RY50...RY5F RY50...RY5F M432...M H RY60...RY6F RY60...RY6F M448...M H RY70...RY7F RY70...RY7F * For QCPU(Q mode),qnacpu Note for using ACPU : RX:M200...M327, RY:M328...M

37 6.4 Sequence Program for ACPU Sequence program for QCPU Q mode, QnACPU is written on 6.7 in this chapter. In using as sequence program for ACPU, pay attention to following points. (1) Replace of relay Replace the following contacts for ACPU or QCPUQ mode, QnACPU. ACPU QCPU(Q mode) / Contents QnACPU M9036 SM400SM1036 always M9037 SM401SM1037 always OFF M9038 SM402SM1038 after RUN, only 1 scan M9039 SM403SM1039 after RUN, OFF only 1 scan * SM SM1039 is special relay when contact is converted from A to Q/QnA. (2) Setting of RX, RY Regards in using for ACPU that RX and RY varies ; RX : M200...M327, RY : M328...M355. (3) Additional sequence program for refreshing RX, RY The following sequence program should be added. In the case of the following setting is set, sequence program for refresh is not required. Using QJ61BT11,AJ61QBT11,A1SJ61QBT11 Set automatic refresh parameter with GX Developer Using AJ61BT11,A1SJ61BT11 Set automatic refresh with instruction for CC-Link Initial setting program for master unit (parameter setting, data link setting) M9036(SM400) FROM H0 H680 K4M100 K4 Reading of data link condition Reading FROM H0 H0E0 K4M200 K8 RX information (K4M208) Identification communication instruction program Addition M9036(SM400) TO H0 H160 K4M328 K8 Writing (K4M336) RY information * Example of sequence program for ACPU. Digits for QCPU Q mode, QnACPU are indicated in. <Attention> Automatic refresh is not done if automatic refresh parameter is not set. -34-

38 6.5 Basic Format of Program The followings are basic format of program. Programs are created as following order. Refer to 6.3 on program condition. (1) Initial setting of master unit (Parameter setting, standing data link) (2) Checking data link condition of BIS C-489, reading remote input (RX) (3) Initial setting of BIS C-489 (Refer to 6.6 (4) Communication instruction 1 (Refer to ) (4) Communication instruction n (Refer to ) (5) Writing to remote output (RY) (1) Initial setting of master unit Creates program to stand data link with CC-Link refresh command after setting of parameter. [ex.] Number of connecting station : 1 Connecting station : BIS C-489 (station number 1, occupies 4 stations) (a)setting number of connecting station (b)setting station information Specifying refresh Data link standing by buffer memory Reset requiring standing signal in normal condition Reading parameter condition in error condition Reset requiring standing signal <Attention> Program (a), (b) is not needed when CC-Link parameter is set with GX Developer in using QCPU (Q mode) or QnACPU. -35-

39 (a) Setting of the number of connecting stations (buffer memory address of master unit : 1H) Set the number of stations to be connected to master unit such as remote I/O station, remote device station, intelligent device station, local station (including reserve station). (b) Setting of station information (buffer memory address of master unit : the first station(20h)...64th station(5fh)) Set the type of stations to be connected to master unit such as remote I/O station, remote device station, intelligent device station, local station. Set for all number of connecting stations. (bit) Station type Occupied station Station number 0:Remote I/O station 1:Remote device station 2:Intelligent device station 1 : occupies 1 station 1(01H)...64(40H) 2 : occupies 2 stations 3 : occupies 3 stations 4 : occupies 4 stations ex. Set the Processor to station number E H Station number 30(1EH ) Number of occupied stationprocessor occupies 4 stations Station type Processor is remote device station (2) Reading data link condition of processor, remote input (RX) Create program to interlock after detecting data link condition of processor. Read RXn0...RX(n+7)F out to M200 M327(M208 M335). M9036(SM400) FROM H0 H680 K4M100 K4 Reading data link condition of processor FROM H0 H0E0 K4M200 K8 Read RXn0..RX(n+7)F out to M200...M327 (K4M208) (M208 M335) * Example of sequence program for ACPU. Digits for QCPU Q mode, QnACPU are indicated in. <Attention> Delete the sequence program indicated with broken line part in chart above, in the case of the following setting is set. *Using QJ61BT11,AJ61QBT11,A1SJ61QBT11 Set automatic refresh parameter with GX Developer *Using AJ61BT11,A1SJ61BT11 Set automatic refresh with instruction for CC-Link (3) Initial setting of processor Create the program to execute initial setting of processor refer to 6.6. (4) Communication instruction Create the program to execute identification communication instruction refer to

40 (5) Writing to remote output (RY) Create the following program and write M328...M455(M336...M463) to RYn0...RY(n+7)F. M9036(SM400) TO H0 H160 K4M328 K8 Write M328...M455 to RYn0...RY(n+7)F (K4M336) (M336...M463) * Example of sequence program for ACPU. Digits for QCPU Q mode, QnACPU are indicated in. <Attention> Delete the sequence program in chart above, in the case of the following setting is set. *Using QJ61BT11,AJ61QBT11,A1SJ61QBT11 Set automatic refresh parameter with GX Developer *Using AJ61BT11,A1SJ61BT11 Set automatic refresh with instruction for CC-Link Processing program when fault condition occurred Reference the chart below to create a program for fault conditions. Initial setting program of master unit parameter setting, data link setting M9036(SM400) FROM H0 H680 K4M100 K4 Reading data link condition M100 FROM H0 H0E0 K4M200 K8 Reading RX information (K4M208) RST M332(RY4) Create processing program (M340) as refer to left chapter. M332 (M340) : RST M1 Relay of request of identification instruction M1: Processing program External relay of request of identification instruction Identification communication instruction program M9036(SM400) TO H0 H160 K4M328 K8 Writing RY information (K4M336) * Example of sequence program for ACPU. Digits for QCPU (Q mode), QnACPU are indicated in ( ). Attention Reset request of identification instruction to avoid unexpected communication in program when fault is occurred. The instruction is executed again after recovery of link in the case of external contact M1 for starting identification instruction is not reset. -37-

41 6.6 Initial setting Following initial setting is needed to communicate with code tag. (1) Initial setting with factory setting (a) In using ACPU * Regard that the following example shows RX : M200...M327, RY : M328...M455. M9036 FROM H0 H680 K4M100 K4 Reading other data link condition FROM H0 H0E0 K4M200 K8 Reading input contact (RX) M320 M100 SET M328 Factory setting (RX78) (Link) (RY0) SET M448 finish processing initial data (RY78) SET M449 require setting initial data M205 (RY79) FROMP H0 H2E1 R0 K1 Reading error code of setting dip switch M320(RX78) (RX5) (RY0) M448 OFF finish processing initial data M321(RX79) (RY78) M449 OFF require setting initial data M9036 (RY79) TO H0 H160 K4M328 K8 Writing output (RY) (b) In using QnACPU Automatic refresh parameter is set with GX Developer as followings. * Regard that the following example shows refresh range RX : M208...M335, RY : M336...M Setting with GX Developer Start I/O No. : 0000 Type : Master station All connect count : 1 Remote input (RX) : M208 Remote output (RY) : M336 Remote register (RWr) : D200 Remote register (RWw) : D100 Special relay (SB) : Special register (SW) : - Retry count : 3 utomatic connection station count : 1 Standby master station number : 0 PLC down select : Stop Scan mode setting : asynchronous Delay information setting : 0 Station information setting : station information 2. Program Reading other data link condition Factory setting finish processing initial data require setting initial data Reading error code of setting dip switch OFF finish processing initial data OFF require setting initial data -38-