CS 326: Operating Systems. Paging. Lecture 15

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1 CS 326: Operating Systems Paging Lecture 15

2 Today s Schedule Introduction to Paging Paging in xv6 4/11/18 CS 326: Operating Systems 2

3 Today s Schedule Introduction to Paging Paging in xv6 4/11/18 CS 326: Operating Systems 3

4 Memory Fragmentation Thinking back to segmentation, one big issue is memory fragmentation We could move segments around (say, on a fixed interval like every 10 seconds) but this is inefficient Wouldn t it be great if we could assign parts of physical memory to processes bit by bit instead? 4/11/18 CS 326: Operating Systems 4

5 Paging We can use paging to allocate non-contiguous regions of memory With paging, each page of memory can be mapped to a process Example: you get page 1, 3, 45, 682 Need more memory? Sure, here s page 981 This approach avoids fragmentation and reduces waste Most memory we can waste: page_sz - 1 4/11/18 CS 326: Operating Systems 5

6 Page Frames Physical memory is broken up into pieces called page frames Each page frame contains a single page Pages are virtual, page frames are physical Page frame sizes are OS & hardware-specific 4KB, 2MB, 1GB on Intel x86_64 4KB is extremely common Generally a power of 2 4/11/18 CS 326: Operating Systems 6

7 Virtual (64 KB) vs Physical (128 KB) Address Space (AS) 4/11/18 CS 326: Operating Systems 7

8 Determining the Page Size Drumroll please!! [mmalensek-pi:~]$ getconf PAGE_SIZE /11/18 CS 326: Operating Systems 8

9 Tracking Memory Awesome! We ve (mostly) eliminated fragmentation! Now comes the hard part: how do we figure out which pages are allocated to our processes? We achieve this with a page table 4/11/18 CS 326: Operating Systems 9

10 Page Table The page table is a structure maintained by the OS for each process When a process is swapped in or out, the page table is as well Page tables consist of page table entries (PTEs) Physical Frame Number 4/11/18 CS 326: Operating Systems 10

11 PTE Elements Valid/Invalid bit whether the memory is allocated Used to provide our illusion of a single, giant address space without having to actually allocate pages Protection Bits similar to the NX bit, segment protection bits, etc. Present bit whether the page is actually in memory or not Why do we need this? Dirty bit whether the page has been changed since it was read into memory And many more, depending on OS/hardware/etc. 4/11/18 CS 326: Operating Systems 11

12 Implementing the Page Table The page table s main job is map virtual addresses to physical addresses There are plenty of options for doing this At a basic level, we can imagine using a simple array to keep track of the locations Virtual Page 0 à Physical Page 3 Virtual Page 4 à Physical Page 1 4/11/18 CS 326: Operating Systems 12

Page Table Translation Source: https://en.wikipedia.

13 Page Table Translation Source: 4/11/18 CS 326: Operating Systems 13

14 Address Translation To facilitate this process, we use address translation to convert Virt. Page à Phys. Page Split the memory address into two pieces: the virtual page number and the offset The page number determines where in physical memory the data is located Kind of like our base address in segmentation The offset indicates where the data is stored within the physical page 4/11/18 CS 326: Operating Systems 14

15 Paging Issues The main issue with paging is that page tables can become quite large 4KB page size, 32-bit address space = 1m pages It also takes time to do all this translating We can t just rely on a hardware component to save us here: it would require too much of its own, fast memory! We have a few options, including caching portions of the address translations 4/11/18 CS 326: Operating Systems 15

16 Paging Upsides In addition to fragmentation-free allocation, we can use paging with a backing store Commonly a disk, pages that are not used frequently can be swapped out to disk Frees up memory for other processes to use When swapped memory is referenced by a program, a page fault occurs Must be reloaded back into main memory In modern times, SSDs make this very fast 4/11/18 CS 326: Operating Systems 16

17 Today s Schedule Introduction to Paging Paging in xv6 4/11/18 CS 326: Operating Systems 17

18 xv6: Setting up Paging xv6 walks through physical memory to set up its linked list of free pages Each entry in the list corresponds to a page To allocate a page, simply return (current_page) --> next 4/11/18 CS 326: Operating Systems 18

19 Paging Structs struct run { }; struct run *next; struct { struct spinlock lock; int use_lock; struct run *freelist; } kmem; 4/11/18 CS 326: Operating Systems 19

20 xv6: kalloc char* kalloc(void) { struct run *r; if(kmem.use_lock) acquire(&kmem.lock); r = kmem.freelist; if(r) kmem.freelist = r->next; if(kmem.use_lock) release(&kmem.lock); return (char*)r; } 4/11/18 CS 326: Operating Systems 20

21 xv6: kfree void kfree(char *v) { struct run *r; if(kmem.use_lock) acquire(&kmem.lock); r = (struct run*)v; r->next = kmem.freelist; kmem.freelist = r; if(kmem.use_lock) release(&kmem.lock); } 4/11/18 CS 326: Operating Systems 21

22 Address Structure A virtual address 'la' has a three-part structure as follows: Page Directory Page Table Offset within Page Index Index \--- PDX(va) --/ \--- PTX(va) --/ 4/11/18 CS 326: Operating Systems 22

23 Page Directory? Wait, weren t we just supposed to have a virtual page number and an offset? In x86 (32-bit), each page table is stored in a single page (4 KB, 1024 entries) In scenarios where a single page cannot store enough page table entries, we need a second level of indirection Directory: the double pointers of memory 1024 * 1024 entries * 4 KB = 4 GB address space 4/11/18 CS 326: Operating Systems 23

24 P2 Early Grading Commit your code to github We ll run through your code and the test cases For those with minor issues, you may fix and submit the changes by 11:59pm If you do not do a code review today, you re not eligible for extra credit!! 4/11/18 CS 326: Operating Systems 24

Virtual Memory. Chapter 8

Virtual Memory. Chapter 8 Chapter 8 Virtual Memory What are common with paging and segmentation are that all memory addresses within a process are logical ones that can be dynamically translated into physical addresses at run time.