JAVA MICROARCHITECTURES

Transcription

1 JAVA MICROARCHITECTURES

2 THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE

3 JAVA MICROARCHITECTURES Edited by Vijaykrishnan Narayanan Pennsylvania State University Mario I. Wolczko Sun Microsystems, Inc. SPRINGER SCIENCE+BUSINESS MEDIA, LLC

4 ISBN ISBN (ebook) DOI / Library of Congress Cataloging-in-Publication Data A CLP. Catalogue record for this book is available from the Library of Congress. Copyright 2002 Springer Science+Business Media New York Originally published by Kluwer Academic Publishers in 2002 Softcover reprint of the hardcover 1st edition 2002 All rights reserved. No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording, or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Printed on acid-free paper.

5 Contents List of Figures List of Tables Preface 1 Benchmarking the Java Virtual Architecture David Gregg, James Power and John Waldron VB Xl Xlll 1 2 A Study of Memory Behavior of Java Workloads 19 Yefim Shuf, Mauricio J. Serrano, Manish Gupta and Jaswinder Pal Singh 3 An Efficient Hardware Implementation of Java Bytecodes, Threads, and 41 Processes for Embedded and Real-Time ApplIcations David S. Hardin, Allen P. Mass, Michael H. Masters and Nick M. Mykris 4 Stack Dependency Resolution for Java Processors ba,>ed on Hardware 55 Folding and Translation: A Bytecode Processing Analysis M. Watheq El-Kharashi, Fayez Gebali and Kin F. Li 5 Improving Java Performance in Embedded and General-Purpose Processors 79 Ramesh Radhakrishnan, Lizy K. John, Ravi Bhargava and Deepu Talla 6 The Delft-Java Engine 105 John Glossner and Stamatis Vassiliadis 7 Quicksilver: A Quasi-static Java Compiler for Embedded Systems 123 Samuel P. Midkiff, Pramod G. Joisha, Mauricio Serrano, Manish Gupta, Anthony Bolmarcich and Peng Wu

6 vi JAVA MICROARCHITECTURES 8 Concurrent Garbage Collection Using Hardware-Assisted Profiling 143 Timothy Heil and James E. Smith 9 Space-Time Dimensional Computing for Java Programs on the MAJC 161 Architecture Shailender Chaudhry and Marc Tremblay 10 Java Machine and Integrated Circuit Architecture (JAMAICA) Ahmed El-Mahdy, Ian Watson and Greg Wright 11 Dynamic Java Threads on the JAMAICA Single-Chip Multiprocessor Greg Wright, Ahmed El-Mahdy and Ian Watson References Index

7 List of Figures 1.1 Average dynamic bytecode percentages for the top 10 methods in terms of bytecodes executed A summary of dynamic percentages of category usage by the applications in the SPEC JVM98 suite Characterization of heap accesses and accesses to object fields Characterization of hot spots Simulation results Classification of data related misses Assessment of opportunities for prefetching JEMCore Java Processor Core Architecture Java Grande Forum Synchronization Benchmark Results Multiple Java Virtual Machine Data Structures The JEMBuilder Application Builder Timer interrupt handler code in Java Timer interrupt notification thread aj-100 Block Diagram aj -100 Package (larger than actual size) Proposed Java processor architecture Dual-architecture Java processor pipeline compared with a pure mc processor pipeline and a RISC pipeline Percentages of eliminated instructions relative to all instructions and relative to stack instructions (producers and non-anchor consumers) only Speedup of folding Percentages of occurrence of different folding cases recognized by the folding information generation (FIG) unit Percentages of occurrence of different folding operations performed by the bytecode queue manager (BQM) Percentages of occurrence of different folding patterns at the output of the folding translator unit (FT) 72

8 Vlll JAVA MICRO ARCHITECTURES 4.8 Percentages of occurrence of different operations performed by the local variable file (LVF) Percentages of occurrence of different folding patterns processed by the load/store unit (LS) Percentages of usage of different execution units (EXs) Block diagram of the picojava-ii microprocessor core Basic pipeline of the picojava-ii core Increasing decode bandwidth using a fill unit and DB-Cache Trends in decode rate and hit rate for different DB-Cache sizes Performance improvement when adding a fill unit, DB- Cache (64-16K entries) and instruction execute width of two to a picojava-ii processor Relative performance of picojava-ii using the fill unit, DB-Cache (64-16K entries), execution width of two and stack disambiguation Available ILP in Java workloads The Hardware Interpreter (Hard-Int) architecture Translating bytecodes in the Hard-Int architecture Execution cycles for different execution modes on a 4- way machine Execution cycles for different execution modes on a 16- way machine Cycles executed per bytecode on a 4-way machine DELFT-JAVA concurrent multi-threaded processor organization showing multiple thread units, local and global processor units, thread register files, cache memory, control unit, and Link Translation Buffer (LTB) Indirect register access mechanism showing indirect memory locations (idx), update adders, underflow/overflow signal, and resolved register address multiplexor Indirect register mapping showing how a resolved register address is mapped to main memory Performance results of a vector-multiply routine for various processor models showing speedup normalized to an implementable pipe lined stack model The indirection scheme for quasi-static compilation Pseudo-code showing explicit checks for reference resolution Timing measurements for an input size of Timing measurements for an input size of Comparing indirection table update strategies 140

9 List of Figures ix 8.1 Example concurrent reference mutation Concurrent GC RPA query The relational profiling architecture contains the profile control table (PCT) and the query engine Generational write-barrier pseudo-code Time line for the second GC in the Strata benchmark System-on-a-chip design An illustration of the Java Stack for a Java Thread Java Object Structure Block diagram for a MAJC implementation Efficiency of the Speculative Thread for various Overheads and Savings Dynamic bytecode execution frequencies for various bytecode classes Normalized dynamic instruction execution counts for various execution models Cumulative distribution of local variable access for selected SPEC JVM98 programs Method call depth distribution for selected SPEC JVM98 programs Register-windows miss ratios versus the number of registerwindows, for selected SPEC JVM98 programs Per-procedure visible registers and argument-passing operation Normalized static instruction counts, broken down into various bytecode-mapping overheads, for selected SPEC JVM98 kernels Active temporary variables distribution for selected SPEC JVM98 kernels Distribution of active temporary variables that need saving across method calls, for selected SPEC JVM98 kernels The effect of the proposed optimizations on static instruction counts, for selected SPEC JVM98 kernels Token/thread life-cycle Serial & parallel executions Speedup of nfib in the current configuration Speedup of nfib in the future configuration Speedup of nfib, current configuration, token passing vs. oracle Speedup of jnfib, using light RTS Speedup of jnfib, using medium RTS 220

10 x JAVA MICROARCHlTECTURES 11.8 Speedup ofjnjib, current configuration, light RTS, P=32, T= The Empty program Speedup vs. outer loop iterations for the Empty program Load balance of Empty program, LN = 219, current configuration mpeg2encode results jmpeg2decode results 227

11 List of Tables 1.1 Measurements of total number of method calls by SPEC JVM98 applications Measurements of Java method calls made and bytecodes executed by SPEC JVM98 applications Calls to non-native methods in the class library Bytecode instructions executed in the class library Dynamic method execution frequencies for the SPEC JVM98 programs, excluding native methods By tee ode based dynamic percentages of local variable array sizes, as well as temporary and parameter sizes for SPEC JVM98 programs Dynamic percentages of category usage by the applications in the Java SPEC JVM98 suite Total SPEC dynamic bytecode usage increases SPEC bytecode usage for compress using the different compilers SPEC bytecode usage for db using the different compilers SPEC bytecode usage for jess using the different compilers SPEC bytecode usage for mtrt using the different compilers JVM instruction categories Folding templates recognized by the FIG unit Summary of BQM folding operations Mapping different anchor instructions to the folding operations performed by the bytecode queue manager (BQM) Mapping folding templates to FT output Mapping anchors to LVF operations SPEC JVM98 Java benchmark suite summary A trace for a Java code execution Associating instruction categories with JVM basic requirements and our processor modules 75

12 xu JAVA MICROARCHITECTURES 4.10 Comparison between the three approaches in supporting Java in hardware: direct stack execution, hardware interpretation, and hardware translation Description of the SPEC JVM98 benchmarks used in this study Percentage of instructions executed in parallel when using a DB-Cache of 128 entries Percentage of instructions executed in parallel when using stack disambiguation with a 128 entry DB-Cache Execution statistics for the SPEC JVM98 benchmarks Configurations of simulated processor Cache performance for the SPEC JVM98 benchmarks Translated code buffer performance for the SPEC JVM98 benchmarks Java Virtual Machine instructions with special support in the DELFT-JAvA processor Processor organization characteristics for various processor models Processor performance and speedup for various processor models normalized to an implementable pipelined stack model Method code and indirection table sizes for SPEC JVM98 with input size=lo Method code and indirection table sizes for SPEC JVM98 with input size= Benchmark characteristics GC Performance Characteristics Write-barrier work eliminated by the RPA Speedup obtained due to STC Efficiency for Speculative Thread Brief descriptions of the selected benchmark programs from the SPEC JVM98 suite Relative method call depths for selected SPEC JVM98 programs Comparing static normalized Ideal components for the kernels, with the corresponding Ideal components obtained dynamically for the full programs 200

13 Preface Java is an exciting new object-oriented technology. Hardware for supporting objects and other features of Java such as multithreading, dynamic linking and loading is the focus of this book. The impact of Java's features on microarchitectural resources and issues in the design of Java-specific architectures are interesting topics that require the immediate attention of the research community. While Java has become an important part of desktop applications, it is now being used widely in high-end server markets, and making forays into low end embedded computing. A study of the behavior of Java applications is essential in guiding the design of new architectural support features. The first chapter provides a characterization of a set of Java applications at a platform-independent level. Specifically, various characteristics of bytecode execution are considered. The second chapter specifically delves into the memory characteristics of Java programs. The growing performance disparity between the processor core and the memory system makes memory behavior an important factor influencing performance. Further, a detailed understanding of various Java-specific features such as heap allocation, object manipulation and garbage collection, which are memoryintensive would help in identifying appropriate architectural support. Java is becoming increasingly popular in embedded/portable environments. It is estimated that Java-enabled devices such as cell-phones, PDAs and pagers will grow from 176 million in 2001 to 721 million in 2005 [TakOl]. One of the reasons for this is that Java enables service providers to create new features very easily as it is based on the abstract Java Virtual Machine (JVM). Thus, it is currently portable to 80-95% of platforms and lets developers design and implement portable applications without the special tools and libraries that coding in C or C++ normally requires [PauOl]. In addition, Java allows application writers to embed animation, sound, and other features within their applications easily, an important plus in web-based portable computing. Chapters 3 to 6 focus on providing architectural support for Java execution in embedded environments. These chapters discuss various commercial and academic approaches to designing hardware for direct bytecode execution. Various hardware features to support stack folding, code translation, dynamic linking and

14 xiv JAVA MICROARCHITECTURES object management are addressed. In addition to the bytecode engines covered in this volume, various Java accelerators have also been announced over the past year. A good overview of these architectures can be found in the four part series by Levy [LevOla, LevOlb, LevOlc, LevOld] and we do not attempt to duplicate this commendable effort. Chapters 7 and 8 focus on compilation and architectural support targeted at the memory system. Chapter 7 presents the use of a novel compilation technique that helps Java applications meet the small memory footprint constraints of embedded devices. As embedded JVMs are designed to run for long periods of time on limited-memory embedded systems, creating and managing Java objects is of critical importance. The garbage collector (GC) is an important part of the Java virtual machine responsible for the automatic reclamation of unused memory. Chapter 8 focuses on providing support for garbage collection. The final three papers of this volume focus on high-performance single-chip multiprocessor architectures to support Java execution. Such high-performance processors would be ideal for Java servers and workstations. A common characteristic of these architectures is their support for executing multiple threads. Chapter 8 discusses the concept of space-time computing and describes the MAJC architecture which supports this. Chapters 9 and 10 explain the JA MAICA architecture, which supports the execution of dynamic Java threads. Many of the papers presented in this book are revised versions of papers presented at the Workshop on Hardware Support for Objects and Microarchitectures for Java, held in conjunction with ICCD in 1999 and We would like to thank all the authors for their contribution. We also wish to express our sincere gratitude to all those who reviewed manuscripts for the book. Narayanan would like to acknowledge grants from National Science Foundation (CAREER and ) that supported him during this endeavor The URLS cited in the bibliography were correct at the time of writing. VIJAYKRISHNAN NARAYANAN, PENNSYLVANIA STATE UNIVERSITY MARIO WOLCZKO, SUN MICROSYSTEMS, INC. JANUARY 2002