Energy Efficient Microprocessor Design

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1 Energy Efficient Microprocessor Design

2 Energy Efficient Microprocessor Design by Thomas D. Burd Robert W. Brodersen with Contributions Irom Trevor Pering Anthony Stratakos Berkeley Wireless Research Center University of California, Berkeley

3 ISBN ISBN (ebook) DOI / Library of Congress Cataloging-in-Publication Data A C.I.P. Catalogue record for this book is available from the Library of Congress. Copyright 2002 Springer Science+Business Media New York Originally published by Kluwer Academic Publishers in 2002 Softcover reprint ofthe hardcover Ist edition 2002 AII rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, mechanical, photocopying, recording, or otherwise, without the prior written permission of the publisher, Springer Science+Business Media, LLC. Printed on acid-free paper.

4 To Joyce and Shelagh

5 Table of Contents Preface.... Acknowledgements.... CHAPTER 1 Introduction The Need for Energy Efficiency The Perfonnance-Energy Trade-off Book Organization... 4 CHAPTER 2 Energy Efficient Design Processor Usage Model CMOS Circuit Models Energy Use Metrics Energy Efficient Design Observations Dynamic Voltage Scaling CHAPTER 3 Microprocessor System Architecture System Architecture Processor Core Cache System System Coprocessor Summary CHAPTER 4 Circuit Design Methodology General Energy-Efficient Circuit Design.. 79

6 4.2 Memory Design Low-Swing Bus Transceivers Design Constraints Over Voltage Design Constraints for Varying Voltage CHAPTER 5 Energy Driven Design Flow Overview High-level Energy Estimation Clocking Methodology Power Distribution Methodology Functional Verification Timing Verification CHAPTER 6 Microprocessor and Memory IC's MicroprocessorIC Processor Architecture Memory IC CHAPTER 7 DC-DC Voltage Conversion Introduction to Switching Regulators PWM Operation PFM Operation Other Topologies Dynamic Voltage Conversion CHAPTER 8 DC-DC Converter ICfor DVS System and Algorithm Description External Component Selection Frequency Detector Current Comparators Energy Efficient Microprocessor Design

7 8.5 Power FETs Efficiency Simulations Measured Results CHAPTER 9 DVS System Design and Results System Architecture Interface IC Prototype Board Software Infrastructure Evaluation Comparisons and other related work CHAPTER 10 Software and Operating System Support Software Energy Reduction Software Environment lo.3 System Architecture lo.4 Benchmarking lo.5 DVS Operating System lo.6 Voltage Scheduling Algorithms Algorithm Analysis Comments and Possible Further Directions348 CHAPTER 11 Conclusions ILl Energy Efficient Design Current Industry Directions " Future Directions Index

8 Preface This work began in 1995 as an outgrowth of the InfoPad project which showed us that in order to reduce the energy consumption of a portable multimedia terminal that something had to be done about the consumption of the microprocessor subsystem. The design of the InfoPad attempted to reduce the requirements of this general purpose processor by moving the computation into the network or by the use of highly optimized integrated circuits, but in spite of these efforts it still was a major consumer of energy. The reasons for this became apparent as we determined that the energy required to perform a function in dedicated hardware could be several orders of magnitude lower than that consumed in the InfoPad microprocessor. We therefore set out on a full fledged attack on all aspects of the microprocessor energy consumption [1 J. After considerable analysis it became clear that though better circuit design and a streamlined architecture would assist in our goal of energy reduction, that the biggest gains were to be found by operating at reduced voltages. For the busses and VO this could be accomplished without significant degradation of the processor performance, but this was not a straightforward solution when applied to the core of the processor subsystem (CPU and memory). However, since we could see that a processor in an Info Pad like application (an information appliance access device) only required high performance a relatively small percentage of the time, it became clear that by dynamically varying the voltage to only provide high performance when needed would be a critical component of a complete solution. Preface

9 Preface This then necessitated further work to support this new degree of flexibility. An efficient DC-DC converter was required that could dynamically and rapidly change the supply voltage. Also software was needed which could predict the required level of performance to provide the illusion of high performance operation, even though most of the time the processor would be running in a more energy efficient, lower voltage mode. Fortunately, Tony Stratakos {2] was pursuing work on efficient CMOS DC-DC convertors and Trevor Pering {3] had been responsible for the software on the InfoPad terminal, so there was expertise which could directly address the new issues stemming from the dynamic voltage operation. This allowed us to perform a complete system design of the processor starting from the applications through the architecture and fmally to the circuits themselves. We felt that a complete implementation was required to demonstrate the concepts and this book contains the complete design process that was developed as well as the integrated circuits that were implemented. We feel that our approach is further validated by recent commercial processors which are using variable voltage operation in the marketplace. References [IJ T. Burd, Energy Efficient Processor System Design,Ph.D. Thesis, University of California, Berkeley, [2J A. Stratakos, High-Efficiency, Low-Voltage DC-DC Conversion for Portable Applications, Ph.D. Thesis, University of California, Berkeley, [3J T. Pering, Energy-Efficient Operating System Techniques, Ph.D. Thesis, University of California, Berkeley, Energy Efficient Microprocessor Design

10 Acknowledgements The work would have not been successful without the contributions of other researchers at the University of Cali fomi a, Berkeley. Trevor Pering (Chapter 10) and Tony Stratakos (Chapters 7 and 8) were integral to this work, particularly in demonstrating Dynamic Voltage Scaling on a complete, full-custom, embedded processor system. Many others helped in the realization of the prototype system. We would like to thank Peggy Laramie and Vandana Prabhu for their help on timing verification, Omid Rowhani for his help functional verification, Patrick Chiang or his help on behavioral modelling, Chris Chang for his help on the standard cell library and clock driver library development, Kevin Camera for his work in the lab verifying the operation of the voltage converter, Hayden So for designing the Xilinx interface on the prototype board, and Sue Mellers for her help designing the test boards. We would like to thank ARM Ltd. for their support and partnership, and in particular, Simon Segars, for his technical guidance and advice. We would like to thank Professor Jan Rabaey for his advice and support over the years, and Professor Bora Nikolic for reviewing this material. This work was supported in part by the Advanced Research Projects Agency and the members of the Berkeley Wireless Research Center. Acknowledgements

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