Memory Protection. Philip W. L. Fong. CPSC 525/625 (Winter 2018) Department of Computer Science University of Calgary Calgary, Alberta, Canada

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1 1 / 25 Memory Protection Philip W. L. Fong Department of Computer Science University of Calgary Calgary, Alberta, Canada CPSC 525/625 (Winter 2018)

2 2 / 25 Multiprogramming Memory Fence Remember my Apple computer: single user Multiprogrammed OS multiple users sharing resources processes and threads Processes have different resources, implying controlled access Threads share resources with less access control

3 Enter the Notion of Processes 3 / 25 Before: After:

4 Memory Protection 4 / 25 Preventing memory interference

5 Memory Protection 4 / 25 Preventing memory interference Traditionally implemented by hardware

6 5 / 25 Outline Memory Fence 1 Memory Fence 2 3

7 6 / 25 Outline Memory Fence 1 Memory Fence 2 3

8 7 / 25 Fixed Fence Memory Fence Problem: User code may read/write memory belonging to the OS.

9 7 / 25 Fixed Fence Memory Fence Problem: User code may read/write memory belonging to the OS. Solution: OS code resides in address 0 to n User code resides in address n + 1 onward Memory fault if user code attempts to access address within range 0 n.

10 8 / 25 Fence Register Memory Fence Problem: Fixed address layout, inflexible OS size may change over time.

11 8 / 25 Fence Register Memory Fence Problem: Fixed address layout, inflexible OS size may change over time. Solution: Store end of OS code in a fence register Reject instruction during user mode if addressing OS code in fence

12 Base/Bounds Register 9 / 25 Problem: Only protects kernel from users. What about process against process?

13 Base/Bounds Register 9 / 25 Problem: Only protects kernel from users. What about process against process? Solution: Base register: all addresses in a program is offsetted by the base register address + base

14 Base/Bounds Register 9 / 25 Problem: Only protects kernel from users. What about process against process? Solution: Base register: all addresses in a program is offsetted by the base register address + base Bounds register: all offsetted address is then compared to the bounds register, which delimits the upper bound of a legitimate address for the program address + base < bounds

15 Base/Bounds Register 9 / 25 Problem: Only protects kernel from users. What about process against process? Solution: Base register: all addresses in a program is offsetted by the base register address + base Bounds register: all offsetted address is then compared to the bounds register, which delimits the upper bound of a legitimate address for the program address + base < bounds OS changes the contents of base and bounds registers when context-switching to a different process.

16 10 / 25 Code vs Data Memory Fence Problem: Within a process, still possible to overwrite code.

17 10 / 25 Code vs Data Memory Fence Problem: Within a process, still possible to overwrite code. Solution: Separating the data space and code space: Data base Data bounds Program base Program bounds

18 10 / 25 Code vs Data Memory Fence Problem: Within a process, still possible to overwrite code. Solution: Separating the data space and code space: Data base Data bounds Program base Program bounds Each of data and program space can be loaded separately into different parts of the physical memory space.

19 Tagged Architecture 11 / 25 Problem: Protects only contiguous memory blocks. All-or-nothing protection. What if: mutual suspicion among code units within the same process change of accessibility over time (e.g., writable only during program initialization)

20 Tagged Architecture 11 / 25 Problem: Protects only contiguous memory blocks. All-or-nothing protection. What if: mutual suspicion among code units within the same process change of accessibility over time (e.g., writable only during program initialization) Solution: Tagged Architecture Protecting each memory word separately Each memory word is associated with a tag (a few bits) specifying accessibility (e.g., read-only, read/write, execute-only)

21 Example: Burroughs B / 25 3 tag bits to differentiate data words pointers control words (i.e., stack pointers, etc)

22 13 / 25 Example: BiiN Memory Fence one tag for a block of size 128 or 256 bytes less costly

23 14 / 25 Not Popular Memory Fence While the tagged architecture is very attractive by design, stock OSes (e.g., Windows, MacOS) are designed for conventional architecture (e.g., Intel).

24 15 / 25 Outline Memory Fence 1 Memory Fence 2 3

25 16 / 25 Segmentation Memory Fence Divide a program into many small pieces (segment) a segment may correspond to a procedure or an array Address: segment, offset OS maintains a table (per process) mapping segment id to physical address Need mechanisms to check for access beyond end of a segment

26 General Advantages of Segmentation 17 / 25 1 Segments can be dynamically relocated at run time 2 Segments can be swapped out of physical memory into secondary storage 3 Every memory reference is mediated by the operating system, providing opportunities for protection

27 Security Advantages of Segmentation 18 / 25 Different levels of accessibility for different segments Different users can share a segment, with different access rights Physical addresses cannot be forged

28 19 / 25 Paging Memory Fence Divide program into equal-sized pages

29 19 / 25 Paging Memory Fence Divide program into equal-sized pages Divide physical memory space into equal-sized page frames

30 19 / 25 Paging Memory Fence Divide program into equal-sized pages Divide physical memory space into equal-sized page frames Address: page, offset

31 19 / 25 Paging Memory Fence Divide program into equal-sized pages Divide physical memory space into equal-sized page frames Address: page, offset OS maintains a table (per process) mapping page numbers to frame numbers

32 19 / 25 Paging Memory Fence Divide program into equal-sized pages Divide physical memory space into equal-sized page frames Address: page, offset OS maintains a table (per process) mapping page numbers to frame numbers Since all frames have same size, checking upper bound of offset is straightforward.

33 19 / 25 Paging Memory Fence Divide program into equal-sized pages Divide physical memory space into equal-sized page frames Address: page, offset OS maintains a table (per process) mapping page numbers to frame numbers Since all frames have same size, checking upper bound of offset is straightforward. Coarser grained than segmentation: same accessiblity level within a page

34 Paging + Segmentation 20 / 25 Paging: implementation efficiency Segmentation: logical protection IBM 390 mainframe: paged segmentation

35 21 / 25 Outline Memory Fence 1 Memory Fence 2 3

36 Memory Protection: Hardware Only? 22 / 25 Memory protection can be achieved by software technology.

37 Memory Protection: Hardware Only? 22 / 25 Memory protection can be achieved by software technology. Example: Omniware OmniVM bytecode: RISC architecture Segments Software-based Fault Isolation (SFI) is employed to rewrite unsafe code into safe code, using one of two techniques: Segment matching: guard code is injected before the instruction to check that the referenced segment id matches the allowed segment Sandboxing: the segment id of the target address is dynamically overwritten by the allowed segment id

38 Memory Protection: Hardware Only? 22 / 25 Memory protection can be achieved by software technology. Example: Omniware OmniVM bytecode: RISC architecture Segments Software-based Fault Isolation (SFI) is employed to rewrite unsafe code into safe code, using one of two techniques: Segment matching: guard code is injected before the instruction to check that the referenced segment id matches the allowed segment Sandboxing: the segment id of the target address is dynamically overwritten by the allowed segment id Software-based protection is potentially finer grained: beyond segments

39 Discussion: Protection within a Process 23 / 25 Other than anticipating programming errors, what are security considerations that motivate memory protection (or in general, mutual suspicion) among code units within a process?

40 Discussion: Protection within a Process 23 / 25 Other than anticipating programming errors, what are security considerations that motivate memory protection (or in general, mutual suspicion) among code units within a process? Extensible systems Browser plug-ins (via dynamic loading/linking)

41 Discussion: Protection within a Process 23 / 25 Other than anticipating programming errors, what are security considerations that motivate memory protection (or in general, mutual suspicion) among code units within a process? Extensible systems Browser plug-ins (via dynamic loading/linking) Systems with scripting capabilities Visual Basic in Excel

42 Discussion: Protection within a Process 23 / 25 Other than anticipating programming errors, what are security considerations that motivate memory protection (or in general, mutual suspicion) among code units within a process? Extensible systems Browser plug-ins (via dynamic loading/linking) Systems with scripting capabilities Visual Basic in Excel Mobile code Java applets

43 Discussion: Protection within a Process 23 / 25 Other than anticipating programming errors, what are security considerations that motivate memory protection (or in general, mutual suspicion) among code units within a process? Extensible systems Browser plug-ins (via dynamic loading/linking) Systems with scripting capabilities Visual Basic in Excel Mobile code Java applets Systems that interpret code Database query evaluation (code injection)

44 A Change of World View 24 / 25 The traditional world view: Processes as units of protection.

45 A Change of World View 24 / 25 The traditional world view: Processes as units of protection. With the emergence of dynamic loaded code, scripting, mobile code, and multi-language development, the traditional world view simply is no longer valid.

46 A Change of World View 24 / 25 The traditional world view: Processes as units of protection. With the emergence of dynamic loaded code, scripting, mobile code, and multi-language development, the traditional world view simply is no longer valid. As we shall see, intra-process memory protection is typically achieved by software means.

47 Bibliographic Notes 25 / 25 Most of the materials in these slides are based on Section 5.1 of [Pfleeger et al.]. OmniWare and SFI: Ali-Reza Adl-Tabatabai, Geoff Langdale, Steven Lucco, and Robert Wahbe. Efficient and language-independent mobile programs. In Proceedings of ACM SIGPLAN 96 Conference on Programming Language Design and Implementation (PLDI 96), pages , May Robert Wahbe, Steven Lucco, Thomas E. Anderson, and Susan L. Graham. Efficient software-based fault isolation. In Proceedings of the 14th ACM Symposium on Operating Systems Principles, pages , Asheville, North Carolina, December 1993.

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