Release Notes for ADSP-CM41x EZ-KIT Board Support Package 1.3.0

Transcription

1 Release Notes for ADSP-C1x EZ-KIT Board Support Package Analog Devices, Inc.

2 Contents 1 Release Dependencies 4 2 New features and examples in version Examples / Services Added 5 3 PLL Clock Configuration 6 4 VMU Calibration Fix 7 5 Changes in version Release Notes for ADSP-C1x EZ-KIT Board Support Package Release Dependencies New features and examples in version Examples / Drivers Added Examples / Services Added PLL Clock Configuration Changes in version Known issues in version ADUCS06-237: No utility to convert M0 exe into data 11 7 Release Notes for ADSP-C1x EZ-KIT Board Support Package Release Dependencies New features and examples in version Examples for Drivers Examples for Services PLL Clock Configuration Changes in version Known issues in version ADUCS06-237: No utility to convert M0 exe into data ADUCS06-433: JLinkScripts interfering with NoFlash projects 14 8 Release Notes for ADSP-C1x EZ-KIT Board Support Package Release Dependencies Release Testing License Checking Release Content Source files for drivers and services Toolchain Support Files IAR Tool Chain Configuration files Additional Utilities Documentation Examples Power_On_Self_Test Examples for Drivers Examples for Services Location 21

3 8.11 Contacting Technical Support Known issues with the ADSP-C1x EZ-Kit Lite Board Support Package ADUCS06-437: Inconsistent IAR revision used for projects ADUCS06-237: No utility to convert M0 exe into data ADUCS06-433: JLinkScripts interfering with NoFlash projects ADUCS06-438: Flash loader sources not included in BSP 23

4 1 Release Dependencies Requires IAR embedded workbench version Requires Segger J-Link USB drivers version 6.14c. Release Notes for ADSP-C1x EZ-KIT Board Support Package

5 2 New features and examples in version Examples / Services Added 1 Floating Point Saturation Unit (FSAT) Cortex- Demonstrates the FSAT module. Release Notes for ADSP-C1x EZ-KIT Board Support Package

6 3 PLL Clock Configuration The PLLMAX is 600 MHz (Anomaly ) The PLLMIN is 250 MHz CCLK (MHz) SYSCLK (MHz) As per Silicon Anomaly , the PLLMAX is capped at 600MHz. The valid clock pairs that an application can request through "adi_pwr_setfreq()" API for CLKIN of 30 MHz are listed above. Release Notes for ADSP-C1x EZ-KIT Board Support Package

7 4 VMU Calibration Fix The VMU calibration fix is implemented on chip on Rev 1.0. The software fix is no longer needed for Rev 1.0. In Rev 0.0, ADI_WA_17_00_0041 macro must be added to the compiler preprocessor defines to enable the software workaround. This macro is no longer needed in Rev 1.0 as the VMU calibration fix is implemented on chip. Release Notes for ADSP-C1x EZ-KIT Board Support Package

8 5 Changes in version Fixed ADUCS : No utlity to convert M0 exe to data. The utility is now available at /crosscore-utilities.html#dsp-relatedsoftware Release Notes for ADSP-C1x EZ-KIT Board Support Package

9 6 Release Notes for ADSP-C1x EZ-KIT Board Support Package Release Dependencies Requires IAR embedded workbench version or later. Requires Segger J-Link USB drivers version 5.10p or later. 6.2 New features and examples in version Examples / Drivers Added 1 DBC Cortex- Demonstrates the use of PWM debounce module for glitch filtering applied to the PWM trip inputs. 2 Rotary Counter Cortex- Demonstrates the Rotary Counter module. 3 CRC Cortex- M0 4 DACC Cortex- M0 5 TTU Cortex- M0 6 TWI Cortex- M0 7 OCU Cortex- M0 Cortex- Demonstrates CRC module Demonstrates DACC module. Demonstrates TTU module. Demonstrates TWI module. Driver added for OCU Release Notes for ADSP-C1x EZ-KIT Board Support Package

10 6.2.2 Examples / Services Added 1 WatchDog Timer Cortex-M0 Cortex- Demonstrates the WatchDog Timer module. 2 Capture Timer Cortex- Demonstrates the Capture Timer module. 3 ROM API's Cortex- Demonstrates the usage of ROM API's. 6.3 PLL Clock Configuration The PLLMAX is 600 MHz (Anomaly ) The PLLMIN is 250 MHz CCLK (MHz) SYSCLK (MHz) As per Silicon Anomaly , the PLLMAX is capped at 600MHz. The valid clock pairs that an application can request through "adi_pwr_setfreq()" API for CLKIN of 30 MHz are listed above. 6.4 Changes in version Fixed ADUCS : Fail to run ProgramInfoSpace in Release kit SINC Project:The SINC self test mode API is supported in the driver.the application is provided in the BSP which exercises this mode. Get_Unique_ID Example : An exampleis provided in the BSP which can be used to get the Unique Identification Number of the chipfrom which can be used by the application as per its requirements. Note that this is unique to the chip and varies from chip to chip adi_rom_getid ROM API : The adi_rom_getid ROM API can be used to get the Manufacture ID of the product i.e 0x65 which can be used by the application as per its requirements. Release Notes for ADSP-C1x EZ-KIT Board Support Package

11 Version Numbering during BSP Installation : The BSP installs to ADSP-C1x-Rel1.2.0 which can enable installation of diferrent version of BSP side-by-side. For more information, See ADSP- C1x_EZ-Kit_Lite_BSP_UsersGuide. 6.5 Known issues in version ADUCS06-237: No utility to convert M0 exe into data The recommended approach for multicore applications is that the Cortex-M0 application image is loaded into the shared SRAM space at runtime, by the Cortex- application. The gpio/led-- M0 multi-core example demonstrates this. However, in order to do this, it is necessary to convert the Cortex-M0 executable into loadable data. This BSP does not contain any utility to perform this operation. Please contact ADI at processor.tools.support@analog.com for details on how to do this conversion. For more information on the status of the utility, Please refer to html under Products as ADSP-C1x Software. Release Notes for ADSP-C1x EZ-KIT Board Support Package

12 7 Release Notes for ADSP-C1x EZ-KIT Board Support Package Release Dependencies Requires IAR embedded workbench version or later. Requires Segger J-Link USB drivers version 5.10p or later. 7.2 New features and examples in version Examples for Drivers 1 PWM Cortex- 2 HAE Cortex- M0 Cortex- 3 MATH Cortex- 4 SINC Cortex- 5 FOCP Cortex- 6 FFTB Cortex- Demonstrates PWM module. Demonstates the HAE module with examples for callback, DMA mode and parity. Additional example demonstrating performance benchmark of MATH acceleration unit. Demonstrates the SINC module. Demonstrates FOCP module Demonstrates FFTB module. Release Notes for ADSP-C1x EZ-KIT Board Support Package

13 7.2.2 Examples for Services 1 SPU Cortex-M0 Cortex- Demonstrates the SPU module. 7.3 PLL Clock Configuration The PLLMAX is 600 MHz (Anomaly ) The PLLMIN is 250 MHz As per Silicon Anomaly , the PLLMAX is capped at 600MHz. The valid clock pairs that an application can request through "adi_pwr_setfreq()" API for CLKIN of 30 MHz are listed below. CCLK (MHz) SYSCLK (MHz) Changes in version Fixed ADUCS06-437: Inconsistent IAR revision used for projects Fixed ADUCS06-438: Flash loader sources not included in BSP 7.5 Known issues in version ADUCS06-237: No utility to convert M0 exe into data The recommended approach for multicore applications is that the Cortex-M0 application image is loaded into the shared SRAM space at runtime, by the Cortex- application. The gpio/led-- M0 multi-core example demonstrates this. However, in order to do this, it is necessary to convert the Cortex-M0 executable into loadable data. This BSP does not contain any utility to perform this operation. Please contact ADI at processor.tools.support@analog.com for details on how to do this conversion. Release Notes for ADSP-C1x EZ-KIT Board Support Package

14 7.5.2 ADUCS06-433: JLinkScripts interfering with NoFlash projects Applications mapped into SRAM rather than on-chip flash, such as the SysTick/-NoFlash example, do not download successfully when using the default JLinkScripts. The symptoms are that SRAM is blank after "download", and the fault LED light is illuminated. This problem can be worked around by editing the *.i79 file and commenting out the JLinkScript line. For Cortex- projects, this would mean editing arm/config/devices/analogdevices/c1x_.i79 in the IAR installation, and commenting out this line: JLinkScriptFile=$TOOLKIT_DIR$\config\debugger\AnalogDevices\C1x_.JLinkScript SINC Project: The SINC self test mode API is supported in the driver, however, the application is yet to be developed to exercise this mode. The Self test mode also needs that the SPORT driver is used to configure the SPORT. Release Notes for ADSP-C1x EZ-KIT Board Support Package

15 8 Release Notes for ADSP-C1x EZ-KIT Board Support Package Thank you for installing the ADSP-C1x EZ-Kit Lite Board Support Package (BSP). The BSP provides software and documentation in support of the ADSP-C1x EZ-Kit Lite. The Board Support Package is designed to work with IAR embedded workbench software development tools. For more details on IAR, please visit The ADSP-C1x EZ-Kit Lite BSP provides comprehensive software support for the ADSP- C1x EZ-Kit Lite which includes drivers and services. The BSP also provides comprehensive examples which demonstrate the on-chip drivers and services. The documentation for the device drivers and services is included in the BSP. 8.1 Release Dependencies Requires IAR embedded workbench version 7.40 or later. Requires Segger J-Link USB drivers version 5.0j or later. 8.2 Release Testing The BSP has been tested with the ADSP-C19F EZ-KIT Lite BOM License Checking The BSP software does not perform any license checking. Use of the BSP software is subject to the Software License Agreement presented during installation. 8.4 Release Content This release contains the following sets of components: Source files for device drivers and services. These components are authored by Analog Devices, for use on the ADSP-C1x processor. Examples for device drivers and services. These components are authored by Analog Devices, and demonstrate the use of the device drivers and services. Release Notes for ADSP-C1x EZ-KIT Board Support Package

16 Toolchain support. These components are authored by Analog Devices, and are installed into the toolchain to configure it to recognize the ADSP-C1x processor family. Additional utilities. These components are authored by Analog Devices, and assist in the generation of applications for the ADSP-C1x processor family. Documentation 8.5 Source files for drivers and services The majority of source files and include files are generic, and apply to both the Cortex- core and the Cortex-M0 core. There are some core-specific files. src /drivers inc /drivers src /services inc /services src/m0 src/ inc/m0 inc/ osal /noos osal /ucos-iii Source files and include files for drivers Source files and include files for services. System and startup files for the Cortex-M0 core. System and startup files for the Cortex- core. System, startup, device and typedef include files for the Cortex-M0 core. System, startup, device and typedef include files for the Cortex- core. Operating System Abstraction Layer source files and include files for the no-os and Micrium uc/os-iii environments. Release Notes for ADSP-C1x EZ-KIT Board Support Package

17 8.6 Toolchain Support Files The following common system infrastructure framework files are installed in the toolchain and should be used in all projects IAR Tool Chain Configuration files C1x_M0.ddf C1x_.ddf C1x_M0.i79 C1x_.i79 C1x_M0.JLinkScript C1x_.JLinkScript FlashC1x.* Debugger register display Device Database J-Link LITE configuration Flash loader file 8.7 Additional Utilities This utility is installed into the tools subdirectory PinMuxUI Graphical pin mux configuration and code generation utility Release Notes for ADSP-C1x EZ-KIT Board Support Package

18 8.8 Documentation ADSP- C1x_Software_for_IAR_ReleaseNotes. pdf C1x Click Thru SLA.pdf ADSP-C1x_EZ- Kit_Lite_BSP_UsersGuide.pdf C1x_Device_Drivers_User_Guide.pdf adsp-cm41x-ezkit-manual.pdf adsp-cm41x-ezkit-schematic.pdf adsp-cm41x-ezkit-bom.pdf html/index.html Release Notes (this file) Software License Agreement How to use the BSP with the IAR Embedded Workbench IDE. Describes general principles behind the operation and usage of the Device Drivers and System Services Manual for the ADSP-C19F EZ-KIT evaluation board Schematics for the ADSP-C19F EZ-KIT evaluation board Bill of materials for the ADSP-C19F EZ- KIT evaluation board Reference material for the Device Drivers and System Services APIs for each peripheral 8.9 Examples ADSP-C1x processors are dual-core processors, with both a Cortex- core and a Cortex-M0 core. The majority of examples are single-core examples, configured to be built for one core or the other; several of the examples are supplied in two configurations, one for each core. The mbox examples are dual-core examples: there is a project for each core, and the complete example consists of both projects, running simultaneously on different cores of the same processor. Release Notes for ADSP-C1x EZ-KIT Board Support Package

19 8.9.1 Power_On_Self_Test This example allows you to test the many peripherals of the ADSP-C1x EZ-Kit Lite. This example is also pre-programmed into the on-board flash memory. By following the instruction in the Readme_post.html file, you can also program this example into the EZ-Kit flash. This POST was designed so that you can use the ADSP-C1x push buttons to select a specific test to run. The POST example is located in the examples directory: ADSP-C1x-EZ-KIT\Examples\Power_On_Self_Test\ Release Notes for ADSP-C1x EZ-KIT Board Support Package

20 8.9.2 Examples for Drivers 1 ADCC Cortex- M0 Cortex- 2 CRC Cortex- 3 DACC Cortex- 4 LCD Cortex- 5 Math Unit Cortex- 6 ProgramInfoSpace Cortex- 7 SPI Cortex- 8 SPORT Cortex- 9 TRU Cortex- M0 Cortex- 10 TTU Cortex- 11 UART Cortex- M0 Demonstrates ADC Controller, in linear and circular modes Uses on-chip CRC controller Demonstrates DAC Controller with on-chip DAC, in linear and circular modes Demonstrates the LCD display, for graphics and text Demonstrates math acceleration. Demonstrates updating the Info Space area of onchip flash Demonstrates data loop-back Demonstrates SPORT loop-back Demonstrates triggers Demonstrates trigger timing Demonstrates loop-back of data between Tx and Rx Release Notes for ADSP-C1x EZ-KIT Board Support Package

21 Cortex Examples for Services 1 GPIO Cortex-M0 Cortex- 2 MBOX Cortex-M0 Cortex- Demonstrates General-purpose I/O Demonstrates Multi-core applications Demonstrates the mailbox between the two cores. 3 MDMA Cortex- Demonstrates the memory-to-memory DMA service 4 SMPU Cortex-M0 Cortex- 5 SysTick Cortex-M0 Cortex- 6 Timer Cortex-M0 Cortex- Demonstrates System Memory Protection Unit Demonstrates the System Tick Demonstrates the timer service 8.10 Location By default, the BSP software will be installed at the following location: C:\Analog Devices\ADSP-C1x\ADSP-C1x_EZ_Kit_Lite 8.11 Contacting Technical Support Submit your questions online at: your Processors and DSP applications and processor questions to: processor.support@analog.com OR processor.china@analog.com (Greater China support) For IAR tool chain support please visit Release Notes for ADSP-C1x EZ-KIT Board Support Package

22 Known issues with the ADSP-C1x EZ-Kit Lite Board Support Package ADUCS06-437: Inconsistent IAR revision used for projects The majority of example projects in the BSP were saved with version of the IAR EWARM product. The following example projects were saved with version , and so require at least that version to open them. gpio/led--m0/m0 gpio/led--m0/ lcd/adafruit1480/lcd_graphics lcd/adafruit1480/lcd_text ProgramInfoSpace//reportiar ProgramInfoSpace//trimiar ProgramInfoSpace//unlockiar SysTick/ ADUCS06-237: No utility to convert M0 exe into data The recommended approach for multicore applications is that the Cortex-M0 application image is loaded into the shared SRAM space at runtime, by the Cortex- application. The gpio/led-- M0 multi-core example demonstrates this. However, in order to do this, it is necessary to convert the Cortex-M0 executable into loadable data. This BSP does not contain any utility to perform this operation. Please contact ADI at for details on how to do this conversion ADUCS06-433: JLinkScripts interfering with NoFlash projects Applications mapped into SRAM rather than on-chip flash, such as the SysTick/-NoFlash example, do not download successfully when using the default JLinkScripts. The symptoms are that SRAM is blank after "download", and the fault LED light is illuminated. This problem can be worked around by editing the *.i79 file and commenting out the JLinkScript line. For Cortex- projects, this would mean editing arm/config/devices/analogdevices/c1x_.i79 in the IAR installation, and commenting out this line: JLinkScriptFile=$TOOLKIT_DIR$\config\debugger\AnalogDevices\C1x_.JLinkScript Release Notes for ADSP-C1x EZ-KIT Board Support Package

23 ADUCS06-438: Flash loader sources not included in BSP The BSP includes a flash loader executable for programming the flash when downloading applications in the IDE. The sources for this flash loader should be included in the BSP so that it may be rebuilt, but they are missing. Release Notes for ADSP-C1x EZ-KIT Board Support Package