Scaling Hardware Accelerated Network Monitoring to Concurrent and Dynamic Queries with *Flow

Size: px
Start display at page:

Download "Scaling Hardware Accelerated Network Monitoring to Concurrent and Dynamic Queries with *Flow"

Transcription

1 Scaling Hardware Accelerated Network Monitoring to Concurrent and Dynamic Queries with *Flow John Sonchack, Oliver Michel, Adam J. Aviv, Eric Keller, Jonathan M. Smith

2 Measuring High Speed Networks 00 Gb/s Links > Tb/s Switches

3 Measuring High Speed Networks Debugging Who is causing microbursts? Queue Lengths Drop Counts 00 Gb/s Links > Tb/s Switches 3

4 Measuring High Speed Networks Debugging Who is causing microbursts? Queue Lengths Drop Counts 00 Gb/s Links > Tb/s Switches Traffic Engineering Which flows are colliding? Utilization 4

5 Measuring High Speed Networks Debugging Who is causing microbursts? Queue Lengths Drop Counts 00 Gb/s Links > Tb/s Switches Traffic Engineering Which flows are colliding? Utilization Security Are any hosts compromised? Packet timing statistics 5

6 Measurement Challenges Concurrent Applications High Packet Rates Debugging Who is causing microbursts? Queue Lengths Drop Counts Traffic Engineering Which flows are colliding? Utilization 3.$Tb/s >$00$M$ packets/s >$0$M$ flows/s Security Are any hosts compromised? Packet timing statistics 6

7 Prior Measurement Systems Custom Hardware (e.g., NetFlow) Processing Cluster 7

8 Prior Measurement Systems Custom Hardware (e.g., NetFlow) Processing Cluster Flexibility Applications can t define custom statistics Efficiency Measurement Tput: < M packets / second per core Network Tput: > 00 M packets / second per switch 8

9 Prior Measurement Systems Custom Hardware (e.g., NetFlow) Flexibility Processing Cluster Efficiency Reconfigurable Switch ASICs [Marple SIGCOMM 7, TurboFlow EuroSys 8, Sonata SIGCOMM 8] SELECT packet.length GROUP BY tcp flow AGGREGATE average 9

10 Prior Measurement Systems Custom Hardware (e.g., NetFlow) Flexibility Processing Cluster Efficiency Reconfigurable Switch ASICs [Marple SIGCOMM 7, TurboFlow EuroSys 8, Sonata SIGCOMM 8] Concurrency SELECT packet.length GROUP BY tcp flow AGGREGATE average 0

11 Concurrency Challenges with Reconfigurable ASICs Max Queue Length Total Drop Count Firewall L Forwarding Max Queue Len Drop Ct.

12 Concurrency Challenges with Reconfigurable ASICs Max Queue Length Total Drop Count Std Dev. Packet Size Avg. Flow Duration Avg. Utilization Jitter Avg. Utilization Std Dev Pkt Size Avg. Jitter Firewall L Forwarding Avg. Dur. Max Queue Len Drop Ct.

13 Concurrency Challenges with Reconfigurable ASICs Not Enough room in the datapath for all the queries. Max Queue Length Total Drop Count Std Dev. Packet Size Avg. Flow Duration Avg. Utilization Jitter Avg. Utilization Std Dev Pkt Size Avg. Jitter Firewall L Forwarding Avg. Dur. Max Queue Len Drop Ct. 3

14 Concurrency Challenges with Reconfigurable ASICs Avg. Jitter Firewall L Forwarding Avg. Dur. Max Queue Len Drop Ct. 4

15 Concurrency Challenges with Throughput (Gb/s) Reconfigurable ASICs Recompile P4 ASIC at 9 seconds Recompiling the datapath disrupts measurement and forwarding. Avg. Jitter Timestamp (Seconds) Firewall Max Queue Len L Forwarding Avg. Dur. Drop Ct. 5

16 *Flow: Efficiency and Concurrency? Question: can we leverage reconfigurable ASICs for concurrent monitoring? 6

17 *Flow: Efficiency and Concurrency? Question: can we leverage reconfigurable ASICs for concurrent monitoring? Insight: concurrency challenges are caused by trying to do too much in the ASIC. 7

18 The Main Idea 8

19 The Main Idea Preprocessing Calculation SELECT packet.length GROUP BY tcp flow AGGREGATE max Average Utilization Calculation Preprocessing Jitter Calculation Preprocessing Max Packet Length Calculation Preprocessing 9

20 The Main Idea Average Utilization Calculation Jitter Calculation Max Packet Length Calculation Preprocessing Preprocessing Preprocessing 0

21 The Main Idea Average Utilization Calculation Jitter Calculation Max Packet Length Calculation Common Preprocessing

22 The Main Idea Average Utilization Calculation Max Packet Length Calculation Concurrency Jitter Calculation Common Preprocessing

23 The Main Idea Average Utilization Calculation Max Packet Length Calculation Concurrency Jitter Calculation? Efficiency Common Preprocessing 3

24 The Main Idea Average Utilization Calculation Max Packet Length Calculation Concurrency Jitter Calculation? Efficiency Common Preprocessing 4

25 The Main Idea Concurrency? Average Utilization Calculation Max Packet Length Calculation Jitter Calculation Common Preprocessing Efficiency 5

26 The Main Idea Average Utilization Calculation Max Packet Length Calculation Concurrency Jitter Calculation Measure every packet in > Tb/s traffic with server. Efficiency Common Preprocessing 6

27 The Main Idea Application specific calculation Concurrency *Flow Agent Preprocessing Efficiency *Flow Cache 7

28 Outline Motivation Design Implementation Evaluation 8

29 *Flow Design SELECT ip length GROUP BY tcp flow AGGREGATE sum. Decoupling calculation. Generalize selection & grouping Common Preprocessing App. Specific Calculation 9

30 Decoupling Calculation SELECT ip length GROUP BY tcp flow AGGREGATE sum Key: A -> B Length: 00 Flow Key A -> B C -> D E -> F Length Sum Preprocessing App. Specific Calculation 30

31 Decoupling Calculation SELECT ip length GROUP BY tcp flow AGGREGATE sum Grouped Packet Vector (GPV):!!!!!!!!!!!!!! " { flowkey : packetlength } Flow Key Pkt Len Length Sum Key: A -> B Length: 00 A -> B C -> D E -> F Preprocessing App. Specific Calculation 3

32 Generalizing Selection and Grouping SELECT ip length GROUP BY host AGGREGATE average SELECT timestamp GROUP BY tcp flow AGGREGATE variance Common Preprocessing Grouped Packet Vectors (GPVs) 3

33 Generalizing Selection and Grouping SELECT ip length GROUP BY host AGGREGATE average SELECT timestamp GROUP BY tcp flow AGGREGATE variance!!!!!!!!!!!!!!! "!!!!!!!!!!!!!!!!!!! "!" flowkey :( packetlengths, packettimestamps,... ) > Common Preprocessing Grouped Packet Vectors (GPVs) 33

34 Generalizing Selection and Grouping SELECT ip length GROUP BY host AGGREGATE average SELECT timestamp GROUP BY tcp flow AGGREGATE variance Regroup to any sub-key for KV op. and copy per GPV. export key = <src IP, dst IP, src port, dst port, protocol, link ID> Grouped Packet Vectors (GPVs) Common Preprocessing 34

35 *Flow Architecture Regrouping and statistics calculation. Monitoring Applications Packet feature selection and initial grouping. *Flow Cache Thin interface to grouped packet vectors. Grouped Packet Vectors *Flow Agent 35

36 Outline Introduction Design Implementation Evaluation 36

37 *Flow Implementation Proof-of-concept implementation. Monitoring Applications P4 implementation for 3. Tb/s Barefoot Tofino. *Flow Cache Grouped Packet Vectors *Flow Agent 37

38 Background: Stateful Match Action ASICs Restrictive computational model Match Action Stateful Variables Line rate processing ( packet per cycle) Packet Headers + metadata 38

39 *Flow as a Stateful Match Action Pipeline Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: d Size: 4 Packet Headers + metadata H A S H 3 a b c

40 *Flow as a Stateful Match Action Pipeline Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: d Size: 4 Packet Headers + metadata H A S H 3 a b c

41 *Flow as a Stateful Match Action Pipeline Untracked Flow: Replace and copy to software Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: d Size: 4 Packet Headers + metadata H A S H 3 a b c

42 *Flow as a Stateful Match Action Pipeline Untracked Flow: Replace and copy to software Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: a Tuples: [0, 400] Key: d Size: 4 Packet Headers + metadata H A S H 3 d b c

43 *Flow as a Stateful Match Action Pipeline Untracked Flow: Replace and copy to software Tracked Flow: Append tuple Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: b Size: 8 Packet Headers + metadata H A S H 3 d b c

44 *Flow as a Stateful Match Action Pipeline Untracked Flow: Replace and copy to software Tracked Flow: Append tuple Tracked Flow, Buffer Full: rollover buffer Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: c Size: 0 Packet Headers + metadata H A S H 3 d b c

45 *Flow as a Stateful Match Action Pipeline Untracked Flow: Replace and copy to software Tracked Flow: Append tuple Tracked Flow, Buffer Full: rollover buffer Slot ID Key Slot ID Packet Count Slot ID Packet Features Buffer Key: a Tuples: [9, 500, Key: c Size: 0 Packet Headers + metadata H A S H 3 d b c

46 *Flow as a Stateful Match Action Pipeline Untracked Flow: Replace and copy to software Tracked Flow: Append features Tracked Flow, Buffer Full: rollover buffer Key: a Tuples: [0, 400] Packet Headers + metadata H A S H Slot ID 3 Key a d b c Slot ID 3 Packet Count Slot ID 3 Packet Features Buffer Key: c Tuples: [9, 500, 46

47 Outline Motivation Design Implementation Evaluation 47

48 Evaluation: Concurrency and Efficiency 48

49 Evaluation: Concurrency and Efficiency *Flow Cache Stages ALUs Query Stages ALUs Connection Count Avg. Latency Flowlet Sizes Packet Counts TCP Non-Monotonic TCP Out of Sequence GPV *Flow Cache Vs statistics Compiled Queries [Marple SIGCOMM 7] 49

50 Evaluation: Concurrency and Efficiency The *Flow Cache can service any query but only requires as many hardware resources as ~ compiled query. *Flow Cache Stages ALUs 33 Query Stages ALUs Connection Count 4 0 Avg. Latency 6 Flowlet Sizes 3 Packet Counts 5 7 TCP Non-Monotonic 5 6 TCP Out of Sequence 7 4 GPV *Flow Cache Vs statistics Compiled Queries [Marple SIGCOMM 7] 50

51 Evaluation: Concurrency and Efficiency Throughput (M GPVs/s) Host Profiler Flow Classifier Congestion Debugger Classifies TCP flows based on features. Generates per-host timestamp vectors. Identifies end hosts with packets in queue during microburst. 00 X average GPV rate of 0 GbE Internet link [3] # CPU Cores 5 [3]: CAIDA 05 and 06 trace stats

52 Evaluation: Concurrency and Efficiency Throughput (M GPVs/s) Host Profiler Flow Classifier Congestion Debugger Classifies TCP flows based on features. Generates per-host timing profiles. One GPV processing server can measure One GPV processing terabit rate traffic. server can measure terabit rate traffic. Identifies end hosts with packets in queue during microburst. 00 X average GPV rate of 0 GbE Internet link [3] # CPU Cores 5 [3]: CAIDA 05 and 06 trace stats

53 Outline Motivation Design Implementation Evaluation 53

54 In The Paper On Github Match+Action Layout ASIC Resource Requirements and More Evaluation 3. Tb/s *Flow Cache Prototype for Barefoot Tofino Background 54

55 Conclusion (and Thank You for Listening!) What are the right measurement subtasks to do in hardware? *Flow Applications Statistics Calculation Concurrency Efficiency *Flow Cache Selection and Grouping 55

TurboFlow: Information Rich Flow Record Generation on Commodity Switches

TurboFlow: Information Rich Flow Record Generation on Commodity Switches Turbo: Information Rich Record Generation on Commodity Switches John Sonchack 1, Adam J. Aviv 2, Eric Keller 3, Jonathan M. Smith 1 1 University of Pennsylvania, 2 USNA, 3 University of Colorado Introduction:

More information

Packet-Level Network Analytics without Compromises NANOG 73, June 26th 2018, Denver, CO. Oliver Michel

Packet-Level Network Analytics without Compromises NANOG 73, June 26th 2018, Denver, CO. Oliver Michel Packet-Level Network Analytics without Compromises NANOG 73, June 26th 2018, Denver, CO Oliver Michel Network monitoring is important Security issues Performance issues Equipment failure Analytics Platform

More information

Feature Rich Flow Monitoring with P4

Feature Rich Flow Monitoring with P4 Feature Rich Flow Monitoring with P4 John Sonchack University of Pennsylvania 1 Outline Introduction: Flow Records Design and Implementation: P4 Accelerated Flow Record Generation Benchmarks and Optimizations

More information

Language-Directed Hardware Design for Network Performance Monitoring

Language-Directed Hardware Design for Network Performance Monitoring Language-Directed Hardware Design for Network Performance Monitoring Srinivas Narayana, Anirudh Sivaraman, Vikram Nathan, Prateesh Goyal, Venkat Arun, Mohammad Alizadeh, Vimal Jeyakumar, and Changhoon

More information

Language-Directed Hardware Design for Network Performance Monitoring

Language-Directed Hardware Design for Network Performance Monitoring Language-Directed Hardware Design for Network Performance Monitoring Srinivas Narayana, Anirudh Sivaraman, Vikram Nathan, Prateesh Goyal, Venkat Arun, Mohammad Alizadeh, Vimal Jeyakumar, and Changhoon

More information

Programmable Data Plane at Terabit Speeds

Programmable Data Plane at Terabit Speeds AUGUST 2018 Programmable Data Plane at Terabit Speeds Milad Sharif SOFTWARE ENGINEER PISA: Protocol Independent Switch Architecture PISA Block Diagram Match+Action Stage Memory ALU Programmable Parser

More information

SmartNIC Programming Models

SmartNIC Programming Models SmartNIC Programming Models Johann Tönsing 206--09 206 Open-NFP Agenda SmartNIC hardware Pre-programmed vs. custom (C and/or P4) firmware Programming models / offload models Switching on NIC, with SR-IOV

More information

FastReact. In-Network Control and Caching for Industrial Control Networks using Programmable Data Planes

FastReact. In-Network Control and Caching for Industrial Control Networks using Programmable Data Planes FastReact In-Network Control and Caching for Industrial Control Networks using Programmable Data Planes Authors: Jonathan Vestin Andreas Kassler Johan

More information

Design principles in parser design

Design principles in parser design Design principles in parser design Glen Gibb Dept. of Electrical Engineering Advisor: Prof. Nick McKeown Header parsing? 2 Header parsing? Identify headers & extract fields A???? B???? C?? Field Field

More information

Router Architectures

Router Architectures Router Architectures Venkat Padmanabhan Microsoft Research 13 April 2001 Venkat Padmanabhan 1 Outline Router architecture overview 50 Gbps multi-gigabit router (Partridge et al.) Technology trends Venkat

More information

SmartNIC Programming Models

SmartNIC Programming Models SmartNIC Programming Models Johann Tönsing 207-06-07 207 Open-NFP Agenda SmartNIC hardware Pre-programmed vs. custom (C and/or P4) firmware Programming models / offload models Switching on NIC, with SR-IOV

More information

Building Efficient and Reliable Software-Defined Networks. Naga Katta

Building Efficient and Reliable Software-Defined Networks. Naga Katta FPO Talk Building Efficient and Reliable Software-Defined Networks Naga Katta Jennifer Rexford (Advisor) Readers: Mike Freedman, David Walker Examiners: Nick Feamster, Aarti Gupta 1 Traditional Networking

More information

Partner : Advocate IT Service 81 Broadway Asheville, NC United States. Customer: Sample Customer TrafficSim Report

Partner : Advocate IT Service 81 Broadway Asheville, NC United States. Customer: Sample Customer TrafficSim Report Partner : Advocate IT Service 81 Broadway Asheville, NC United States Sample Customer TrafficSim Report Customer: Sample Customer Street: 123 Elm Street City: Asheville State/Prov: NC Country: United States

More information

Be Fast, Cheap and in Control with SwitchKV. Xiaozhou Li

Be Fast, Cheap and in Control with SwitchKV. Xiaozhou Li Be Fast, Cheap and in Control with SwitchKV Xiaozhou Li Goal: fast and cost-efficient key-value store Store, retrieve, manage key-value objects Get(key)/Put(key,value)/Delete(key) Target: cluster-level

More information

An Optically Turbocharged Internet Router

An Optically Turbocharged Internet Router An Optically Turbocharged Internet Router CCW 2001, Charlottesville, VA, Oct. 15 Joe Touch Director, Postel Center for Experimental Networking Computer Networks Division USC/ISI Outline Optical vs. Internet

More information

NetCache: Balancing Key-Value Stores with Fast In-Network Caching

NetCache: Balancing Key-Value Stores with Fast In-Network Caching NetCache: Balancing Key-Value Stores with Fast In-Network Caching Xin Jin, Xiaozhou Li, Haoyu Zhang, Robert Soulé Jeongkeun Lee, Nate Foster, Changhoon Kim, Ion Stoica NetCache is a rack-scale key-value

More information

NetCache: Balancing Key-Value Stores with Fast In-Network Caching

NetCache: Balancing Key-Value Stores with Fast In-Network Caching NetCache: Balancing Key-Value Stores with Fast In-Network Caching Xin Jin, Xiaozhou Li, Haoyu Zhang, Robert Soulé Jeongkeun Lee, Nate Foster, Changhoon Kim, Ion Stoica NetCache is a rack-scale key-value

More information

Lecture 15: Datacenter TCP"

Lecture 15: Datacenter TCP Lecture 15: Datacenter TCP" CSE 222A: Computer Communication Networks Alex C. Snoeren Thanks: Mohammad Alizadeh Lecture 15 Overview" Datacenter workload discussion DC-TCP Overview 2 Datacenter Review"

More information

Programmable Data Plane at Terabit Speeds Vladimir Gurevich May 16, 2017

Programmable Data Plane at Terabit Speeds Vladimir Gurevich May 16, 2017 Programmable Data Plane at Terabit Speeds Vladimir Gurevich May 16, 2017 Programmable switches are 10-100x slower than fixed-function switches. They cost more and consume more power. Conventional wisdom

More information

Computer Networks. Transmission Control Protocol. Jianping Pan Spring /3/17 CSC361 1

Computer Networks. Transmission Control Protocol. Jianping Pan Spring /3/17 CSC361 1 Computer Networks Transmission Control Protocol Jianping Pan Spring 2017 2/3/17 CSC361 1 https://connex.csc.uvic.ca/portal NSERC USRA awards available at UVic CSc for 2017/18 2/3/17 CSC361 2 TCP Transmission

More information

Programmable Forwarding Planes at Terabit/s Speeds

Programmable Forwarding Planes at Terabit/s Speeds Programmable Forwarding Planes at Terabit/s Speeds Patrick Bosshart HIEF TEHNOLOGY OFFIER, BREFOOT NETWORKS nd the entire Barefoot Networks team Hot hips 30, ugust 21, 2018 Barefoot Tofino : Domain Specific

More information

NetChain: Scale-Free Sub-RTT Coordination

NetChain: Scale-Free Sub-RTT Coordination NetChain: Scale-Free Sub-RTT Coordination Xin Jin Xiaozhou Li, Haoyu Zhang, Robert Soulé, Jeongkeun Lee, Nate Foster, Changhoon Kim, Ion Stoica Conventional wisdom: avoid coordination NetChain: lightning

More information

OASIS: Self-tuning Storage for Applications

OASIS: Self-tuning Storage for Applications OASIS: Self-tuning Storage for Applications Kostas Magoutis, Prasenjit Sarkar, Gauri Shah 14 th NASA Goddard- 23 rd IEEE Mass Storage Systems Technologies, College Park, MD, May 17, 2006 Outline Motivation

More information

Power of Slicing in Internet Flow Measurement. Ramana Rao Kompella Cristian Estan

Power of Slicing in Internet Flow Measurement. Ramana Rao Kompella Cristian Estan Power of Slicing in Internet Flow Measurement Ramana Rao Kompella Cristian Estan 1 IP Network Management Network Operator What is happening in my network? How much traffic flows towards a given destination?

More information

Gateware Defined Networking (GDN) for Ultra Low Latency Trading and Compliance

Gateware Defined Networking (GDN) for Ultra Low Latency Trading and Compliance Gateware Defined Networking (GDN) for Ultra Low Latency Trading and Compliance STAC Summit: Panel: FPGA for trading today: December 2015 John W. Lockwood, PhD, CEO Algo-Logic Systems, Inc. JWLockwd@algo-logic.com

More information

Stochastic Pre-Classification for SDN Data Plane Matching

Stochastic Pre-Classification for SDN Data Plane Matching Stochastic Pre-Classification for SDN Data Plane Matching Luke McHale, C. Jasson Casey, Paul V. Gratz, Alex Sprintson Presenter: Luke McHale Ph.D. Student, Texas A&M University Contact: luke.mchale@tamu.edu

More information

Ultra-Fast NoC Emulation on a Single FPGA

Ultra-Fast NoC Emulation on a Single FPGA The 25 th International Conference on Field-Programmable Logic and Applications (FPL 2015) September 3, 2015 Ultra-Fast NoC Emulation on a Single FPGA Thiem Van Chu, Shimpei Sato, and Kenji Kise Tokyo

More information

Slicing a Network. Software-Defined Network (SDN) FlowVisor. Advanced! Computer Networks. Centralized Network Control (NC)

Slicing a Network. Software-Defined Network (SDN) FlowVisor. Advanced! Computer Networks. Centralized Network Control (NC) Slicing a Network Advanced! Computer Networks Sherwood, R., et al., Can the Production Network Be the Testbed? Proc. of the 9 th USENIX Symposium on OSDI, 2010 Reference: [C+07] Cascado et al., Ethane:

More information

Heavy-Hitter Detection Entirely in the Data Plane

Heavy-Hitter Detection Entirely in the Data Plane Heavy-Hitter Detection Entirely in the Data Plane VIBHAALAKSHMI SIVARAMAN SRINIVAS NARAYANA, ORI ROTTENSTREICH, MUTHU MUTHUKRSISHNAN, JENNIFER REXFORD 1 Heavy Hitter Flows Flows above a certain threshold

More information

Wenchao Zhou *, Micah Sherr *, Tao Tao *, Xiaozhou Li *, Boon Thau Loo *, and Yun Mao +

Wenchao Zhou *, Micah Sherr *, Tao Tao *, Xiaozhou Li *, Boon Thau Loo *, and Yun Mao + Wenchao Zhou *, Micah Sherr *, Tao Tao *, Xiaozhou Li *, Boon Thau Loo *, and Yun Mao + * University of Pennsylvania + AT&T Labs Research Introduction Developing correct large-scale distributed systems

More information

IX: A Protected Dataplane Operating System for High Throughput and Low Latency

IX: A Protected Dataplane Operating System for High Throughput and Low Latency IX: A Protected Dataplane Operating System for High Throughput and Low Latency Adam Belay et al. Proc. of the 11th USENIX Symp. on OSDI, pp. 49-65, 2014. Presented by Han Zhang & Zaina Hamid Challenges

More information

Expeditus: Congestion-Aware Load Balancing in Clos Data Center Networks

Expeditus: Congestion-Aware Load Balancing in Clos Data Center Networks Expeditus: Congestion-Aware Load Balancing in Clos Data Center Networks Peng Wang, Hong Xu, Zhixiong Niu, Dongsu Han, Yongqiang Xiong ACM SoCC 2016, Oct 5-7, Santa Clara Motivation Datacenter networks

More information

Data Center TCP (DCTCP)

Data Center TCP (DCTCP) Data Center TCP (DCTCP) Mohammad Alizadeh, Albert Greenberg, David A. Maltz, Jitendra Padhye Parveen Patel, Balaji Prabhakar, Sudipta Sengupta, Murari Sridharan Microsoft Research Stanford University 1

More information

Investigating the Use of Synchronized Clocks in TCP Congestion Control

Investigating the Use of Synchronized Clocks in TCP Congestion Control Investigating the Use of Synchronized Clocks in TCP Congestion Control Michele Weigle (UNC-CH) November 16-17, 2001 Univ. of Maryland Symposium The Problem TCP Reno congestion control reacts only to packet

More information

Lecture 24: Scheduling and QoS

Lecture 24: Scheduling and QoS Lecture 24: Scheduling and QoS CSE 123: Computer Networks Alex C. Snoeren HW 4 due Wednesday Lecture 24 Overview Scheduling (Weighted) Fair Queuing Quality of Service basics Integrated Services Differentiated

More information

QoS Services with Dynamic Packet State

QoS Services with Dynamic Packet State QoS Services with Dynamic Packet State Ion Stoica Carnegie Mellon University (joint work with Hui Zhang and Scott Shenker) Today s Internet Service: best-effort datagram delivery Architecture: stateless

More information

Programmable Dataplane

Programmable Dataplane Programmable Dataplane THE NEXT STEP IN SDN? S I M O N J O U E T S I M O N. J O U E T @ G L A S G O W. A C. U K H T T P : / / N E T L A B. D C S.G L A. A C. U K GTS TECH+FUTURES WORKSHOP - SIMON JOUET

More information

Episode 5. Scheduling and Traffic Management

Episode 5. Scheduling and Traffic Management Episode 5. Scheduling and Traffic Management Part 3 Baochun Li Department of Electrical and Computer Engineering University of Toronto Outline What is scheduling? Why do we need it? Requirements of a scheduling

More information

Software Datapath Acceleration for Stateless Packet Processing

Software Datapath Acceleration for Stateless Packet Processing June 22, 2010 Software Datapath Acceleration for Stateless Packet Processing FTF-NET-F0817 Ravi Malhotra Software Architect Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions

More information

Impact of bandwidth-delay product and non-responsive flows on the performance of queue management schemes

Impact of bandwidth-delay product and non-responsive flows on the performance of queue management schemes Impact of bandwidth-delay product and non-responsive flows on the performance of queue management schemes Zhili Zhao Dept. of Elec. Engg., 214 Zachry College Station, TX 77843-3128 A. L. Narasimha Reddy

More information

IQ for DNA. Interactive Query for Dynamic Network Analytics. Haoyu Song. HUAWEI TECHNOLOGIES Co., Ltd.

IQ for DNA. Interactive Query for Dynamic Network Analytics. Haoyu Song.   HUAWEI TECHNOLOGIES Co., Ltd. IQ for DNA Interactive Query for Dynamic Network Analytics Haoyu Song www.huawei.com Motivation Service Provider s pain point Lack of real-time and full visibility of networks, so the network monitoring

More information

Introduction to Software-Defined Networking UG3 Computer Communications & Networks (COMN)

Introduction to Software-Defined Networking UG3 Computer Communications & Networks (COMN) Introduction to Software-Defined Networking UG3 Computer Communications & Networks (COMN) Myungjin Lee myungjin.lee@ed.ac.uk Courtesy note: Slides from course CPS514 Spring 2013 at Duke University and

More information

Typhoon: An SDN Enhanced Real-Time Big Data Streaming Framework

Typhoon: An SDN Enhanced Real-Time Big Data Streaming Framework Typhoon: An SDN Enhanced Real-Time Big Data Streaming Framework Junguk Cho, Hyunseok Chang, Sarit Mukherjee, T.V. Lakshman, and Jacobus Van der Merwe 1 Big Data Era Big data analysis is increasingly common

More information

Data Center TCP (DCTCP)

Data Center TCP (DCTCP) Data Center Packet Transport Data Center TCP (DCTCP) Mohammad Alizadeh, Albert Greenberg, David A. Maltz, Jitendra Padhye Parveen Patel, Balaji Prabhakar, Sudipta Sengupta, Murari Sridharan Cloud computing

More information

Comparing Open vswitch (OpenFlow) and P4 Dataplanes for Agilio SmartNICs

Comparing Open vswitch (OpenFlow) and P4 Dataplanes for Agilio SmartNICs Comparing Open vswitch (OpenFlow) and P4 Dataplanes for Agilio SmartNICs Johann Tönsing May 24, 206 206 NETRONOME Agenda Contributions of OpenFlow, Open vswitch and P4 OpenFlow features missing in P4,

More information

FPX Architecture for a Dynamically Extensible Router

FPX Architecture for a Dynamically Extensible Router FPX Architecture for a Dynamically Extensible Router Alex Chandra, Yuhua Chen, John Lockwood, Sarang Dharmapurikar, Wenjing Tang, David Taylor, Jon Turner http://www.arl.wustl.edu/arl Dynamically Extensible

More information

Master Course Computer Networks IN2097

Master Course Computer Networks IN2097 Chair for Network Architectures and Services Prof. Carle Department for Computer Science TU München Master Course Computer Networks IN2097 Chapter 7 - Network Measurements Introduction Architecture & Mechanisms

More information

Programmable data planes, P4, and Trellis

Programmable data planes, P4, and Trellis Programmable data planes, P4, and Trellis Carmelo Cascone MTS, P4 Brigade Leader Open Networking Foundation October 20, 2017 1 Outline Introduction to P4 and P4 Runtime P4 support in ONOS Future plans

More information

PVPP: A Programmable Vector Packet Processor. Sean Choi, Xiang Long, Muhammad Shahbaz, Skip Booth, Andy Keep, John Marshall, Changhoon Kim

PVPP: A Programmable Vector Packet Processor. Sean Choi, Xiang Long, Muhammad Shahbaz, Skip Booth, Andy Keep, John Marshall, Changhoon Kim PVPP: A Programmable Vector Packet Processor Sean Choi, Xiang Long, Muhammad Shahbaz, Skip Booth, Andy Keep, John Marshall, Changhoon Kim Fixed Set of Protocols Fixed-Function Switch Chip TCP IPv4 IPv6

More information

CS644 Advanced Networks

CS644 Advanced Networks What we know so far CS644 Advanced Networks Lecture 6 Beyond TCP Congestion Control Andreas Terzis TCP Congestion control based on AIMD window adjustment [Jac88] Saved Internet from congestion collapse

More information

Hardware Flow Offload. What is it? Why you should matter?

Hardware Flow Offload. What is it? Why you should matter? Hardware Offload What is it? Why you should matter? Good News: Network Speed The market is moving from 10 Gbit to 40/100 Gbit At 40 Gbit frame inter-arrival time is ~16 nsec At 100 Gbit frame inter-arrival

More information

Low-latency Network Monitoring via Oversubscribed Port Mirroring

Low-latency Network Monitoring via Oversubscribed Port Mirroring Low-latency Network Monitoring via Oversubscribed Port Mirroring Jeff Rasley, Brent tephens,! Colin Dixon, Eric Rozner,! Wes Felter, Kanak Agarwal,! John Carter, Rodrigo Fonseca elf-tuning Networks Control

More information

A Cost Model for Data Stream Processing on Modern Hardware Constantin Pohl, Philipp Götze, Kai-Uwe Sattler

A Cost Model for Data Stream Processing on Modern Hardware Constantin Pohl, Philipp Götze, Kai-Uwe Sattler Processing on Modern Hardware Constantin Pohl, Philipp Götze, Kai-Uwe Sattler 31.08.17 Motivation and Introduction Main goals on Data Stream Processing Queries: High throughput & low latency Responsibility:

More information

Cisco ASR 1000 Series Routers Embedded Services Processors

Cisco ASR 1000 Series Routers Embedded Services Processors Cisco ASR 1000 Series Routers Embedded Services Processors The Cisco ASR 1000 Series embedded services processors are based on the Cisco QuantumFlow Processor (QFP) for next-generation forwarding and queuing.

More information

I Know What Your Packet Did Last Hop: Using Packet Histories to Troubleshoot Networks.

I Know What Your Packet Did Last Hop: Using Packet Histories to Troubleshoot Networks. I Know What Your Packet Did Last Hop: Using Packet Histories to Troubleshoot Networks. Paper by: Nikhil Handigol, Brandon Heller, Vimalkumar Jeyakumar, David Mazières, and Nick McKeown, Stanford University

More information

Micro load balancing in data centers with DRILL

Micro load balancing in data centers with DRILL Micro load balancing in data centers with DRILL Soudeh Ghorbani (UIUC) Brighten Godfrey (UIUC) Yashar Ganjali (University of Toronto) Amin Firoozshahian (Intel) Where should the load balancing functionality

More information

Concept: Traffic Flow. Prof. Anja Feldmann, Ph.D. Dr. Steve Uhlig

Concept: Traffic Flow. Prof. Anja Feldmann, Ph.D. Dr. Steve Uhlig Concept: Traffic Flow Prof. Anja Feldmann, Ph.D. Dr. Steve Uhlig 1 Passive measurement capabilities: Packet monitors Available data: All protocol information All content Possible analysis: Application

More information

Master Course Computer Networks IN2097

Master Course Computer Networks IN2097 Chair for Network Architectures and Services Prof. Carle Department for Computer Science TU München Master Course Computer Networks IN2097 Prof. Dr.-Ing. Georg Carle Christian Grothoff, Ph.D. Dr. Nils

More information

P51: High Performance Networking

P51: High Performance Networking P51: High Performance Networking Lecture 6: Programmable network devices Dr Noa Zilberman noa.zilberman@cl.cam.ac.uk Lent 2017/18 High Throughput Interfaces Performance Limitations So far we discussed

More information

Hermes: An Integrated CPU/GPU Microarchitecture for IP Routing

Hermes: An Integrated CPU/GPU Microarchitecture for IP Routing Hermes: An Integrated CPU/GPU Microarchitecture for IP Routing Yuhao Zhu * Yangdong Deng Yubei Chen * Electrical and Computer Engineering University of Texas at Austin Institute of Microelectronics Tsinghua

More information

Data Storage Institute. SANSIM: A PLATFORM FOR SIMULATION AND DESIGN OF A STORAGE AREA NETWORK Zhu Yaolong

Data Storage Institute. SANSIM: A PLATFORM FOR SIMULATION AND DESIGN OF A STORAGE AREA NETWORK Zhu Yaolong Data Storage Institute SANSIM: A PLATFORM FOR SIMULATION AND DESIGN OF A STORAGE AREA NETWORK Zhu Yaolong e_mail:zhu_yaolong@dsi.a-star.edu.sg Outline Motivation Key Focuses Simulation Methodology SANSim

More information

AVC Configuration. Unified Policy CLI CHAPTER

AVC Configuration. Unified Policy CLI CHAPTER CHAPTER 3 Revised: February 7, 2013, This chapter addresses AVC configuration and includes the following topics: Unified Policy CLI, page 3-1 Metric Producer Parameters, page 3-2 Reacts, page 3-2 NetFlow/IPFIX

More information

High Performance Packet Processing with FlexNIC

High Performance Packet Processing with FlexNIC High Performance Packet Processing with FlexNIC Antoine Kaufmann, Naveen Kr. Sharma Thomas Anderson, Arvind Krishnamurthy University of Washington Simon Peter The University of Texas at Austin Ethernet

More information

Hardware Acceleration in Computer Networks. Jan Kořenek Conference IT4Innovations, Ostrava

Hardware Acceleration in Computer Networks. Jan Kořenek Conference IT4Innovations, Ostrava Hardware Acceleration in Computer Networks Outline Motivation for hardware acceleration Longest prefix matching using FPGA Hardware acceleration of time critical operations Framework and applications Contracted

More information

CONGA: Distributed Congestion-Aware Load Balancing for Datacenters

CONGA: Distributed Congestion-Aware Load Balancing for Datacenters CONGA: Distributed Congestion-Aware Load Balancing for Datacenters By Alizadeh,M et al. Motivation Distributed datacenter applications require large bisection bandwidth Spine Presented by Andrew and Jack

More information

Towards a Robust Protocol Stack for Diverse Wireless Networks Arun Venkataramani

Towards a Robust Protocol Stack for Diverse Wireless Networks Arun Venkataramani Towards a Robust Protocol Stack for Diverse Wireless Networks Arun Venkataramani (in collaboration with Ming Li, Devesh Agrawal, Deepak Ganesan, Aruna Balasubramanian, Brian Levine, Xiaozheng Tie at UMass

More information

Extending the range of P4 programmability

Extending the range of P4 programmability Extending the range of P4 programmability Gordon Brebner Xilinx Labs, San Jose, USA P4EU Keynote, Cambridge, UK 24 September 2018 What this talk is about P4 history and status Portable NIC Architecture

More information

P4 Introduction. Jaco Joubert SIGCOMM NETRONOME SYSTEMS, INC.

P4 Introduction. Jaco Joubert SIGCOMM NETRONOME SYSTEMS, INC. P4 Introduction Jaco Joubert SIGCOMM 2018 2018 NETRONOME SYSTEMS, INC. Agenda Introduction Learning Goals Agilio SmartNIC Process to Develop Code P4/C Examples P4 INT P4/C Stateful Firewall SmartNIC P4

More information

Baidu s Best Practice with Low Latency Networks

Baidu s Best Practice with Low Latency Networks Baidu s Best Practice with Low Latency Networks Feng Gao IEEE 802 IC NEND Orlando, FL November 2017 Presented by Huawei Low Latency Network Solutions 01 1. Background Introduction 2. Network Latency Analysis

More information

A Policy-aware Switching Layer for Data Centers

A Policy-aware Switching Layer for Data Centers A Policy-aware Switching Layer for Data Centers Dilip Joseph Arsalan Tavakoli Ion Stoica University of California at Berkeley 1 Problem: Middleboxes are hard to deploy Place on network path Overload path

More information

Congestion Control for High Bandwidth-delay Product Networks. Dina Katabi, Mark Handley, Charlie Rohrs

Congestion Control for High Bandwidth-delay Product Networks. Dina Katabi, Mark Handley, Charlie Rohrs Congestion Control for High Bandwidth-delay Product Networks Dina Katabi, Mark Handley, Charlie Rohrs Outline Introduction What s wrong with TCP? Idea of Efficiency vs. Fairness XCP, what is it? Is it

More information

BESS: A Virtual Switch Tailored for NFV

BESS: A Virtual Switch Tailored for NFV BESS: A Virtual Switch Tailored for NFV Sangjin Han, Aurojit Panda, Brian Kim, Keon Jang, Joshua Reich, Saikrishna Edupuganti, Christian Maciocco, Sylvia Ratnasamy, Scott Shenker https://github.com/netsys/bess

More information

An In-depth Study of LTE: Effect of Network Protocol and Application Behavior on Performance

An In-depth Study of LTE: Effect of Network Protocol and Application Behavior on Performance An In-depth Study of LTE: Effect of Network Protocol and Application Behavior on Performance Authors: Junxian Huang, Feng Qian, Yihua Guo, Yuanyuan Zhou, Qiang Xu, Z. Morley Mao, Subhabrata Sen, Oliver

More information

Speeding up Linux TCP/IP with a Fast Packet I/O Framework

Speeding up Linux TCP/IP with a Fast Packet I/O Framework Speeding up Linux TCP/IP with a Fast Packet I/O Framework Michio Honda Advanced Technology Group, NetApp michio@netapp.com With acknowledge to Kenichi Yasukata, Douglas Santry and Lars Eggert 1 Motivation

More information

Accelerate Applications Using EqualLogic Arrays with directcache

Accelerate Applications Using EqualLogic Arrays with directcache Accelerate Applications Using EqualLogic Arrays with directcache Abstract This paper demonstrates how combining Fusion iomemory products with directcache software in host servers significantly improves

More information

SteelCentral Packet Capture & Analysis. May 2016

SteelCentral Packet Capture & Analysis. May 2016 SteelCentral Packet Capture & Analysis May 2016 SteelCentral Platform IT Ops Network Ops App Ops DevOps LOB Unified Performance Visibility Single Performance Management Interface Portal NetProfiler, NetShark,

More information

Chapter 1. Introduction

Chapter 1. Introduction Chapter 1 Introduction In a packet-switched network, packets are buffered when they cannot be processed or transmitted at the rate they arrive. There are three main reasons that a router, with generic

More information

Programmable Software Switches. Lecture 11, Computer Networks (198:552)

Programmable Software Switches. Lecture 11, Computer Networks (198:552) Programmable Software Switches Lecture 11, Computer Networks (198:552) Software-Defined Network (SDN) Centralized control plane Data plane Data plane Data plane Data plane Why software switching? Early

More information

MAD 12 Monitoring the Dynamics of Network Traffic by Recursive Multi-dimensional Aggregation. Midori Kato, Kenjiro Cho, Michio Honda, Hideyuki Tokuda

MAD 12 Monitoring the Dynamics of Network Traffic by Recursive Multi-dimensional Aggregation. Midori Kato, Kenjiro Cho, Michio Honda, Hideyuki Tokuda MAD 12 Monitoring the Dynamics of Network Traffic by Recursive Multi-dimensional Aggregation Midori Kato, Kenjiro Cho, Michio Honda, Hideyuki Tokuda 1 Background Traffic monitoring is important to detect

More information

The Google File System

The Google File System The Google File System Sanjay Ghemawat, Howard Gobioff, and Shun-Tak Leung SOSP 2003 presented by Kun Suo Outline GFS Background, Concepts and Key words Example of GFS Operations Some optimizations in

More information

The Effects of Asymmetry on TCP Performance

The Effects of Asymmetry on TCP Performance The Effects of Asymmetry on TCP Performance Hari Balakrishnan Venkata N. Padmanabhan Randy H. Katz University of California at Berkeley Daedalus/BARWAN Retreat June 1997 Outline Overview Bandwidth asymmetry

More information

Traffic engineering and GridFTP log analysis. Jan 17, 2013 Project web site:

Traffic engineering and GridFTP log analysis. Jan 17, 2013 Project web site: Traffic engineering and GridFTP log analysis Zhenzhen Yan, Z. Liu, M. Veeraraghavan University of Virginia mvee@virginia.edu Chris Tracy, Chin Guok ESnet ctracy@es.net Jan 17, 2013 Project web site: http://www.ece.virginia.edu/mv/research/doe09/index.html

More information

An Empirical Study of High Availability in Stream Processing Systems

An Empirical Study of High Availability in Stream Processing Systems An Empirical Study of High Availability in Stream Processing Systems Yu Gu, Zhe Zhang, Fan Ye, Hao Yang, Minkyong Kim, Hui Lei, Zhen Liu Stream Processing Model software operators (PEs) Ω Unexpected machine

More information

CAMNEP: Multistage Collective Network Behavior Analysis System with Hardware Accelerated NetFlow Probes

CAMNEP: Multistage Collective Network Behavior Analysis System with Hardware Accelerated NetFlow Probes CAMNEP: Multistage Collective Network Behavior Analysis System with Hardware Accelerated NetFlow Probes Martin Rehak, Pavel Celeda, Michal Pechoucek, Jiri Novotny CESNET, z. s. p. o. Gerstner Laboratory

More information

TKN. Technische Universität Berlin. Circuit Switching Module for ns-2. Filip Idzikowski. Berlin, March 2009

TKN. Technische Universität Berlin. Circuit Switching Module for ns-2. Filip Idzikowski. Berlin, March 2009 TKN Telecommunication Networks Group Technische Universität Berlin Telecommunication Networks Group Circuit Switching Module for ns-2 Filip Idzikowski idzikowski@tkn.tu-berlin.de Berlin, March 2009 TKN

More information

Programming NFP with P4 and C

Programming NFP with P4 and C WHITE PAPER Programming NFP with P4 and C THE NFP FAMILY OF FLOW PROCESSORS ARE SOPHISTICATED PROCESSORS SPECIALIZED TOWARDS HIGH-PERFORMANCE FLOW PROCESSING. CONTENTS INTRODUCTION...1 PROGRAMMING THE

More information

Designing Next Generation Data-Centers with Advanced Communication Protocols and Systems Services

Designing Next Generation Data-Centers with Advanced Communication Protocols and Systems Services Designing Next Generation Data-Centers with Advanced Communication Protocols and Systems Services P. Balaji, K. Vaidyanathan, S. Narravula, H. W. Jin and D. K. Panda Network Based Computing Laboratory

More information

Hardware Telemetry. About Streaming Statistics Export (SSX) Packet Format. About Streaming Statistics Export (SSX), on page 1

Hardware Telemetry. About Streaming Statistics Export (SSX) Packet Format. About Streaming Statistics Export (SSX), on page 1 About Streaming Statistics Export (SSX), on page 1 About Streaming Statistics Export (SSX) Packet Format The Streaming Statistics Export (SSX) module reads statistics from the ASIC and sends them to a

More information

CE693: Adv. Computer Networking

CE693: Adv. Computer Networking CE693: Adv. Computer Networking L-10 Wireless Broadcast Fall 1390 Acknowledgments: Lecture slides are from the graduate level Computer Networks course thought by Srinivasan Seshan at CMU. When slides are

More information

CS268: Beyond TCP Congestion Control

CS268: Beyond TCP Congestion Control TCP Problems CS68: Beyond TCP Congestion Control Ion Stoica February 9, 004 When TCP congestion control was originally designed in 1988: - Key applications: FTP, E-mail - Maximum link bandwidth: 10Mb/s

More information

Agilio CX 2x40GbE with OVS-TC

Agilio CX 2x40GbE with OVS-TC PERFORMANCE REPORT Agilio CX 2x4GbE with OVS-TC OVS-TC WITH AN AGILIO CX SMARTNIC CAN IMPROVE A SIMPLE L2 FORWARDING USE CASE AT LEAST 2X. WHEN SCALED TO REAL LIFE USE CASES WITH COMPLEX RULES TUNNELING

More information

Detecting Malicious Hosts Using Traffic Flows

Detecting Malicious Hosts Using Traffic Flows Detecting Malicious Hosts Using Traffic Flows Miguel Pupo Correia joint work with Luís Sacramento NavTalks, Lisboa, June 2017 Motivation Approach Evaluation Conclusion Outline 2 1 Outline Motivation Approach

More information

Disclaimer This presentation may contain product features that are currently under development. This overview of new technology represents no commitme

Disclaimer This presentation may contain product features that are currently under development. This overview of new technology represents no commitme NET1343BU NSX Performance Samuel Kommu #VMworld #NET1343BU Disclaimer This presentation may contain product features that are currently under development. This overview of new technology represents no

More information

Stateless Network Functions:

Stateless Network Functions: Stateless Network Functions: Breaking the Tight Coupling of State and Processing Murad Kablan, Azzam Alsudais, Eric Keller, Franck Le University of Colorado IBM Networks Need Network Functions Firewall

More information

Flexible NetFlow - Top N Talkers Support

Flexible NetFlow - Top N Talkers Support This document contains information about and instructions for using the Flexible NetFlow - Top N Talkers Support feature. The feature helps you analyze the large amount of data that Flexible NetFlow captures

More information

It's kind of fun to do the impossible with DPDK Yoshihiro Nakajima, Hirokazu Takahashi, Kunihiro Ishiguro, Koji Yamazaki NTT Labs

It's kind of fun to do the impossible with DPDK Yoshihiro Nakajima, Hirokazu Takahashi, Kunihiro Ishiguro, Koji Yamazaki NTT Labs It's kind of fun to do the impossible with DPDK Yoshihiro Nakajima, Hirokazu Takahashi, Kunihiro Ishiguro, Koji Yamazaki NTT Labs 0 Agenda Motivation for fun Fun with Lagopus SDN switch Fun with speed

More information

Flash vs. Disk Storage: Testing Workloads is Key

Flash vs. Disk Storage: Testing Workloads is Key Flash vs. Disk Storage: Testing Workloads is Key Len Rosenthal VP of Marketing Flash Memory Summit 2013 Santa Clara, CA 1 Overview The leader in Storage Performance Validation. Our Mission: To provide

More information

[MS10987A]: Performance Tuning and Optimizing SQL Databases

[MS10987A]: Performance Tuning and Optimizing SQL Databases [MS10987A]: Performance Tuning and Optimizing SQL Databases Length : 4 Days Audience(s) : IT Professionals Level : 300 Technology : Microsoft SQL Server Delivery Method : Instructor-led (Classroom) Course

More information

StressRight: Finding the Right Stress for Accurate In-development System Evaluation

StressRight: Finding the Right Stress for Accurate In-development System Evaluation StressRight: Finding the Right Stress for Accurate In-development System Evaluation Jaewon Lee 1, Hanhwi Jang 1, Jae-eon Jo 1, Gyu-Hyeon Lee 2, Jangwoo Kim 2 High Performance Computing Lab Pohang University

More information

SEDA: An Architecture for Well-Conditioned, Scalable Internet Services

SEDA: An Architecture for Well-Conditioned, Scalable Internet Services SEDA: An Architecture for Well-Conditioned, Scalable Internet Services Matt Welsh, David Culler, and Eric Brewer Computer Science Division University of California, Berkeley Operating Systems Principles

More information