LPC-MT-2138 development board Users Manual

Transcription

1 LPC-MT-8 development board Users Manual All boards produced by Olimex are ROHS compliant Rev. Initial, September 00 Copyright(c) 00, OLIMEX Ltd, All rights reserved Page

2 INTRODUCTION LPC-MT-8 is small terminal board which uses LPC8 microcontroller. With its LCD, relay, five buttons, variety of interfaces such as RS, JTAG, IC, Dallas and extension connector for some of the microcontroller's pins this board is suitable for different embedded systems applications. BOARD FEATURES Microcontroller: LPC8 / bit ARM7TDMI-S with K Bytes Program Flash, K Bytes RAM, RTC, 8x 0 bit ADC. us, x UARTs, IC, SPI, x bit TIMERS, 8x CCR, x PWM, WDT, V tolerant I/O, up to 0MHz operation JTAG connector as per ARM's x0 pin layout, ARM-JTAG (Wiggler) compatible.7 Mhz crystal on socket, allow easy communication setup (x PLL = 8,98 Mhz CPU clock) RS interface circuit with SUB-D 9 pin connector LCDx display with BACKLIGHT five buttons Dallas ibutton port Frequency input Relay with 0A/0VAC contacts Buzzer Status LED RESET circuit RESET button Bootloader enable jumper and pullup DEBUG jumper for JTAG enable/disable RTCK pullup resistors Power plug-in jack power supply: 9VAC/+VDC three on board voltage regulators.8v, and V power supply filtering capacitor Four mounting holes PCB: FR-,. mm (0,0"), soldermask, white silkscreen component print Dimensions: 0x8 mm (.7x.") Page

3 Page

4 ELECTROSTATIC WARNING The LPC-MT-8 board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board. BOARD USE REQUIREMENTS Cables: Depends on the used programming/debugging tool. It could be.8 meter USB A-B cable to connect ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY and ARM-USB-TINY-H to USB host on PC or LPT cable in case of ARM-JTAG or other programming/debugging tools. You will need a serial cable if not for programming, than for configuring the board. Hardware: Programmer/Debugger some of Olimex programmers are applicable, for example ARM-JTAG, ARM-JTAG-EW, ARM-USB-OCD, ARMUSB-TINY, ARM-USB-TINY-H or other compatible programming/debugging tool. PROCESSOR FEATURES LPC-MT-8 board use LPC8 microcontroller based on a /-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combine the microcontroller with kb of embedded high-speed flash memory. A 8-bit wide memory interface and a unique accelerator architecture enable -bit code execution at maximum clock rate. with these features: kb of on-chip static RAM and / kb of on-chip flash program memory. 8-bit wide interface/accelerator enables high-speed 0 MHz operation. In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader software. Single flash sector or full chip erase in 00 ms and programming of B in ms. EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software and high-speed tracing of instruction execution. Two 8-channel 0-bit ADCs provide a total of up to analog inputs, with conversion times as low as. ms per channel. Single 0-bit DAC provides variable analog output. Two -bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog. Low power Real-time clock with independent power and dedicated khz clock input. Multiple serial interfaces including two UARTs (C0), two Fast IC-bus (00 kbit/s), SPI and SSP with buffering and variable data length capabilities. Vectored interrupt controller with configurable priorities and vector addresses. Up to forty-seven V tolerant general purpose I/O pins Up to nine edge or level sensitive external interrupt pins available. 0 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 00 ms. Page

5 On-chip integrated oscillator operates with external crystal in range of MHz to 0 MHz and with external oscillator up to 0 MHz. Power saving modes include Idle and Power-down. Individual enable/disable of peripheral functions as well as peripheral clock scaling down for additional power optimization. Processor wake-up from Power-down mode via external interrupt or BOD. Single power supply chip with POR and BOD circuits: CPU operating voltage range of.0 V to. V (. V ± 0 %) with V tolerant I/O pads. Page

6 BLOCK DIAGRAM Page

7 MEMORY MAP Page 7

8 Page 8 R K BUZ R8 00K FREQ +V D N8 D N8 RXD0 JRST RST IN C8 REL OUT VR 78L0 REL_CO N D BATC FREQ R 70 K R L 7mH C0 9 TXD0 + C T BC8 BUZZER +V VCC UPWR + ROUT ROUT 0 C TIN TIN 0uF/V RIN RIN TOUT TOUT C7 C T BC8 REL +V +V C 0p C 0p DBG TRST TDI TMS TCK RTCK TDO RST R 0K R9 K K RRELAY N8 D 0 B B B B B B R K LPCX VSSA VDD(A) VREF VSS VSS VSS VSS VSS VDD-(I/O) VDD-(I/O) VDD-(I/O) VBAT RTCX RTCX C 0uF/. 0 R R opt B B R K T BC8 0 R RS R/W E DB DB DB DB7 B B R K RST X X P0./AD0./AOUT P0./AD0. P0.7/AD0.0/CAP0./MAT0. P0.8/AD0./CAP0./MAT0. P0.9/AD0./CAP0./MAT0. P0.0/AD0./EINT/CAP0.0 P0. P0./EINT0/MAT0./CAP0. P0.7/CAP./SCK/MAT. P0.8/CAP./MISO/MAT. P0.9/MAT./MOSI/CAP. P0.0/MAT./SSEL/EINT P0./PWM/AD./CAP. P0./AD.7/CAP0.0/MAT0.0 P0. P0.8/TXD/PWM/AD. P0.9/RXD/PWM/EINT P0.0/RTS/CAP.0/AD. P0./CTS/CAP./SCL P0./DSR/MAT.0/AD. P0./DTR/MAT./AD. P0./DCD/EINT/SDA P0./RI/EINT/AD. P0.0/TXD0/PWM P0./RXD0/PWM/EINT0 P0./SCL0/CAP0.0 P0./SDA0/MAT0.0/EINT P0./SCK0/CAP0./AD0. P0./MISO0/MAT0./AD0.7 P0./MOSI0/CAP0./AD.0 P0.7/SSEL0/PWM/EINT DB[..7],E,R/W,RS R K P./TRACECLK P./EXTIN0 P./RTCK P.7/TDO P.8/TDI P.9/TCK P.0/TMS P./TRST R K K R P./TRACEPKT0 P.7/TRACEPKT P.8/TRACEPKT P.9/TRACEPKT P.0/TRACESYNC P./PIPESTAT0 P./PIPESTAT P./PIPESTAT U R7 K C R C7 0uF/.V P. P P. RS E R/W DB DB DB DB7 Q 78/pF RTCK TDO TDI TCK TMS TRST C C PWM LIGHT_LCD AOUT DAC/PWM C0 BATC D R0 0K R 0K BAT R9 0K R 0K VREF 8 7 C C- C+ C- C+ R 90/% R0 0/% R 0K + RS_ICSP V- V+ OUT ADJ/ IN VR() LM7 DALLAS U MAX 70uF/VDC C N7 Z D N8 R9.7K R8 +V JTAG 7uF/.V G ND C9 C8 9VAC PWR DALLAS D0 N8 P. P. P0.8 P0. P0.8 P0. P0.8 P0. P LED R0 0 C 9pF C 9pF R7 K RST RST NA C R 0K R K CO PYRIG HT(C) 00, O LIMEX Ltd. Rev. Initial IC VCC U MCP0T RESET BSL R K BSL R7 K LPC-MT-8.7MHz 7 Q AOUT P0. P0.7 P0.8 P0.9 B LED B P0.7 P0.8 P0.9 B PWM BUZ RELAY B P0.8 B FREQ DALLAS P0. P0. TXD0 RXD0 SCL0 SDA0 P0. P0. P0. P _RS R/W E DB DB DB DB7 LIGHT+ LIGHT- VO LED +V CONTRAST VSS G DB0 AOUT P. P0.9 P0.7 P0.9 P0.7 P0. P0.7 P0. EXT 0K VDD V R opt SCHEMATIC

9 BOARD LAYOUT POWER CIRCUIT LPC-MT-8 can is typically power supplied with +9VAC or VDC from power jack. RESET CIRCUIT LPC-MT-8 reset circuit includes R (0k) pull-up, U (MCP0T), LPC8 pin 7 (RST) and RST button. CLOCK CIRCUIT Quartz crystal Q.7 MHz is connected to LPC8 pin (X) and pin (X). Quartz crystal Q.78 KHz is connected to LPC8 pin (RTCX) and pin (RTCX). Page 9

10 JUMPER DESCRIPTION VREF Connects LPC8 pin (VREF) to. Default state is closed. DAC/PWM When this jumper is in position DAC - connects LIGHT_LCD signal to LPC8 pin 9 (AOUT); when this jumper is in position PWM connects LIGHT_LCD signal to LPC8 pin (PWM). Default state is PWM closed. JRST Enables LPC8 reset via UART. Default state is open. BSL This jumper is connected to LPC8 pin (P0.). When this jumper is open, P0. is pulled-up to via R (k), when is closed P0. is pulled-down via R (k). LOW level on pin P0. immediately after reset is considered as an external hardware request to start the ISP command handler. If there is no request for the ISP command handler execution (P0. is sampled HIGH after reset), a search is made for a valid user program. If a valid user program is found then the execution control is transferred to it. If a valid user program is not found, the auto-baud routine is invoked. Default state is open. DBG Enables JTAG debug operations. Default state is closed. INPUT/OUTPUT Reset button with name RST, connected to LPC8 pin 7 (RST). User button with name B, connected to LPC8 pin (P0.). User button with name B, connected to LPC8 pin (P0.). User button with name B, connected to LPC8 pin (P0.0). User button with name B, connected to LPC8 pin (P0.0). User button with name B, connected to LPC8 pin (P0.9). LCD x display with BACKLIGHT, connected as follows: RS to LPC8 pin (P.7); R/W to LPC8 pin (P.9); E to LPC8 pin 8 (P.8), DB to LPC8 pin 8 (P.0), DB to LPC8 pin (P.), DB to LPC8 pin 0 (P.), DB7 to LPC8 pin (P.). Potentiometer with name Contrast for setting LCD contrast voltage. Status Led with name LED connected to LPC8 pin 7 (P0.). Buzzer connected to LPC8 pin (P0.). Page 0

11 Relay with name REL connected to LPC8 pin 8 (P0.). EXTERNAL CONNECTORS DESCRIPTION JTAG +. V +. V TRST TDI 7 TMS 8 9 TCK 0 RTCK TDO RST 7 Not Connected 8 9 Not Connected 0 IC SCL0 SDA0 Page

12 EXT P0. P0. P0. P0.7 P0.8 P0. 7 P0. 8 P0.7 9 P0.8 0 P0.9 P0. P0.7 P0.8 P0.9 P. P. 7 P. 8 AOUT 9 0 FREQ FREQ(P0.0) DALLAS(P0.) DALLAS BAT Page

13 VBAT RS/ICSP NC TOUT RIN RIN NC 7 NC 8 NC 9 NC PWR: Power Input REL_CON: This connector provides the user with access to the contact plates of the relay. Page

14 MECHANICAL DIMENSIONS All measures are in Inches. Page

15 AVAILABLE DEMO SOFTWARE code (EW-ARM) LCD drive RTC code (EW-ARM) RS code (EW-ARM) Button, Relay, LED, buzzer demo code (EW-ARM) LCD, RTC, UART, BUTTONs, BUZZER demo code (GNU) by Markus Dornhofer OpenOCD + Eclipse set of projects.00 include flash write make file for LPCMT-8. Page

16 ORDER CODE LPC-MT-8 - completely assembled and tested. How to order? You can order to us directly or by any of our distributors. Check our web for more info. Revision history: Rev. Initial - create September 00 Page

17 Disclaimer: 00 Olimex Ltd. All rights reserved. Olimex, logo and combinations thereof, are registered trademarks of Olimex Ltd. Other terms and product names may be trademarks of others. The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products. Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder. The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product. Page 7