R-535J USER S GUIDE. Version 1.1 JULY 1998

Transcription

1 R-535J USER S GUIDE Version 1.1 JULY 1998 RIGEL CORPORATION P.O. Box Gainesville, Florida (352) FAX

2 Copyright (C) 1998 by Rigel Corporation. All rights reserved. No part of this document may be reproduced, stored in a retrieval system, or transmitted in any form, or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of Rigel Corporation. The abbreviation PC used throughout this guide refers to the IBM Personal Computer or its compatibles. IBM PC is a trademark of International Business Machines, Inc.

3 Warranty RIGEL CORPORATION - CUSTOMER AGREEMENT 1. Return Policy. If you are not satisfied with the items purchased, prior to usage, you may return them to Rigel Corporation within thirty (30) days of your receipt of same and receive a full refund from Rigel Corporation. You will be responsible for shipping costs. Please call (352) prior to shipping. A refund will not be given if the READS package has been opened. 2. READS and RROS License. The READS and RROS being purchased is hereby licensed to you on a nonexclusive basis for use in only one computer system and shall remain the property of Rigel Corporation for purposes of utilization and resale. You acknowledge you may not duplicate the READS or RROS for use in additional computers, nor may you modify, disassemble, translate, sub-license, rent or transfer electronically READS or RROS from one computer to another, or make it available through a timesharing service or network of computers. Rigel Corporation maintains all proprietary rights in and to READS and RROS for purposes of sale and resale or license and re-license. BY BREAKING THE SEAL AND OTHERWISE OPENING THE READS PACKAGE, YOU INDICATE YOUR ACCEPTANCE OF THIS LICENSE AGREEMENT, AS WELL AS ALL OTHER PROVISIONS CONTAINED HEREIN. 3. Limited Warranty. Rigel Corporation warrants, for a period of sixty (60) days from your receipt, that READS disk(s), RROS, hardware assembled boards and hardware unassembled components shall be free of substantial errors or defects in material and workmanship which will materially interfere with the proper operation of the items purchased. If you believe such an error or defect exists, please call Rigel Corporation at (352) to see whether such error or defect may be corrected, prior to returning items to Rigel Corporation. Rigel Corporation will repair or replace, at its sole discretion, any defective items, at no cost to you, and the foregoing shall constitute your sole and exclusive remedy in the event of any defects in material or workmanship. THE LIMITED WARRANTIES SET FORTH HEREIN ARE IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. YOU ASSUME ALL RISKS AND LIABILITY FROM OPERATION OF ITEMS PURCHASED AND RIGEL CORPORATION SHALL IN NO EVENT BE LIABLE FOR DAMAGES CAUSED BY USE OR PERFORMANCE, FOR LOSS PROFITS, PERSONAL INJURY OR FOR ANY OTHER INCIDENTAL OR CONSEQUENTIAL DAMAGES. RIGEL CORPORATION S LIABILITY SHALL NOT EXCEED THE COST OF REPAIR OR REPLACEMENT OF DEFECTIVE ITEMS. IF THE FOREGOING LIMITATIONS ON LIABILITY ARE UNACCEPTABLE TO YOU, YOU SHOULD RETURN ALL ITEMS PURCHASED TO RIGEL CORPORATION. 4. Board Kit. If you are purchasing a board kit, you are assumed to have the skill and knowledge necessary to properly assemble same. Please inspect all components and review accompanying instructions. If instructions are unclear, please return the kit unassembled for a full refund or, if you prefer, Rigel Corporation will assemble the kit for a fee of $ You shall be responsible for shipping costs. The foregoing shall apply only where the kit is unassembled. In the event the kit is partially assembled, a refund will not be available, however, Rigel Corporation can, upon request, complete assembly for a fee based on an hourly rate of $ Although Rigel Corporation will replace any defective parts, it shall not be responsible for malfunctions due to errors in assembly. If you encounter problems with assembly, please call Rigel Corporation at (352) for advice and instruction. In the event a problem cannot be resolved by telephone, Rigel Corporation will perform repair work, upon request, at the foregoing rate of $50.00 per hour. 5. Governing Law. This agreement and all rights of the respective parties shall be governed by the laws of the State of Florida.

4 Table of Contents 1 INTRODUCTION HARDWARE OVERVIEW SOFTWARE OVERVIEW EXAMPLE SOFTWARE PACKAGE LIST SOFTWARE SETUP SYSTEM REQUIREMENTS SOFTWARE INSTALLATION, READS R-535J START UP CONFIGURING READS51 AND INITIATING HOST-TO-BOARD COMMUNICATIONS VERIFYING THAT THE MONITOR IS LOADED OPERATING NOTES POWER SERIAL PORT MEMORY CONFIGURATION SWITCHES LEDS JUMPER SELECTION EA\PE Analog-to-Digital Conversion SYSTEM HEADERS JP2, Ports JP6, Address and Data Lines THE 80C535 MICROCONTROLLER OVERVIEW C535 PINOUT BLOCK DIAGRAM SPECIAL FUNCTION REGISTERS INTERRUPT SOURCES THE 80C535 ON-CHIP FACILITIES PARALLEL INPUT/OUTPUT PORTS THE ANALOG-TO-DIGITAL CONVERTER ADC SET UP ADC Start Wait for Conversion Completion Reading the Conversion Result THE ENHANCED TIMER TIMER 2 INPUT SELECTION TIMER 2 RELOAD OPERATIONS TIMER 2 COMPARE OPERATIONS TIMER 2 CAPTURE OPERATIONS INTERFACING THE MICROCONTROLLER SYSTEM SIMPLE INPUT / OUTPUT CIRCUITS SIMPLE MOTOR CIRCUIT FLASH SOFTWARE WITH THE R535J QUICK START AND OVERVIEW FLASH SOURCE RUNNING FLASH WRITE THE APPLICATIONS PROGRAM ASSEMBLE AND RUN THE APPLICATIONS PROGRAM...26

5 FAMILY CHIP MANUFACTURERS SOFTWARE VENDORS BILL OF MATERIALS LIST OF MATERIALS R-535J COMPONENT CROSS REFERENCE SYSTEM BLOCK DIAGRAM AND CIRCUIT DIAGRAMS...33

6 1 INTRODUCTION The R-535J board with READS (RIGEL s Embedded Applications Development System) constitutes a complete system for developing embedded control applications. Efficient software development and rapid hardware prototyping are combined in a single integrated development environment. The R-535J board is programmable in Assembly, Basic, C, and Forth. We also offer a fuzzy logic software package, FLASH, for programming the A list of software vendors for Basic, "C", and Forth applications is given in Section Hardware Overview R-535J uses the 80C515/80C535 microcontroller in the 68-pin PLCC package. The instruction set of this microcontroller is the MCS-51 instruction set. The R-535J uses external RAM during the development cycle. Once an application program is developed, it may be permanently placed in EPROM. With an application-specific program installed, the R-535J may be used as an embedded controller. The R-535J has 12 terminal blocks connected to Port 1 and 4 bits of Port 3. Each port may be used as either an input or an output port. These ports are also available on the 32-pin header JP2. This header also contains general input/output ports P1 and P5. Port 6, which may be used for either analog or digital inputs, terminates at a header JP3. The 32-pin header JP6 contains the system signals: the demultiplexed data and address lines, and the control signals RD\, WR\, ALE, PSEN, TXD, RXD, RST (Reset), and READ\ (RD\ and PSEN ANDed). These signals simplify the addition of memorymapped input/output circuitry. The R-535J board: 80C535 microcontroller (68-pin PLCC) Boolean processor 3 timers which can also be used as interrupt sources A Watchdog timer On board Analog to Digital converter 32K SRAM 32K of monitor EPROM 12 screw-type terminal blocks connected to general purpose digital I/O ports 28 total I/O bits All system signals are available on two 32-pin headers Two-way reset feature allows user programs to be placed in low memory, giving access to all interrupt vectors Fully duplex serial port terminates at a DB9 connector Power supplied to the board by way of a 2 position terminal block Power on LED Board operates on +5 volts Operating temperature 0 to 70C Machine screw sockets under all IC s Board size 3.75" by 5"

7 1.2 Software Overview READS51, version 3.00, is Rigel Corporation s Integrated Development Environment for the 8051 family of processors. READS51 constitutes a complete system for developing embedded control applications when used with Rigel Corporation's 8051 boards. Efficient software development and rapid hardware prototyping are combined in a single integrated development environment. READS51 includes an editor, a hostto-board communications system, and an assembler. READS51 is completely rewritten in native 32-bit code to run on Windows95 and WindowsNT. READS51 includes a sophisticated project management system to simplify code reusability and version control. READS51 supports a full debugger. The debugger allows you to step through your code with breakpoints and variable watches as the compiled code runs on the target board, similar to the operation of an in-circuit emulator. The READS51 software has the following distinctive features: Project management for organized software development Archive storage for source code modules Multiple project management with drag and drop module transfers Enhanced graphical user interface for easy monitoring Stand alone compiler and editor applications connected to READS51 in a client/server fashion The 8051 boards are designed to communicate with a PC (IBM PC or compatible) acting as a host. The host-to-board communications are carried out through a serial port (COM1 - COM4). The host-based development system READS is a menu-driven environment with an editor, assembler, debugger, and PC-to-board communications software. The monitor program (RROS) includes a monitor system and user-accessible system calls for control and communication support. The RROS monitor may be used to communicate with an ASCII terminal when the PC host is unavailable. The source code of the user-accessible systems calls is provided. These routines as well as all examples in the User's Guide and on the distribution disk may be used or incorporated into applications by the registered buyer without any royalties, fees, or limitations. Rigel Corporation is not responsible for the suitability or correctness of the example software. Refer to the warranty for additional information. The development boards use the 8051 family of microcontrollers. The instruction set of these microcontrollers is the MCS-51 instruction set. The boards use external RAM during the development cycle. Once an application program is developed, it may be permanently placed in EPROM. With an application-specific program installed, the board may be used as an embedded controller. 1.3 Example Software Tutorial source code is provided to experiment with the capabilities of the R-535J board and READS. Examples are designed to illustrate the features of the 8051 family of microcontrollers, specifically digital and serial input/output, timers and counters, analogto-digital conversion, and interrupt logic. The example software may be found on the READS disk. Please refer to the comments embedded in the programs for further information. 2

8 Users are encouraged to modify the circuit diagrams and example software in developing their own specific applications. The source code of the user-accessible systems calls, as well as all examples on the distribution disk may be used or incorporated into applications by the registered buyer without any royalties, fees, or limitations. Rigel Corporation is not responsible for the suitability or correctness of the example software. Refer to warranty for additional information. 1.4 Package List Your R-535J / READS package includes the following: 1. R-535J with an 80C R-535J User s Guide 3. READS 4. READS User s Guide 5. Source code for user-accessible system calls 6. Example software on READS disk 7. Assembly instructions and parts package (for unassembled kits only). A serial modem cable with a male DB9 connector and a well regulated 5 volt 500mA power source are to be supplied by the user. 3

9 2 SOFTWARE SETUP 2.1 System Requirements READS51 is designed to work with an IBM PC or compatible, 486 or better, running Windows 95 or Windows NT. 2.2 Software Installation, READS51 Place the CD-ROM in your drive. Go to the Rigel Products 8051 Software READS51 and select whether you wish to use the DOS or the WIN95/NT version of the software. Click on the exe file and the program will begin to load in your system. Follow the standard install directions answering the questions with the appropriate answers This user s manual is for the WIN95/NT version of the software. The DOS User s Manual can be found on the CD-ROM. 2.3 R-535J Start up Check to make sure jumpers are in the EA# and in the PE# header. Connect the R-535J to the PC host via a modem cable. Connect the R-535J to a well-regulated 5-Volt supply. The HOST (red) LED should turn on when power is connected. Run the READS51 host driver by selecting Start Programs READS51. You may also start READS51 by double clicking on the READS51 short cut icon if installed. 2.4 Configuring READS51 and Initiating Host-to-Board Communications 1. Press the Projects New Executable a new project window will open where you can select the board and processor you are using. 4

10 2. Select the communication port parameters using the Options TTY Options menu command. You will need to select the COM port you are using, and the baud rate. 3. Open the TTY window using the Tools TTY menu command. 4. You can confirm the board is working by pushing the reset button on the board. The appropriate processor should show in the TTY window monitor program 2.5 Verifying that the Monitor is Loaded Make sure the TTY window is active, clicking the mouse inside the TTY window to activate it if necessary. Then type the letter H (case insensitive) to verify that the monitor program is responding. The H command displays the available single-letter commands the monitor will recognize. The READS monitors use single-letter commands to execute basic functions. Port configurations and data, as well as memory inspection and modifications may be accomplished by the monitor. Most of the single-letter commands are followed by 4 hexadecimal digit addresses or 2 hexadecimal digit data bytes. The list of monitor commands is displayed with the H command while the monitor program is in effect. The H command displays the following table. 5

11 B xxxx sets Break point at address xxxx C xxxx-xxxx displays Code memory D xx-xx displays internal Data ram D xx=nn modifies internal Data ram D xx-xx=nn fills a block of internal Data ram G xxxx Go - starts executing at address xxxx H Help - displays monitor commands K Kills (removes) break point L down Loads Intel hex file into memory P x displays data on Port x P x=nn modifies data on Port x to nn R displays the contents of the Registers S displays Special function register addresses S xx-xx displays Special function registers S xx=nn modifies Special function registers S xx-xx=nn fills Special function registers X xxxx-xxxx displays external memory X xxxx=nn modifies external memory X xxxx-xxxx=nn fills external memory A single-letter command may be followed by up to 3 parameters. The parameters must be entered as hexadecimal numbers. Each x above represents a hexadecimal digit (characters 0..9, A..F). Intermediate spaces are ignored. Alphabetic characters are converted to upper case. The length of the command string must be 16 characters or less. The command syntax is: Letter [address][-address][=data]<cr>. 6

12 3 OPERATING NOTES R-535J uses the 80C515/80C535 microcontroller in the 68-pin PLCC package. The instruction set of this microcontroller is the MCS-51 instruction set. The R-535J uses external RAM during the development cycle. Once an application program is developed, it may be permanently placed in EPROM. With an application-specific program installed, the R-535J may be used as an embedded controller. The R-535J has 12 terminal blocks connected to Port 1 and 4 bits of Port 3. Each port may be used as either an input or an output port. These ports are also available on the 32- pin header JP2. This header also contains general input/output ports P1 and P5. Port 6, which may be used for either analog or digital inputs, terminates at a header JP3. The 32- pin header JP6 contains the system 80C535 signals: the demultiplexed data and address lines, and the control signals RD\, WR\, ALE, Figure 1. Top Overlay of the R-535J Board PSEN, TXD, RXD, RST (Reset), and READ\ (RD\ and PSEN ANDed). These signals simplify the addition of memory-mapped input/output circuitry. 3.1 Power Power is brought to the R-535J board by a two-position screw-type terminal block, JP1. A well-regulated 5V DC source is required. The (+) and (-) terminals are marked on the board. Note that a diode is placed across the input in reverse. If the power is applied to the R-535J board in reverse polarity, the diode will short the power supply attempting to prevent damage to the board. HOST RS-232 Q1 Q2 PN2907 Rigel Corporation Gainesville, FL R535J v1.01 Copyright <c> Serial Port P1 of the R-535J is a DB-9 female connector used to connect the board to an IBM compatible PC. A minimal serial port is constructed with just 3 lines: transmit, receive, and ground, disregarding all hardware handshake signals. A straightthrough modem cable may be used. That is a cable connecting pin 2 of the R-535J to pin 2 of the host, and similarly pin 3 to pin 3, and pin 5 to pin 5. U PN N4001 1N4148 1N uF 5VDC Figure 2. Serial Port and Power Connector JP1 7

13 3.3 Memory Configuration The board has 64 Kilobytes of memory, of which 32K is EPROM and 32K is static RAM. Program memory and external data memory are decoded to overlap. In this configuration, programs may be downloaded from the PC host and placed in RAM as data, and subsequently executed as program instructions. The 8031 family of microcontrollers address 64K of program. The microcontroller may read from both external data memory and external code memory using the movx and movc instructions. The microcontroller may write to external data memory but may not write to external code memory. The microcontroller pin Program Segment Enable (PSEN#) is activated (made logic 0) when a byte is to be read from external program memory, and pin Read (RD#), when a byte is to be read from external data memory. By combining these signals by an AND gate (PSEN# AND RD#), the same physical 64K memory block is made to appear as both external code and data memory. The R-535J configuration overlaps external data and code memory blocks by combining PSEN# and RD# in this manner. This allows downloading and running programs on the R-535J. The pound sign (#), when used as a suffix signifies that the signal is active when low. For example, external memory is enabled when the EA# line is held at logic low (close to ground voltage). R-535J has two 28-pin sockets U1 and U2. Each socket holds 32K of memory. Socket U1 accepts a 27C256 EPROM, U2 accepts a 62C256 static RAM, or a battery backed RAM. U1 is mapped as the lower half of memory, [0..7FFFh] and U2 holds the higher half of memory [8000h..FFFFh] in the HOST mode. In the RUN mode, the high and low 32K memory blocks are swapped. That is, U1 is decoded to be the high memory block and U2, the low memory block. The reset button RUN (S2) is used when downloaded programs need direct access to the interrupt vectors located in low memory. Such a program, with its origin at 0, is first downloaded into a RAM device placed in U2 then the button RUN (S2) is pushed. Now the program in U2 is in the low memory block, starting at address 0. The user program may then have direct access to all interrupt vectors. 3.4 Switches The R-535J has two reset buttons labeled HOST and RUN. They both reset the microcontroller. They differ in configuring the memory devices. Pressing HOST causes the EPROM in socket U1 to occupy the lower 32K of memory, and the static RAM in socket U2 to occupy the higher 32K of memory. This is also the configuration when the power is first applied to the board. With this configuration, the microcontroller executes the monitor program in the EPROM. VGND 10K D3 HOST 470 U U A A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Figure 3. Memory S2 S1 D RUN RST PSEN READ ALE TXD RXD RD WR D7 D6 D5 D4 D3 D2 D1 D Figure 4. Push Buttons and LEDs 8

14 Pressing the RUN button causes the EPROM in socket U1 to occupy the higher 32K of memory, and the static RAM to occupy the lower 32K of memory. If a user program was previously downloaded into RAM, pressing RUN transfers control to the user program. This is useful if the user program needs access to the interrupt vectors located in low memory. 3.5 LEDs There are two LEDs on the R-535J. The HOST LED (red) and the RUN LED (green). They indicate the current reset mode. 3.6 Jumper Selection EA\PE When using the 80C535 on the R-535J board jumpers should be inserted into EA\, and PE\ GND positions. This connects EA\ and PE\ to GND, and is the default configuration. The R-535J may also be used with a 80C515 microcontroller that has a user program in internal ROM. When using the internal ROM on the 80C515, jumper EA\ should connect this signal (EA\ stands for External Enable) to Vcc, not to Ground. The Ground position is denoted on the R-535J board as GND. The other jumper connects PE\ (Power down mode Enable) to ground Analog-to-Digital Conversion The two jumpers JP7 and JP8 are used in conjunction with the analog-to-digital converter of the 80C535 microcontroller. Inserting JP7 and JP8 connects the analogto-digital converter reference voltages VAGND and VAREF to Ground (GND) and Vcc (5 Volts DC) respectively. If other reference voltages are to be used, connect the top posts (the posts closer to the LEDs) to the desired reference voltages. 3.7 System Headers All ports and system signals are available on two 32-pin jumper headers marked JP2 and JP6. The pin assignments are given below. Refer to the circuit diagram for additional information D3 HOST 470 JP4 JP5 S2 JP2 S1 EA PE GND D4 RUN 12MHZ 80C535 U7 10K VREF JP8 JP7 VGND 74HC573 PORT6 JP3 GND GND Figure 5. Jumpers U6 10K U2 JP6 JP5 GND VCC P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P3.2 P3.3 P3.4 P4.6 P4.7 JP VCC GND U7 U6 U2 U1 A A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RST PSEN READ ALE TXD RXD RD WR D7 D6 D5 D4 D3 D2 D1 D0 Figure 6. JP2 and JP6 Headers 9

15 3.7.1 JP2, Ports Signal Pin Pin Signal Ground 1 2 P5.0 Vcc 3 4 P5.1 P P5.2 P P5.3 P P5.4 P P5.5 P P5.6 P P5.7 P P4.0 P P4.1 P P4.2 P P4.3 P P4.4 P P4.5 P Vcc P Ground JP6, Address and Data Lines Signal Pin Pin Signal D0 1 2 A0 D1 3 4 A1 D2 5 6 A2 D3 7 8 A3 D A4 D A5 D A6 D A7 WR\ A8 RD\ A9 RXD A10 TXD A11 ALE A12 READ A13 PSEN A14 RESET A15 10

16 4 THE 80C535 MICROCONTROLLER 4.1 Overview The Siemens SAB80C535 is an enhanced member of the 8051 family of microcontrollers. The 80C535 is based on the CMOS technology which typically reduces power requirements compared to the non-cmos devices. Lower power needs imply cooler running microcontrollers which may be pushed to run at higher clock speeds. Unlike the early member of the family, almost all microcontrollers of today are available as CMOS devices. The 80C535 has gained much popularity among design engineers due to a number of high-performance features sought after in many embedded control applications. These features are more ports, a versatile analog-todigital converter, an enhanced Timer 2, a watchdog timer, and sophisticated powersaving modes. The 80C535 is fully compatible with the That is, it uses the same instruction set, the MCS-51 assembly language. The new on-chip facilities are controlled and monitored through additional SFRs. The 80C535 has all the SFRs of the 8051, and thus may run any program written for the 8051, with the exception of the use of the interrupt priority register IP. The SFR addresses for the two interrupt priority registers IP0 and IP1 in the 80C535 are different than the address of the interrupt priority register IP of the Note that IP0 is bitwise compatible with IP, that is bit 0 of both registers determine the priority of the external interrupt 0, bit 1, timer 0 interrupts, and so on. Although IP is bit addressable, IP0 of the 80C535 is not bit addressable. Therefore, if an 8051 program uses interrupt priorities, it must be modified before running on the 80C535. That is, any instruction referring to IP (address B8h) must be revised to refer to IP1 (address (A9h). Moreover, if the 8051 program uses bit-oriented operations to manipulate the interrupt priority bits, the code must be revised to manipulate the bits by masking IP0 and modifying it by byte-oriented operations. It must be mentioned, however, that the interrupt priorities are seldom changed within a program. The availability of more interrupt sources and priorities in the 80C535 easily justify the modifications needed to existing 8051 code C535 Pinout The 80C535 comes in a 68-pin Plastic Leaded Chip Carrier (PLCC) package, as shown below. All properties of the 8051 apply to the 80C535. RESET VAREF VAGND P6.7 P6.6 P6.5 P6.4 P6.3 P6.2 P6.1 P6.0 RxD / P3.0 TxD / P3.1 INT 0 / P3.2 INT 1 / P3.3 TO / P3.4 T1 / P3.5 P4.7 P4.6 P4.5 P4.4 P PE# P4.2 P4.1 P C535 80C515 Vcc P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P P5.7 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 EA ALE PSEN P2.7 P2.6 P2.5 P2.4 P2.3 WR / 3.6 RD / P3.7 T 2 / P1.7 CLKOUT / P1.6 T2 EX / P1.5 INT 2 / P1.4 CC3 / INT 6 / P1.3 CC2 / INT 5 / P1.2 CC1 / INT 4 / P1.1 CCO / INT 3 /P1.0 Vcc Vss XTAL 2 XTAL 1 P2.0 P2.1 P2.2 11

17 4.3 Block Diagram XTAL1 XTAL2 OSC and Timing RAM 256X8 ROM 8K x 8 (SAB80C515) Vcc Vss CPU P 0 8 Port 0 8-bit RESET# EA# PE# ALE PSEN# Watchdog P 1 8 Port 1 8-bit Timer 0 Timer 1 P 2 8 Port 2 8-bit Timer 2 P 3 8 Port 3 8-bit Serial Port Baud Rate Generator P 4 8 Port 4 8-bit Port 6 8-bit P6 P 5 8 Port 5 8-bit AN MUX S&H A/D V AREF V AGND Programmable Ref. Voltages The Block Diagram of the 80C535 Microcontroller For more detailed information the reader is referred to the product data books. Before the additional features of the 80C535 are discussed, the SFRs of the 80C535 are compared to those of the Special Function Registers Address C P0 P0 P0 81 SP SP SP 82 DPL DPL DPL 83 DPH DPH DPH 87 PCON PCON PCON 88 TCON TCON TCON 89 TMOD TMOD TMOD 8a TL0 TL0 TL0 8b TL1 TL1 TL1 8C TH0 TH0 TH0 8D TH1 TH1 TH1 12

18 90 P1 P1 P1 98 SCON SCON SCON 99 SBUF SBUF SBUF A0 P2 P2 P2 A8 IE IE IEN0 A9 IP0 B0 P3 P3 P3 B8 IP IP IEN1 B9 IP1 C0 IRCON C1 CCEN C2 CCL1 C3 CCH1 C4 CCL2 C5 CCH2 C6 CCL3 C7 CCH3 C8 T2CON T2CON CA RCAP2L CRCL CB RCAP2H CRCH CC TL2 TL2 CD TH2 TH2 D0 PSW PSW PSW D8 ADCON D9 ADDAT DA DAPR DB P6 E0 ACC ACC ACC E8 P4 F8 P5 The 80C535 SFRs P4, P5, and P6 are associated with the additional ports; SFRs ADCON, ADDAT, and DAPR are associated with the analog-to-digital converter; and SFRs CCEN, CLx and CCHx, are associated with the enhanced features of Timer 2. The additional on-chip facilities introduce new interrupt sources. Thus, the interrupt enable (IE) and interrupt priority (IP) SFRs of the 8051 are insufficient. The 80C535 uses two interrupt enable (IE0 and IE1) and two interrupt priority registers (IP0 and IP1). IRCON is the interrupt request control SFR. Note that, 8051 code which manipulates the 8051 interrupt priorities will not change priorities, but will incorrectly affect the interrupt enable control bits of the additional interrupt sources. Therefore, care should be taken in using 8051 programs for the 80C

19 4.5 Interrupt Sources The 8051, 8052, and 80C535, have 5, 6, and 12 interrupt sources, respectively. Each interrupt source, when acknowledged, causes a long jump to a fixed location in code memory. The address of this location is referred to as an interrupt vector. The interrupt sources and the corresponding vectors are listed below. The interrupt vectors point to low ROM addresses. Source Vector C535 IE0 0003h X X X TF0 000Bh X X X IE1 0013h X X X TF1 001Bh X X X RI(0)+TI(0) 0023h X X X TF2+EXF2 002Bh X X IADC 0043h X IEX2 004Bh X IEX3 0053h X IEX4 005Bh X IEX5 0063h X IEX6 006Bh X 14

20 5 THE 80C535 ON-CHIP FACILITIES 5.1 Parallel Input/Output Ports The SAB 80C535 has 6 parallel input/output ports, and a seventh port (Port 6) which can be used as a digital input port or as the 8 analog inputs to the analog-to-digital converter. Ports 0 to 3 as well as Ports 4 and 5 are similar in operation to the four 8051 ports. The SFR 0DBh is used to read the (digital) value of Port 6 as a byte. In order to read the analog voltage on one of the Port 6 bits, the Analog-to-Digital Converter (ADC) is run with the bit address provided to the ADC. The result is then available in the ADC data register, named ADDAT. Although the 80C535 Ports 0 to 3 are identical to the 8051 ports, additional features of the 80C535 uses some port bits in their alternate functions, as shown below. Bit Alternate Function Mnemonic/Designation P1.0 External Interrupt 3 and Capture 0 INT3# / CC0 P1.1 External Interrupt 4 and Capture 1 INT4# / CC1 P1.2 External Interrupt 5 and Capture 2 INT5# / CC2 P1.3 External Interrupt 6 and Capture 3 INT6# / CC3 P1.4 External Interrupt 2 INT2# P1.5 Timer 2 External Trigger T2EX P1.6 Clock Output CLKOUT P1.7 Timer 2 Input T2 P3.0 Serial Input Port RXD P3.1 Serial Output Port TXD P3.2 External Interrupt 0 INT0# P3.3 External Interrupt 1 INT1# P3.4 Timer/Counter 0 External Input T0 P3.5 Timer/Counter 1 External Input T1 P3.6 External Memory Write Strobe WR# P3.7 External Memory Read Strobe RD# In order to implement the alternative function, the corresponding SFR bit must be set (made equal to 1). 5.2 The Analog-to-Digital Converter Perhaps the most attractive feature of the 80C535 is its Analog-to-Digital Converter (ADC). The ADC has 8 input channels, physically connected to Port 6 pins. The ADC uses three SFRs. The ADC control register ADCON specifies the input bit address (multiplexer address) and the ADC mode. It also contains the status bit BSY which is set (1) while the conversion is in progress. The result of a conversion is placed in the ADC data register, ADDAT. The ADC is a radiometric converter that uses successive approximations to obtain the digital values. Two reference voltages are externally provided to the 80C535: the reference voltage VAREF and the ground voltage VAGND. The reference voltage VAREF has to be provided by the user and is fixed at 5 volts. However, the external fixed reference voltage VAREF and VAGND have corresponding internal voltages IVAREF and IVAGND which are programmable. The upper and lower internal reference voltages against which the applied input voltage is compared may be programmed to VAREF or VAGND, or to a fraction of these voltages. This is done by 15

21 programming the internal digital-to-analog converter control register DAPR. However, care should be taken to program IVAREF to be at least 1.25 volts higher than IVAGND. This feature enables two additional successive approximations to be carried out in software, allowing 9 bits or 10 bits of resolution. The ADC may be programmed to operate in a one-shot mode or in a continuous mode. The ADC sets the status bit flag IADC of the interrupt request control register IRCON. If not masked by the interrupt enable register, an Analog-to-digital conversion causes an interrupt upon completion. There are four general steps involved in analog-to-digital conversion. The first task is set up, followed by the conversion start instruction, wait for conversion completion, and finally, reading the conversion results. 5.3 ADC Set Up Three tasks need to be performed: set up the reference voltages, select the input channel, and select the conversion mode. The high and low nibbles of the DAPR register program the internal reference (IVAREF) and internal analog ground voltages (IVAGND). These internal reference voltages are functions of the external reference voltages applied to the microcontroller. The following formulas are used to compute the internal reference voltages. IVAGND = VAGND + DAPRL 16 (VAREF-VAGND) where DAPRL is the low nibble of the SFR DAPR. DAPRL must be between 1 and 12, inclusively. Similarly, IVAREF = VAGND + DAPRH 16 (VAREF-VAGND) where the high nibble DAPRH of DAPR is between 4 and 15, inclusively. When DAPRH=0, IVAREF is set to VAREF, and when DAPRL=0, IVAGND is set to VAGND. The next task is to specify the analog input channel. The channel address, between 0 and 7, is written to the lower three bits of the ADC control register ADCON. Finally, the ADC mode is specified by setting or clearing the mode control bit flag ADM, bit 4 of the ADCON register. If ADM is cleared, the ADC stops after one conversion. If set, the conversion is repeated until the ADM flag is cleared ADC Start The 80C535 ADC starts when a byte is written to the DAPR register. Any ongoing conversion is aborted, and the new conversion commences with the next machine cycle. If the analog channel and the mode are already programmed into the bits of register ADCON, writing the internal reference voltage program control nibbles into DAPR starts the conversion. 16

22 5.3.2 Wait for Conversion Completion The status bit BSY of ADCON is set while the conversion is in progress. The application program may poll this bit and read the value when BSY is cleared. Alternatively, the ADC interrupt may be used to read the value upon conversion completion Reading the Conversion Result The result of the analog-to-digital conversion is stored in the ADDAT register. The result remains in ADDAT until a new conversion writes over the old result. The value is read in the usual manner, by directly addressing the SFR. 5.4 The Enhanced Timer 2 The 80C535 Timer 2 has evolved into a sophisticated timer/counter facility, called the Programmable Timer/Counter Register Array (PTRA). Timer 2 of the 80C535 is not compatible with Timer 2 of the Timer 2 of the 80C535 is an enhanced version of the Timer 2 of the The bit fields in SFRs of the two timers are not compatible. In the PTRA unit, the low and high bytes of the compare/reload/capture registers are referred to as CRCL and CRCH. The PTRA unit contains 3 pairs of compare/capture registers, referred to as the CC1, CC2, and CC3. Note that reload operations may only transfer the contents of CRC registers to the count registers T2L and T2H. Conceptually, CRC registers may also be considered as CCx registers, with the additional reload capability. The various operating modes of the PTRA are selected by the control register named compare/capture enable register (CCEN). Timer 2 overflow causes an interrupt, which if enabled, may be used to periodically call a service routine. The four pairs of compare/capture registers of Timer 2 may be considered as 16-bit registers, since the low and high byte registers are affected together. There are two primary functions of the PTRA unit: compare the current count to a value stored in one of the 4 compare/capture data registers and transfer (capture) the current count into one of the four compare/capture data registers. Each compare/capture register can generate a signal which indicates the result of the comparison. Similarly, captures into the four compare/capture registers may be triggered upon external signals applied to the microcontroller. Four pins of Port 1 are used to output compare outputs or capture inputs, as given above. The operation of the PTRA unit is controlled by two control registers: the Timer 2 control register T2CON and the compare/capture enable register CCEN. The bits of T2CON are shown below. T2PS I3FR I2FR T2R1 T2R0 T2CM T2I1 T2I0 CCEN consists of 4 pairs of bits. Bits 0-1, 2-3, 4-5, and 6-7 control compare/capture registers 0, 1, 2, and 3, respectively. 5.5 Timer 2 Input Selection Timer 2 of the PTRA unit may be used as a counter or a timer. In the counter mode, the input is the signal applied to pin T2 (Port 1.7). In the timer mode, the count is incremented every machine cycle (every 12 oscillator cycles). Optionally a divide-bytwo prescaler may be engaged by setting control bit T2PS, bit 7 of T2CON. Bits T2CON.1 and T2CON.0, also referred to as T2I1 and T2I0, are the Timer 2 input control bits. 17

23 T2I1 (T2CON.1) T2I0 (T2CON.0) Selected Input 0 0 No Input 0 1 Timer Function 1 0 Counter Function 1 1 Gated Timer Function i.e., Timer Function while bit 7 of Port 1 (T2) is Timer 2 Reload Operations Timer 2 reload refers to transferring the data in CRCL and CRCH to the low and high count registers T2L and T2H, respectively. CRC data registers may be viewed as CCx registers with the additional reload capability. Two bits of T2CON, T2R1 and T2R0, determine the reload mode. T2R1 (T2CON.4) T2R0 (T2CON.3) Reload Mode 0 0 No Reload Action 0 1 No Reload Action 1 0 Reload Mode 0: Reload upon Timer 2 Overflow 1 1 Reload Mode 1: Reload upon Falling Edge of External Signal at pin T2EX (bit 5 of Port 1) Reload is especially useful when generating periodic signals. When T2 is used as a timer with reload upon overflow, the reload value determines the period between successive overflows. An interrupt service routine may be called every time an overflow occurs. Thus, the reload value determines the frequency of calling this routine. 5.7 Timer 2 Compare Operations All four Timer 2 compare/capture (CC and CRC) registers may be used to generate signals on dedicated pins of Port 1. These signals are generated when the count in T2L and T2H reach the values stored in the CRC or CC registers. The compare operation is useful in, among other things, generating pulse-width-modulated signals. The compare status, i.e., whether the current count reached the value in the compare register, is available on a microcontroller pin. Thus, the compare value in a CC register determines the duty cycle of the signal on such a pin. Bit T2CM of the Timer 2 control register T2CON determines the mode of the compare operation. When T2CM is cleared, mode 0 is selected. In this mode, the compare output signal completes a positive pulse upon Timer 2 overflow. That is, when T2L and T2H reach the value in CCxL and CCxH, the corresponding output is made 1. The compare signal is cleared to 0 when Timer 2 overflows. In mode 0, the output at pins P1.0 to P1.3 are driven by the compare result of registers CC0 to CC3 with Timer 2. In mode 1, a two-stage latch is engaged. Software may write to one of the pins P1.0 to P1.3. The new value is not transferred to the pin until the count in T2L and T2H reaches the compare value in CCx. Thus, the polarity of the pulse on pins CC0 to CC3 (P1.0 to P1.3) may be determined by software. 18

24 5.8 Timer 2 Capture Operations The capture operation refers to transferring the current count in T2L and T2H into one of the CC or CRC registers. There are two capture modes: capture upon external signal or upon a software instruction. In mode 0, a positive transition on pins P1.1 through P1.3 causes the current count to be copied into the corresponding CC register. Mode 0 may also be implemented with the CRC registers. In this case, either a positive or a negative transition may trigger the capture. The polarity of the trigger is determined by the control bit I3FR (bit 6 of Timer 2 control register T2CON). Capture is triggered by a positive transition when I3FR is set. Capture mode 1 allows software to trigger the operation. Any instruction which writes a byte to the CCxL register triggers the capture. The write instruction is not actually performed, thus, the value written into the register is irrelevant. The capture modes are specified by the Compare/Capture Enable register CCEN. CCEN consists of 4 pairs of bits. Bits 0-1, 2-3, 4-5, and 6-7 control the CRC and compare/capture registers CC1, CC2, and CC3, respectively. Table 1.5 gives the definition of these bit pairs. Control Bits Mode 0 0 Compare/Capture Disabled 0 1 Capture on External Signal at pins P1.0 through P Compare Enabled 1 1 Capture by "Write Instruction" to CRC or CC1 through CC3 registers 19

25 6 INTERFACING THE MICROCONTROLLER SYSTEM 6.1 Simple Input / Output Circuits The following figure give simple input and output circuits which may be built on a breadboard, and interfaced with the microcontroller. Analog inputs are typically obtained by a potentiometer. In some applications it is desirable to have diode clamps to prevent the analog input voltage to exceed VCC or GND. VCC VCC DIGITAL INPUT DIGITAL OUTPUT VCC VCC To ANALOG Input ANALOG INPUT SPEAKER OUTPUT Simple User Input/Output Devices. 20

26 6.2 Simple Motor Circuit A simple motor control circuit may be interfaced with the microcontroller in the following manner Volts R2 15K Motor C2 1000uF C3 10nF R1 1K C1 1uF Q1 TIP 120 D1 1N4001 DC motor control. The Port may be pulsed with a varying duty cycle to change the speed. 21

27 7 FLASH SOFTWARE WITH THE R535J This section discusses using Rigel s Fuzzy Logic Software with the R-535J board. The DOS based software, FLASH may be purchased as a seperate item from Rigel Corporation. If you re interested in learning more about our Fuzzy Logic software you may download the User s Manual from our web site, The software is sold with a user s manual and a booklet called "Fuzzy Logic Control with Microcontrollers". 7.1 Quick Start And Overview This tutorial gives step-by-step instructions to implement a simple fan speed controller example given in the book Fuzzy Logic Control with Microcontrollers. Control Task The fan voltage, in the interval 0 to 120 volts, is determined by the ambient temperature. Temperature is measured by an analog-to-digital converter and represented by the byte (t). The input linguistic variable TEMPERATURE has three terms: COLD, WARM, and HOT, as given below COLD( t) t Figure 1. The Term COLD WARM( t ) t Figure 2. The Term WARM. 22

28 HOT( t) t Figure 3. The Term HOT. The output linguistic variable FANSPEED has three singleton terms, OFF, LOW, and HIGH, with values 0, 60, and 120, respectively. The controller has three simple rules. R1: if (TEMPERATURE is COLD) then (FANSPEED is OFF) R2: if (TEMPERATURE is WARM) then (FANSPEED is LOW) R3: if (TEMPERATURE is HOT) then (FANSPEED is HIGH) When the centroid defuzzification method is used, the fan voltage as a function of the temperature value (t) is obtained as follows FS( t) t Figure 4. Fan Voltage as a Function of Temperature Value (t). For a further discussion, refer to the book "Fuzzy Logic Control with Microcontrollers." 7.2 FLASH Source The following is the source code for FLASH. It specifies the input, the output, the terms, the rules, and the options. The input is specified to be in internal register 0E0h, and the computed output is requested to be placed in internal register 0E1h. For more information on the input syntax, refer to FLASH USER S GUIDE. 23

29 ; FLASH example 10/27/93 ; ; file FAN.F ; Fan Speed Control - example discussed in the manual ; options #define centroid #define p8032 ; --- inputs ---- #input byte Temperature register 0E0h ; --- outputs --- #output byte Fan_Speed register 0E1h ; all the terms consist of 4 data points {a, b, c, d} ; (trapezoidal shapes) ; --- terms for Temperature --- #term COLD (Temperature) { 0, 0, 90, 110 } #term WARM (Temperature) { 90, 110, 190, 210 } #term HOT (Temperature) { 190, 210, 255, 255 } ; --- term for Fan_Speed (output singletons) --- #term OFF (Fan_Speed) { 0} #term LOW (Fan_Speed) { 60} #term HIGH (Fan_Speed) {120} ; --- definitions of rules --- #rule if Temperature is COLD then Fan_Speed is OFF #rule if Temperature is WARM then Fan_Speed is LOW #rule if Temperature is HOT then Fan_Speed is HIGH The source code "FAN.F" is included in the distribution disk. 7.3 Running FLASH Invoke FLASH from the DOS command line and specify the filename. Specify that the program will be run with READS by setting the command line flag -e. At the DOS prompt, type, FLASH fan -e FLASH generates the file FAN.ASM which contains information about the control task. This file is to be included in the applications program. 24

30 7.4 Write the Applications Program The applications program places the inputs into the specified registers and calls the FLASH routines. The subroutine FlashPoll, which is generated in FAN.ASM computes all outputs in sequence. FLASH computes the outputs and places them at the specified addresses. The applications program reads these outputs and uses them accordingly. The applications program called "FANMAIN.ASM" is included in the distribution disk. FANMAIN simply asks the user to input a temperature value (t). The value is interpreted as a two digit hexadecimal value. FANMAIN the calls FlashPoll to compute the output. FANMAIN displays the output as a two-digit hexadecimal number. ; ; Fuzzy-Logic Code Generator Sample Code ; Demonstrates the use of FLASH with R31/R31J/R535J ; ; Climate Control Example ; ; Last Update:5/30/93 ; ; =================================================================== ; m a i n p r o g r a m ; ; system calls registers used ; crlf equ 0115h ; a getbyt equ 011eh ; a, b print equ 0136h ; a, dptr prthex equ 013fh ; a, r2 Output equ 0380h ; FLASH routine ; org 8000h mainloop: lcall print ; print message db "temperature : ", 0 lcall getbyt ; get temperature high byte push acc lcall prthex ; echo high byte pop acc mov r0, #0E0h ; high byte address (in internal memory) a ; put high byte in register 0E0h lcall crlf lcall FlashPoll ; compute outputs lcall print ; print message db "Output (Fan Speed) : ",0 25

31 mov r0, #0E1h mov lcall prthex lcall crlf lcall crlf ljmp mainloop ; Fan Speed address is 0E1h (internal memory) ; get Fan Speed ; display on host ; endless loop ; --- include files #include fan.asm ; end of program 7.5 Assemble and Run the Applications Program Assemble and run FANMAIN from READS51. For more information on READS, refer to the READS51 USER S GUIDE. READS contains an editor, an assembler, and communications routines to download programs to RIGEL s evaluation and training boards. The board must be connected to a serial port. The basic steps to run FANMAIN under READS is listed below. 1. Start the READS software 2. Specify the source code to be FANMAIN.ASM 3. Set the communications options. The RIGEL evaluation boards use 9600 Baud, 8 data bits, 1 stop bit, and no parity 4. Assemble the applications program FANMAIN. 5. Invoke TTY (the communications environment) 6. Press RESET on the Board. The board will send a greeting message and a prompt. 7. Download FANMAIN.HEX. 8. Run FANMAIN specifying address 8000h. FANMAIN starts at 8000h (beginning of RAM), which is set by the org statement in FANMAIN.ASM. 9. Verify that the fuzzy logic control routines generate the correct outputs. See the table below. The output may be verified to confirm with Figure 4. The following table shows the output value all possible input values [0 to 0FFh]. Note that 3Ch is 60 decimal, and 78h is 120 decimal. 26

32 Table. Fan Speed Output as a function of Temperature (t) A B C D E F C 0E B 1E A 2D C 3C 70 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 80 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 90 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C A0 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C B0 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3C 3E C A 4D A 5C C 6F D E F

33 FAMILY CHIP MANUFACTURERS The following is a list of chip manufacturers. There are over a 100 varieties of 8051 processors on the market today. The 8051 family has about a 45% share of the 8-bit processor market. We recommend you call and ask for data books if you are interest in any of the chips we ve mentioned in this document. Atmel Corporation, 2125 O Nel Dr., San Jose, CA 95131, Telephone (800) Dallas Semiconductor, 4350 S. Beltwood Pkwy., Dallas, TX , Telephone (800) Intel Corporation, 2200 Mission College Blvd., Santa Clara, CA , Telephone (800) OKI Semiconductor, Inc., 785 N.Mary Ave., Sunnyvale, CA 94086, Telephone (800) Philips Semiconductors (Signetics), 811 E. Arques Ave., Box 3409, Sunnyvale, CA , Telephone (800) , BBS: (800) Siemens Components, Inc., Integrated Circuits Division, N. Tantau Ave., Cupertino, CA 95014, Telephone (800) ext Standard Microsystems Corporation, 80 Arkay Dr., Hauppauge, NY 11788, Telephone (516) Silicon Systems, Myford Rd., Tustin, CA , Telephone (714) Silicon Systems offers one chip at present, the 73D2910. This is a 8052 compatible that has been optimized for low power portable modem or communication applications. Please check out our WEB site at for the latest software updates. Other WEB sites you should check out are All of these sites provide free software, Intel and Siemens provide app notes, and data sheets as well. 28