An Upgraded ATLAS Central Trigger for 2015 LHC Luminosities

Transcription

1 An Upgraded ATLAS Central Trigger for 2015 LHC Luminosities ICALEPCS, Oct , San Francisco Christian Ohm on behalf of the ATLAS TDAQ Collaboration CERN Oct 10, 2013 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

2 Outline Outline 1 Introduction The Large Hadron Collider & ATLAS The ATLAS trigger and data acquisition system 2 The existing Level-1 Central Trigger systems Central Trigger Processor (CTP) Muon-to-CTP Interface (MUCTPI) 3 Upgrade plans Motivation for upgrade Hardware upgrade of CTP Firmware upgrade of the MUCTPI 4 Summary C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

3 Introduction Outline 1 Introduction The Large Hadron Collider & ATLAS The ATLAS trigger and data acquisition system 2 The existing Level-1 Central Trigger systems Central Trigger Processor (CTP) Muon-to-CTP Interface (MUCTPI) 3 Upgrade plans Motivation for upgrade Hardware upgrade of CTP Firmware upgrade of the MUCTPI 4 Summary C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

4 Introduction The ATLAS trigger and data acquisition system The ATLAS experiment at CERN s Large Hadron Collider The ATLAS experiment General-purpose detector: from precision SM measurements to Higgs and BSM searches Interested mainly in rare processes need to select most interesting collision events trigger system The Large Hadron Collider (LHC) Collides protons (and/or Pb ions) at 40 MHz in a 27-km tunnel Run I: : s = 7-8 TeV (pp) L 1033 cm 2 s 1 Run II starting in 2015: s for pp: TeV L & 1034 cm 2 s 1 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

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6 Introduction The ATLAS trigger and data acquisition system The trigger and data acquisition system in ATLAS The trigger system decides what collision events are saved for offline analysis! Three levels sequentially refine selection hardware software latency 2.5 µs rate Hz 7 khz 75 ms khz 1 s ~ 00 Hz Tracking Calo/Muon/Forward Detectors LVL1 CTP Event Filter (EF) LVL2 Event-Builder Data recording Pipeline Memories Readout Drivers (ROD) Readout Buffers (ROB) Full-event buffers, processor subfarms Typical rates for Run I above. Expected in Run II: 100 khz L1, 1 khz HLT. Level 1 hardware-based, custom electronics modules Synchronized with LHC collisions Reduced-granularity detector data Sends Region-of-Interest (RoI) info to Level 2 High-Level Trigger (HLT) software-based, runs on PC farm Level 2 uses full-granularity data in RoIs Event Filter uses more sophisticated reconstruction algorithms and full event information C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

7 The existing Level-1 Central Trigger systems Outline 1 Introduction The Large Hadron Collider & ATLAS The ATLAS trigger and data acquisition system 2 The existing Level-1 Central Trigger systems Central Trigger Processor (CTP) Muon-to-CTP Interface (MUCTPI) 3 Upgrade plans Motivation for upgrade Hardware upgrade of CTP Firmware upgrade of the MUCTPI 4 Summary C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

8 The existing Level-1 Central Trigger systems Overview of the Level-1 Trigger Calorimeters! RPC! TGC! Cluster! Processor! Pre-processor! Jet/Energy Processor! Barrel! muon! trigger! L1Muon! End-cap muon! trigger! Muon-to-CTP Interface! L1Calo! L1CT! Central Trigger Processor! TTC! TTC!! TTC! Sub-detector front-end/read-out electronics! C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

9 The existing Level-1 Central Trigger systems Central Trigger Processor (CTP) The Central Trigger Processor (CTP) LHC! 4 31! 4 31! 4 31! 28! CTPMI! CTPIN! CTPIN! CTPIN! CTPCAL! COM bus! PIT bus! CAL bus! What does the CTP do? CTPCORE! CTPMON! CTPOUT! CTPOUT! CTPOUT! CTPOUT! LVL2! DAQ! 5 LTP! 5 LTP! 5 LTP! 5 LTP! Modules (VME, 6U/9U) CTPMI: Machine Interface CTPIN: Input module CTPCORE: Core module CTPOUT: Output module CTPMON: Monitoring module CTPCAL: Calibration module CTP backplanes Common (COM): timing and trigger Pattern-In-Time (PIT): trigger inputs Calibration requests (CAL) Receives LHC timing signals and trigger inputs, generates L1 Accept (L1A) Sends summary info to L2 & DAQ, and timing signals and L1A to sub-detectors Generates dead time to protect sub-detector read-out electronics C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

10 The existing Level-1 Central Trigger systems III. MUCTPI ARCHITECTURE The Muon-to-CTP Interface (MUCTPI) The MUCTPI system consists of a 9U VME chassis with a dedicated active backplane and three types of custom designed modules as shown in Figure 3 below. 13 x 13 x 13 x 16 x MIOCT MIOCT MIOCT 208 Sector Logic inputs MIBAK + Binary Adder Tree MICTP MIROD Figure 3: MUCTPI architecture Trigger Readout Timing CTP DAQ LVL2 The different components of the MUCTPI system are introduced in the following sections. A. MIOCT Module Muon-to-CTP LHC orbit Interface signal (MUCTPI) and the event counter reset, from the CTP and distributes them through the backplane to the other modules in the MUCTPI crate. The MICTP also provides features for monitoring the multiplicity sums through the VME bus. What C. does MIROD themodule MUCTPI do? The Summarizes readout driver candidates module collects found the muon by candidates muon from the 16 MIOCT modules and the multiplicity from the MICTP trigger for every detector L1A received. electronics It then sends this data after formatting to the Level-2 trigger and the DAQ system. The are used Removes for this purpose. double The candidates MIROD also allows reported reading out the selected by overlapping muon candidate sectors data via the VME bus for monitoring purposes. The Reports existing candidate MIROD prototype multiplicities also needed for six to be redesigned, programmable since it was pnot T thresholds directly compatible to the with the ATLAS CTP standard version of the S-LINK [3] mezzanine cards (HOLA). The design and implementation of the final MIROD Three module types are presented of modules in section V communicate below. via the D. MIBAK MIBAK backplane: Backplane The MICTP: dedicated communicates active backplane with calculates the the CTP overall multiplicity by adding the muon candidate multiplicities from the 16 MIROD: MIOCT handles modules. read-out, The multiplicity summing is performed communicates by a binary adder withtree data implemented acquisition using Altera MAX7000 CPLDs for low latency. In addition the backplane implements and Level-2 a bus for trigger the transfer systems of readout data from the MIOCT modules and the MICTP to the MIROD. This shared readout MIOCT: bus uses a processes token passing signals protocol from for arbitration the and is based muon Bus trigger LVDS detectors (BLVDS) [4] insignaling. each octant Finally the MIBAK distributes the trigger and timing signals with lowskew to all the modules in the crate. The MIBAK is mounted in the J3 position of the 9U VME crate. C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

11 Upgrade plans Outline 1 Introduction The Large Hadron Collider & ATLAS The ATLAS trigger and data acquisition system 2 The existing Level-1 Central Trigger systems Central Trigger Processor (CTP) Muon-to-CTP Interface (MUCTPI) 3 Upgrade plans Motivation for upgrade Hardware upgrade of CTP Firmware upgrade of the MUCTPI 4 Summary C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

12 Upgrade plans Motivation for upgrade Motivation for upgrade: CTP resources DT BUSY PIT 160 L U T TBP TAP 256 C A M 256 P S C 256 V E T O TAV 256 O R L1A 160 selected CTPIN signals via PIT bus Look-up tables and content-addressable memories form items from logical combinations of inputs Pre-scales: allows selecting 1 of n triggers, applied per item Veto: caused by dead time to protect busy read-out electronics During a typical run in 2012: Feature Used Available CTPIN input cables 9 12 PIT bus lines CTPCORE trigger items CTPCORE bunch groups 8 8 CTPCORE front inputs 0 0 Max # bits in OR 6 12 Per-bunch item counters Output cables to TTC C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

13 Upgrade plans Motivation for upgrade Motivation for upgrade: topological algorithms at Level 1 Calorimeters! RPC! TGC! L1Calo! Cluster! Processor! Pre-processor! Topological! Processor! Jet/Energy Processor! Barrel! muon! trigger! L1Muon! End-cap muon! trigger! Muon-to-CTP Interface! Converter! L1CT! Central Trigger Processor! TTC! TTC!! TTC! Sub-detector front-end/read-out electronics! Same L1A rate at higher luminosities more intelligent selection exploit difference in event topology for signal and background Requires modifications of the CTP and MUCTPI systems C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

14 Upgrade plans Hardware upgrade of CTP Hardware upgrade of the CTP Upgraded COM backplane to allow multiple partitions and a fifth CTPOUT+ (and PIT operated with DDR) Redesigned core module, CTPCORE+ Increased inputs, items and monitoring resources 192 optical/low-latency electrical front-panel inputs Up to three simultaneous L1A partitions (useful e.g. for concurrent commissioning and calibration runs) New CTPOUT+: supports multiple partitions and per-bunch monitoring Firmware upgrades to CTPIN and CTPMON modules CTPMI! CTPIN! CTPIN! CTPIN! CTPCAL! COM bus! PIT bus! CAL bus! Feature Used (2012) Available Upgrade CTPIN input cables PIT bus lines CTPCORE trigger items CTPCORE bunch groups CTPCORE front inputs Max # bits in OR Per-bunch item counters Output cables to TTC LHC! 4 31! 4 31! 4 31! 28! CTPCORE+! CTPMON! CTPOUT+! CTPOUT+! CTPOUT+! CTPOUT+! CTPOUT+! LVL2! DAQ! 5 LTP! 5 LTP! 5 LTP! 5 LTP! 5 LTP! (thick lines highlight changes, dashed for firmware-only) C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

15 Upgrade plans Hardware upgrade of CTP Trigger path in post-ls1 CTP & parallel partitions LUT Look- Up Tables BGRP Bunch GRouP DT DeadTime ITM Trigger ITeM L1A Level- 1 Accept CAM Content Addressable Memory PSC PreSCaling PIT PaPern In Time TBP Trigger item Before Prescale TAP Trigger item ARer Prescale TAV Trigger item ARer Veto DT BUSY PIT electrical or opacal L U T 512 C A M ITM TBP TAP B P G S 512 R C P V E T O TAV 512 O R x 3 L1A One primary physics partition Up to two secondary partitions for parallel calibration and commissioning runs Trigger menu shared by all partitions, in each partition only a sub-set of items yield a L1A, and dead-time generation is treated separately Only the primary partition sends information to DAQ/Level-2 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

16 Upgrade plans Firmware upgrade of the MUCTPI Firmware upgrade of the MUCTPI Provide new topological processor with muon candidate information: MIOCT firmware upgrade (and new electrical-to-optical converter board) 8x over-clocking two local electrical outputs 16 bits per octant board (256 bits per event) How should these bits be used? What physics processes depend on topological triggers involving muons at Level 1? E.g. B-physics (Bs µ+ µ ), LFV τ decays (τ 3µ, τ 3µγ),... Limited logic resources left in FPGAs of existing MIOCT module keep it simple Will send info about up to two muon candidates per octant: pt Candidate pt Candidate 2 angular resolution η φ , three pt thresholds C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

17 Summary Outline 1 Introduction The Large Hadron Collider & ATLAS The ATLAS trigger and data acquisition system 2 The existing Level-1 Central Trigger systems Central Trigger Processor (CTP) Muon-to-CTP Interface (MUCTPI) 3 Upgrade plans Motivation for upgrade Hardware upgrade of CTP Firmware upgrade of the MUCTPI 4 Summary C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

18 Summary Summary & conclusions Central Trigger Processor (CTP) system New CTPCORE+ and CTPOUT+ modules and COM bus, PIT bus at DDR more resources in terms of trigger inputs and monitoring, etc. new features, most importantly the capability to run several parallel L1A partitions Muon-to-CTP Interface (MUCTPI) system Outlook Hardware of MUCTPI remains unchanged in Long Shutdown 1 Firmware upgrade of MIOCT module allows sending reduced granularity muon data to topological trigger processor (complete MUCTPI redesign for Phase-I Upgrade in 2018, providing full-granularity data) On schedule to start commissioning from mid-2014 Lots of work on testing of hardware and developing firmware and software for the upgraded systems C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

19 Back-up material Back-up slides C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

20 o tionality Back-up material Functionality of current CTP system Calorimeter Trigger LHC Muon Trigger CTP TTC Partitions Forward detectors LVL2 DAQ Configuration Control Monitoring Trigger: Timing: Combine triggers from L1Calo, L1Muon (via MuCTPI) & other detectors Flexible logical combinations defined in trigger menu BG masking, pre-scaling, deadtime generation Generate L1A and trigger-type word Receive bunch clock and orbit signals from LHC Add L1A, trigger-type word and event-counter reset (ECR) Distribute to TTC partitions, receive busy and calibration requests Read-out: Control: Send RoI to L2 and read-out data to DAQ Configuration stored in trigger and 3 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

21 Back-up material MHz foreseen => 192 inputs (even 160MHz possible) Design of the new CTPCORE+ module mportant for latency critical signals g (vs 8) enerators vs 12) 2ELC9:&!"#$$%"&M&!#N#?$&& O#$?(>:&.0JE&8(;<=>(?%6& I-E& 2EL& +',-& 80Z&JI8Z&L0I&& `&K&89:T& Q@-&.="#N("T6& P&K&Q@-&.:%;R?S("T6& I-E& +',-&& 0R?)"R>& I%(SR9)] ER?#)R"#?$& +',-&./012/345!6& '7!Z&!8'Z&!-'Z&!-2&.@AK&A\3&,8S6&!"#$$%"&'()*& A\3,8S& E#?#& 'JH&!K& O+'& O+'& E#?#& 'JH& IK&,'O&YN%&.0!I'6& H-U&& OVQ7WX& Q2QP&& OVQ7WX& J=Y;(>& J9)=9):& ^P&L>%;)"#;(>&7?=9):&.Q2HO6&_"RN&Q@!R=R& J=Y;(>&!"#$$%"& 7?=9):&.!R=RZ& 0E/Z&E[0!'76& C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

22 Back-up material Status of Board Development Layout of the new CTPCORE+ module CTPCORE+ Optical Inputs Electrical Inputs (3x64bits) DAQ/ROIB VME PIT bus COM+CAL bus Prelimina are comp Prototype available Prototype available North FP South FP Note the not plann Run-2 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

23 Back-up material Initial tests show no errors in 24 hours, i.e. BER < 1e-12 Long term Bit Error Rate tests ongoing Output capability per octant is then 16 bits per BC So what do we do with this new bandwidth? Tests of over-clocking of MIOCT modules MIOCTs( MIOCT$0$ MIOCT$1$ NIM$ NIM$to$LVDS$FMC$ NIM(to(LVDS(FMC( LVDS$ FPGA(board( Ethernet$ Controller( Bit Pattern: STABLE UNSTABLE Data rate: 320Mb/s PRBS length: Scope$ 11/07/2013 Taylor Childers TDAQ Week Initial tests results: zero errors during 24 hours for phases marked in green, suggesting bit-error rate < Shows that 8x over-clocking, i.e. running at 320 MHz, is possible 5 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

24 Back-up material The MuCTPiToTopo electrical-to-optical converter board Feeding MuCTPi information to L1Topo Details in: ATL-DAQ-INT O.Igonkina, J.Vermeulen 32 LEMO cables from MuCTPi Prototype of L1Topo FPGA development kit Can deliver 256 bits from MuCTPi per event to L1Topo What s the best way of using this information? Monday, March 11, 13 C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26

25 Back-up material The MuCTPiToTopo electrical-to-optical converter board FMC)board)with)LEMO) connectors)goes)here) FMC)board)with)2)QSFP+) transceivers)goes)here) USB))i/f) to)uart:) G>)control) USB) JTAG)i/f)) G>)loading) of)firmware) Xilinx)VirtexG7)FPGA) C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 VC707) EvaluaPon) Kit) Oct 10, / 26

26 Back-up material Technical)detail) The MuCTPiToTopo MuCTPiToTopo) electrical-to-optical converter board IDELAY% =0x00?% K28.5% K28.1% GTX) MHz% 8B/10B% 16% 20% 8B/10B% Serializer% Replacement%of%0x00%into%<K28.5>%/%<K28.1>% Solves%85bit%word%alignment.%%Both%contain% Comma.% % Need%to%solve%MSB/LSB%alignment%at%Topo% (usually%done%by%ordered%set% <K28.5><D16.2>%Or%<K28.5><D5.6>% but%we%choose%<k28.5><k28.1>)% 6.4%Gbps% or% In_15% IDELAY% Latency:% =0x00?% 1st% 320%MHz% Clock%Tick% 2nd?% 320%MHz% Clock%Tick% 3rd% 320%MHz% Clock%Tick% C. Ohm (CERN) An Upgraded ATLAS Central Trigger for 2015 Oct 10, / 26