B.C.A 2017 MICROPROCESSOR AND ASSEMBLY LANGUAGE MODULE SPECIFICATION SHEET. Course Outline

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B.C.A 2017 MICROPROCESSOR AND ASSEMBLY LANGUAGE Course Outline MODULE SPECIFICATION SHEET The objective of the course is to expose to the students to the architecture and instruction set of typical

Microprocessors: Historical background; Organization & Architectural Features of Microprocessor & Micro Controllers; The Instruction Set: Instruction format, addressing modes; Assembly language

1 B.C.A 2017 MICROPROCESSOR AND ASSEMBLY LANGUAGE Course Outline MODULE SPECIFICATION SHEET The objective of the course is to expose to the students to the architecture and instruction set of typical 8-bit microprocessor. Microprocessors: Historical background; Organization & Architectural Features of Microprocessor & Micro Controllers; The Instruction Set: Instruction format, addressing modes; Assembly language programming of 8085; Interfacing of memory devices; Data transfer techniques and I/O ports; Interfacing of keyboard and display devices; Programmable Interrupt and DMA controllers; Interfacing of sensors, transducers, actuators, A/D & D/A Converters, Analog Signal Conditioning Circuits, Data acquisition systems; Standard Interfaces RS232, USB; Development aids and troubleshooting techniques; Application examples; Advanced microprocessors and microcontrollers. Faculty Details JAJI NEKKANTI Assistant Professor Department of BCA PES DEGREE COLLEGE BANGALORE SOUTH CAMPUS Affiliated to Bangalore University

2 1. GENERAL INFORMATION Academic Year : 2017 Semester : V Title Code Duration MICROPROCESSOR AND ASSEMBLY LANGUAGE BCA505T Lectures 65 Tutorials 11 Total: PRE REQUIREMENT STATEMENT The students should have good background on digital circuits (should have attended the course Switching Circuits and Logic Design). 3. COURSE RELEVANCE This course is intended as a first level course for microcomputer and embedded system design. Designer of an embedded system must have a thorough understanding of hardware, software and system integration. In view of this, various aspects of hardware design, such as interfacing of memory and different types of I/O devices, will be covered in details. As it is customary to write software in machine or assembly language for embedded system applications, laboratory assignments will be on assembly language programming of LEARNING OUTCOMES After completing the course students should be able to 1. Describe the architecture and comprehend the instruction set of Understand and apply the principles of Assembly Language Programming in developing microprocessor based applications. 3. Work with standard microprocessor interfaces like serial ports, digital-to-analog Converters and analog-to-digital converters etc. 5. VENUE AND HOURS/WEEK All lectures will normally be held on VIII Floor. Lecture Sessions / Week: 6 Page 2 of 17

3 6. MODULE MAP Class (Sessi on #) Chapters Topic Details Cumulative % of Portions Covered Introduction to 8085, Schematic diagram of digital computer system UNIT 1 Architecture and Operation Page No: Key features, The Registers and System Bus of 8085 Microprocessor System. Page No: Machine Language, Assembly and High level Language Page No: Architecture of 8085 Microprocessor System Page No: Pin configuration of 8085 Microprocessor System. Page No: Block diagram of 8085 Microprocessor Based System Page No: Timing Diagrams (Opcode Fetch operation, Memory Read operation, MVI R, Data) Page No: Timing Diagrams (Memory write operation, I/O Read operation, I/O write operation) Page No: Memory interfacing Introduction, Basic Memory Element Page No: % Page 3 of 17

4 Basic concepts in Memory interfacing, Address decoding 10. Page No: Memory Mapping & Memory Addresses 12. Page No: Interfacing I/O devices Introduction 13. Page No: Methods of I/O Operations 14. Page No: Peripheral Mapped I/O 15. Page No: Memory-Mapped I/O 16. Page No: Introduction, Programming Model of 8085 Microprocessor 17. Page No: Instruction Format, Instruction Word size 18. Page No: Addressing Modes UNIT 2 Programming the 8085 Page No: Instruction Set Classification-Data transfer Group instructions Page No: Arithmetic Group instructions (ADD R, ADD M, ADC R) 40% 21. Page No: Page 4 of 17

5 Arithmetic Group instructions (ADC M, ADI 8-bit data, ACI 8-bit data, DAD Rp) Page No: Arithmetic Group instructions (SUB R, SUB M, SBB R) Page No: Arithmetic Group instructions (SBB M, SUI 8-bit data, SBI 8-bit data, INR R) Page No: Arithmetic Group instructions (INR M, DCR R, DCR M, INX Rp) Page No: Arithmetic Group instructions (DCX Rp, DAA) Page No: Logical Group instructions (AND and OR operations) Page No: Logical Group instructions (OR and XOR operations) Page No: Compare instructions Page No: Rotate instructions Page No: Branch Control Group Page No: Page 5 of 17

6 Looping Counting and Indexing 32. Page No: bit arithmetic operations basics Page No: Addition and Subtraction of Two 8-bit Hex numbers Using Memory pointer Page No: Addition of Two 16 bit numbers, Addition of N-byte numbers Page No: Addition of Two N-byte Numbers UNIT 3 Programming techniques Page No: Subtraction of Two 16 bit numbers Page No: Subtraction of Two N-byte Numbers 70% 38. Page No: Program for Block transfer, Program for Block Exchange 39. Page No: Program for Exchange of Two Ten Byte Numbers 40. Page No: Logic operations - rotate operations 41. Page No: Logic operations Compare 42. Page No: Page 6 of 17

7 BCD Addition Example 1, 2 Page No: BCD Addition Example 3, 4 Page No: BCD Subtraction Page No: BCD Multiplication and division Page No: Counters and Time delays Introduction, Time delay calculation for one register Page No: Time delay using a loop within a loop technique Page No: Modulo Ten Counter, Hexadecimal counter Page No: Generation of pulse waveforms Page No: Stacks and subroutines Page No: Conditional CALL and RETURN instructions. Page No: BCD to Binary Conversion Page No: Page 7 of 17

8 UNIT 4 Memory Interface and 59. Interrupts Binary to BCD Conversion Page No: BCD to Seven Segment LED Code Conversion Page No: Binary to ASCII and ASCII to Binary code conversion Page No: The 8085 interrupts Page No: vectored interrupts Page No: Interrupt Instructions Page No: Pending Interrupts Page No: Serial Input and Output Data Transfer Page No: Additional I/O concepts and processes. Page No: Programmable Peripheral Interface Page No: Block diagram of 8255 Programmable Peripheral Interface 64. Page No: Operational Modes of 8255A 82% Page 8 of 17

9 UNIT 5 Interfacing of peripherals (I/Os) and applications Page No: Bit Set/Reset (BSR) Mode of 8255A Page No: Programmable Interrupt Controller (8259A) pin diagram Page No: Block diagram of 8259A Programmable Interrupt Controller Page No: Direct Memory Access (DMA) pin diagram 70. Page No: Block diagram of 8257 DMA Controller 100% 72. Page No: Programmable Keyboard and Display Interface (8279) Page No: Serial Communication and Programmable Communication Interface (8251) Page No: Interfacing Digital to Analog Converter (DAC) Page No: Page 9 of 17

10 7. RECOMMENDED BOOKS/JOURNALS/WEBSITES A. PRESCRIBED TEXTBOOK T1 (Text Book 1) - Stallings, Data and Computer Communications, 7th Edition, Pearson Education, B. REFERENCE BOOKS a. Mohana H K, Nethra H S, Bharathi A, Skyward Publications. b. Andrew S Tanenbaim, Computer Networks, 4th Edition, Pearson Education. c. 2. Behrouz Ferouzan, Introduction to Data Communication & Networking TMH, d. 3. Larry &Peterson & Bruce S Davis; Computer networks Second Edition, Morgan Kaufman, ASSIGNMENTS ASSIGNMENT 1 1. What are the functions of an accumulator? 2. Draw and explain the architecture of Draw the pin diagram of 8085? 4. How many address lines are required to access 512MB bytes? 5. Mention the memory capacities corresponding to the number of address lines 10, 11, 12, 13, 14, 15 and 16. ASSIGNMENT 2 1. Differentiate between the following instructions a. LDA 8000H and STA 8000H b. LHLD 9000H and SHLD 9000H 2. Write the instructions for below questions and mention the status of flags before and after the execution. a. Assume register pair BC contains 2498H and register pair DE contains 54A1H. Add these two 16-bit numbers and save the result in BC registers. b. Add the content of registers B (24H) and D (54H) by placing the contents of one register in the A. Now the instruction ADC is required to add the contents of [B] and [D] with carry from the addition of [C] and [E] register contents. Save the highorder 8-bits results in register B. Page 10 of 17

11 c. Assume the contents of the accumulator are 37H and the contents of the memory location 2050H is 40H. Write a program to subtract M from the A and store the difference in register C. 3. Explain Time delay calculation. 4. Write an assembly language program to count a hexadecimal number continuously from FFH to 00H with one millisecond (ms) delay between each count and display the number at one of the output port. Assume the system frequency is 2MHz. ASSIGNMENT 3 1. Write a program to add ten one byte hexadecimal numbers stored in a memory locations starting at 8050H. Store the result in memory locations starting at 8700H. 2. Explain the steps to convert BCD to binary conversion with an example. 3. Draw the architectural block diagram of 8255PPI and mention different operating modes. 4. Write an assembly language program to check if RST 5.5 is pending, enable it without affecting any other interrupt else return to main program. 9. THEORY ASSESSMENT A. WRITTEN EXAMINATION The Theory Examination is for 70 Marks which will be held for duration of 3 Hrs. The Scheme and Blue Print will be released to the students once the Bangalore University releases it. B. CONTINUOUS ASSESSMENT The Continuous Assessment is conducted as per the following parameters. Parameter MARKS WEIGHTAGE % 12 MARKS Internal Test 35 MARKS 75% 9 MARKS Assignment 10 MARKS 12.5% 1.5 MARKS Class Test 10 MARKS 12.5% 1.5 MARKS Total 55 MARKS 100% 12 MARKS Page 11 of 17

12 The students are hereby required to note that every internal test weightage will calculated for 12 Marks. This includes timely submission of assignments and attending class tests as conducted. The Sum of Best Two Performances in Internal Terms will be taken. Parameter Internal Test 01 Internal Test 02 Internal Test 03 Final Internal Marks (Sum of Best Two Marks Of The Three Internal Tests) Attendance >95 % : 06 Marks % : 05 Marks % : 04 Marks % : 03 Marks % : 02 Marks Total MARKS 12 MARKS 12 MARKS 12 MARKS 24 MARKS 06 MARKS 30 MARKS 10. ASSESSMENT / ASSIGNMENT / CLASS TEST / ACTIVITY PLANNER Week Internal Test T1 T2 T3 Assignments Submission A1 A2 A3 Class Test C1 C2 C3 Legend Meaning Test Topics Examinable T1, T2,T3 Internal Tests T1 Class 1 30 A1, A2, A3 Assignments T2 Class C1,C2,C3 Class Test T3 Class LT Problems 1-20 Page 12 of 17

13 11. MODEL QUESTION PAPERS Page 13 of 17

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16 12. PREVIOUS QUESTION PAPER Page 16 of 17

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B.C.A 2017 OBJECT ORIENTED PROGRAMMING USING C++ BCA303T MODULE SPECIFICATION SHEET

B.C.A 2017 OBJECT ORIENTED PROGRAMMING USING C++ BCA303T MODULE SPECIFICATION SHEET Course Outline The main objective of this course is to introduce students to the basic concepts of a selected language