QEmu TCG Enhancements for Speeding-up the Emulation of SIMD instructions

Transcription

1 QEmu TCG Enhancements for Speeding-up the Emulation of SIMD instructions Luc Michel, Nicolas Fournel and Frédéric Pétrot TIMA Laboratory System Level Synthesis Group DATE 11 W8 18/03/2011

2 Outline 1 About QEmu About SIMD instructions 2 The intermediate representation The helpers 3 Improving Neon instructions translation A solution to improve the translation Intermediate representation extension choices 4 Tests protocol Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 2 / 25

3 Outline About QEmu About SIMD instructions 1 About QEmu About SIMD instructions 2 The intermediate representation The helpers 3 Improving Neon instructions translation A solution to improve the translation Intermediate representation extension choices 4 Tests protocol Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 3 / 25

4 About QEmu About SIMD instructions QEmu: a fast and portable dynamic translator Simulation with QEmu Open-source simulation and virtualization software, Dynamic binary translation of the code of a target architecture, To be executed on an host architecture. Precise goal of the present work Accelerate the cross-execution of the Neon instructions. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 4 / 25

5 What are SIMD instructions? About QEmu About SIMD instructions SIMD Instructions: Single Instruction, Multiple Data Same operation on multiple data in parallel, very efficient to optimize some algorithms: parts of media codecs, of radio processes,..., 64 bits or 128 bits data vectors, 8, 16, 32, 64 bits data depending on the instructions. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 5 / 25

6 Example: vadd.i16 About QEmu About SIMD instructions Taken from the ARM Neon instruction set Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 6 / 25

7 Outline The intermediate representation The helpers 1 About QEmu About SIMD instructions 2 The intermediate representation The helpers 3 Improving Neon instructions translation A solution to improve the translation Intermediate representation extension choices 4 Tests protocol Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 7 / 25

8 The intermediate representation The helpers The intermediate representation of QEmu The intermediate representation of QEmu Independent intermediate representation consists of micro-operations. add i32 mov i32 or i32 Two steps translation 1 Target architecture code micro-operations, 2 micro-operations host architecture code. Intermediate representation benefits Independence between targets and hosts architectures. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 8 / 25

9 Binary translation example The intermediate representation The helpers Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 9 / 25

10 The intermediate representation The helpers Neon instructions translation method: the helpers The helpers C functions, simulate an instruction, Compiled as a part of QEmu, Called when translating the corresponding Neon instruction. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 10 / 25

11 Example with a helper The intermediate representation The helpers Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 11 / 25

12 Helpers overhead The intermediate representation The helpers Helpers overhead Function call, Adapting the arguments, Passing the arguments, Getting the result. Multiple calls because each 64b/128b vector split into 32b parts Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 12 / 25

13 Outline A solution to improve the translation Intermediate representation extension choices 1 About QEmu About SIMD instructions 2 The intermediate representation The helpers 3 Improving Neon instructions translation A solution to improve the translation Intermediate representation extension choices 4 Tests protocol Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 13 / 25

14 A solution to improve the translation A solution to improve the translation Intermediate representation extension choices The idea Be able to take advantage of the host SIMD capabilities, Add some SIMD micro-operations to the QEmu IR, Translate these micro-operations to host SIMD instructions. The practical example of this work ARM Neon instruction set Intel x86 MMX/SSE instruction set. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 14 / 25

15 How to extend the IR A solution to improve the translation Intermediate representation extension choices Choose how to extend the QEmu IR Adding a micro-operation for each target instruction, Keep a little IR and add only elementary micro-operations. Our choice Try to keep the IR as simple as possible. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 15 / 25

16 A solution to improve the translation Intermediate representation extension choices Examples of mapping between Neon and MMX/SSE Direct mapping between two instructions The most favorable case, micro-operation with the semantic of these two instructions. Mapping between vadd.i16 (Neon) and paddw (MMX/SSE) Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 16 / 25

17 A solution to improve the translation Intermediate representation extension choices Examples of mapping between Neon and MMX/SSE A Neon instruction emits multiple micro-operations The Neon instruction is not elementary, split into several elementary micro-operations. Translating the vsra.u32 (Neon) instruction Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 17 / 25

18 A solution to improve the translation Intermediate representation extension choices Examples of mapping between Neon and MMX/SSE A micro-operation generates multiple host instructions No equivalent for this micro-operation on the host, micro-operation behavior reproduced with host instructions, Harder to perform with QEmu than previous case. The simd 128 shl i8 micro-op emits several host instructions Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 18 / 25

19 Outline Tests protocol 1 About QEmu About SIMD instructions 2 The intermediate representation The helpers 3 Improving Neon instructions translation A solution to improve the translation Intermediate representation extension choices 4 Tests protocol Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 19 / 25

20 What kind of tests? Tests protocol Unitary tests Ensure correctness of the translation, detect regression during the development phase. Execution time. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 20 / 25

21 Tests environment Tests protocol Linux in QEmu Minimalist Linux system, Cross-compilation toolchain to compile some programs for the test system. Real BeagleBoard system Board embedding an ARM Cortex-A8 CPU with Neon extension, Used to validate our unitary tests. Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 21 / 25

22 Performance tests Tests protocol The three chosen instructions vadd.i16, vsra.u16, vshl.u8. For each instruction assembly functions, containing 0% to 100% of this Neon instruction, filled with classical instructions, executed several times in a loop, total execution time measured for the helpers and mapping strategies Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 22 / 25

23 Performance tests results Tests protocol Relative execution time (%) compared to helpers vadd.i16 vsra.u16 vshl.u SIMD instructions (%) Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 23 / 25

24 Take away message Tests protocol Conclusion Results are very encouraging, but Amdahl s law still rules What to do next? Extend the implementation to more SIMD instruction sets, Probably with the help of automation tools Call to QEmu development community Should this approach be promoted into mainstream QEmu? Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 24 / 25

25 Thanks for your attention Tests protocol And now ready to answer your questions! Luc Michel, Nicolas Fournel and Frédéric Pétrot QEmu TCG Enhancements for SIMD support 25 / 25